Method for fabricating a plurality of elastic probes in a row
    2.
    发明授权
    Method for fabricating a plurality of elastic probes in a row 有权
    一排制造多个弹性探针的方法

    公开(公告)号:US07316065B2

    公开(公告)日:2008-01-08

    申请号:US11364330

    申请日:2006-03-01

    IPC分类号: G01R3/00

    摘要: A method of forming a plurality of elastic probes in a row is disclosed. Firstly, a substrate is provided, then, a shaping layer is formed on the substrate so as to offer two flat surfaces in parallel. A photoresist layer is formed on the substrate and on the shaping layer. Then, the photoresist layer is patterned to form a plurality of slots crossing an interface between the two flat surfaces where a plurality of elastic probes are formed in the slots. In one embodiment, the interface is an edge slope of the shaping layer so that each of the elastic probes has at least an elastic bending portion. During chip probing, the shifting direction of the elastic probes due to overdrives is perpendicular to the arranging direction of the bonding pads so that the elastic probes are suitable for probing chips with high-density and fine-pitch bonding pads.

    摘要翻译: 公开了一排形成多个弹性探针的方法。 首先,提供基板,然后在基板上形成成形层,以便平行地提供两个平坦表面。 在基板上和形成层上形成光致抗蚀剂层。 然后,对光致抗蚀剂层进行图案化以形成与两个平坦表面之间的界面交叉的多个槽,其中在槽中形成有多个弹性探针。 在一个实施例中,界面是成形层的边缘斜率,使得每个弹性探针具有至少一个弹性弯曲部分。 在芯片探测期间,由于过驱动导致的弹性探针的移动方向垂直于接合焊盘的布置方向,使得弹性探头适用于探测具有高密度和细间距接合焊盘的芯片。

    Modular probe card
    3.
    发明申请
    Modular probe card 有权
    模块式探针卡

    公开(公告)号:US20070152689A1

    公开(公告)日:2007-07-05

    申请号:US11322408

    申请日:2006-01-03

    IPC分类号: G01R31/02

    CPC分类号: G01R1/07378

    摘要: A modular probe card comprises a printed circuit board, an interposer, and a probe head where the printed circuit board has a plurality of first contact pads, the probe head has a plurality of second contact pads. The interposer is disposed between the printed circuit board and the probe head where the interposer includes a substrate and a plurality of pogo pins. The substrate has a first surface, a second surface, and a plurality of through holes penetrating from the first surface to the second surface. The pogo pins are secured in the through holes of the substrate. Each of the pogo pins has a first contact point, a second contact point, and a spring therebetween, whereby the first contact points are elastically extruded from the first surface to contact the first contact pad, and the second contact points are elastically extruded from the second surface to contact the second contact pad, so as to overcome the poor electrical connections between the printed circuit board and the probe head through the interposer due to poor coplanarity of the first contact pads of the printed circuit board.

    摘要翻译: 模块化探针卡包括印刷电路板,插入件和探针头,其中印刷电路板具有多个第一接触焊盘,探头具有多个第二接触焊盘。 插入器设置在印刷电路板和探针头之间,其中插入器包括基板和多个弹簧销。 基板具有从第一表面到第二表面的第一表面,第二表面和多个通孔。 弹簧销固定在基板的通孔中。 每个弹簧销具有第一接触点,第二接触点和它们之间的弹簧,由此第一接触点从第一表面弹性挤出以接触第一接触垫,并且第二接触点从 第二表面接触第二接触焊盘,以便克服印刷电路板和探针头之间通过插入器的不良电连接,因为印刷电路板的第一接触焊盘的共面性差。

    Probe card interposer
    4.
    发明申请
    Probe card interposer 审中-公开
    探头卡插件

    公开(公告)号:US20060091510A1

    公开(公告)日:2006-05-04

    申请号:US11076935

    申请日:2005-03-11

    IPC分类号: H01L23/02

    摘要: A probe card interposer includes a substrate with a plurality of conductive bumps disposed on first surface of the substrate. Each conductive bump comprises a dielectric core and a plurality of conductive leads. The suspended ends of the conductive wires extend toward the centers of the corresponding dielectric cores and are elastically supported by the corresponding dielectric cores. Therefore, the interposer can be installed between a probe head and a multi-layer PCB to make good electrical contacts to the probe head through the conductive bumps. In the embodiment, a plurality of symmetric conductive bumps are disposed on second surface of the substrate and are electrically connected to the conductive bumps on first surface of the substrate through vias or conductive posts. The conductive bumps can electrically contact the multi-layer PCB.

    摘要翻译: 探针卡插入件包括具有设置在基板的第一表面上的多个导电凸块的基板。 每个导电凸块包括介质芯和多个导电引线。 导线的悬挂端部朝向相应介质芯的中心延伸,并被相应的介质芯片弹性地支撑。 因此,插入器可以安装在探针头和多层PCB之间,以通过导电凸块与探头头形成良好的电接触。 在本实施例中,多个对称导电凸块设置在基板的第二表面上,并且通过通孔或导电柱与基板的第一表面上的导电凸块电连接。 导电凸块可以电接触多层PCB。

    Probe card assembly
    5.
    发明授权
    Probe card assembly 有权
    探头卡组合

    公开(公告)号:US06853205B1

    公开(公告)日:2005-02-08

    申请号:US10620448

    申请日:2003-07-17

    摘要: A probe card assembly is disclosed. The probe card assembly comprises a stiffener ring combining respectively with an upper printed circuit board and a lower printed circuit board. A plurality of coaxial transmitters are installed in the stiffener ring, and connect to the upper and lower printed circuit boards by cable connectors. The lower printed circuit board is assembled with a detachable probe head which comprises a silicon substrate with probing points and a probe head carrier. A downset is formed at the center of the probe head carrier. The standardized coaxial transmitters, printed circuit boards and probe heads are then assembled as a probe card assembly for testing all sorts of IC products.

    摘要翻译: 公开了一种探针卡组件。 探针卡组件包括分别与上印刷电路板和下印刷电路板组合的加强环。 多个同轴发射器安装在加强环中,并通过电缆连接器连接到上下印刷电路板。 下部印刷电路板组装有可拆卸的探针头,该探头包括具有探测点的硅衬底和探针头托架。 在探针头托架的中心处形成一个凹陷。 然后将标准化的同轴发射器,印刷电路板和探头组装成用于测试各种IC产品的探针卡组件。

    Method for fabricating a plurality of elastic probes in a row
    6.
    发明授权
    Method for fabricating a plurality of elastic probes in a row 有权
    一排制造多个弹性探针的方法

    公开(公告)号:US07477065B2

    公开(公告)日:2009-01-13

    申请号:US11605443

    申请日:2006-11-29

    IPC分类号: G01R31/02

    摘要: A method of forming a plurality of elastic probes in a row is disclosed. Firstly, a substrate is provided, then, a shaping layer is formed on the substrate so as to offer two flat surfaces in parallel. A photoresist layer is formed on the substrate and on the shaping layer. Then, the photoresist layer is patterned to form a plurality of slots crossing an interface between the two flat surfaces where a plurality of elastic probes are formed in the slots. In one embodiment, the interface is an edge slope of the shaping layer so that each of the elastic probes has at least an elastic bending portion. During chip probing, the shifting direction of the elastic probes due to overdrives is perpendicular to the arranging direction of the bonding pads so that the elastic probes are suitable for probing chips with high-density and fine-pitch bonding pads.

    摘要翻译: 公开了一排形成多个弹性探针的方法。 首先,提供基板,然后在基板上形成成形层,以便平行地提供两个平坦表面。 在基板上和形成层上形成光致抗蚀剂层。 然后,对光致抗蚀剂层进行图案化以形成与两个平坦表面之间的界面交叉的多个槽,其中在槽中形成有多个弹性探针。 在一个实施例中,界面是成形层的边缘斜率,使得每个弹性探针具有至少一个弹性弯曲部分。 在芯片探测期间,由于过驱动导致的弹性探针的移动方向垂直于接合焊盘的布置方向,使得弹性探头适用于探测具有高密度和细间距接合焊盘的芯片。

    MODULARIZED PROBE CARD FOR HIGH FREQUENCY PROBING
    7.
    发明申请
    MODULARIZED PROBE CARD FOR HIGH FREQUENCY PROBING 有权
    用于高频探测的模块化探头卡

    公开(公告)号:US20060125498A1

    公开(公告)日:2006-06-15

    申请号:US11011200

    申请日:2004-12-15

    IPC分类号: G01R31/02

    摘要: A modularized probe head for high frequency probing is provided. The probe head mainly includes a probe head, a mounting board and an interposer between the probe head and the mounting board. The probe head has a plurality of cavities on its back surface. A plurality of decoupling components are installed inside the cavities and are electrically coupled to the ground/power circuitry of the probe head via by-pass circuitry. The interposer has a bottom surface corresponding to the back surface of the probe head, and includes a plurality of contact ends on the bottom surface. Some of the contact ends electrically contact the decoupling components and electrically coupled to the ground plane of the mounting board.

    摘要翻译: 提供了一种用于高频探测的模块化探头。 探头主要包括探头,安装板和探头与安装板之间的插入件。 探头在其后表面上具有多个空腔。 多个去耦组件安装在空腔内,并通过旁通电路电耦合到探头的接地/电源电路。 插入器具有对应于探针头的后表面的底面,并且在底面上包括多个接触端。 一些接触端与去耦组件电接触并电耦合到安装板的接地平面。

    Modularized probe head
    8.
    发明申请

    公开(公告)号:US20050088190A1

    公开(公告)日:2005-04-28

    申请号:US10680230

    申请日:2003-10-08

    IPC分类号: G01R31/28 G01R31/02

    CPC分类号: G01R31/2887

    摘要: A modularized probe head for modularly assembling on a probe card is configured for probing a semiconductor wafer under test. The probe head includes a silicon substrate having an active surface and an opposing back surface. The back surface of the silicon substrate is attached on a holder. The silicon substrate has a plurality of peripheral bond pads and contact pads on its active surface. At least a probing chip is mounted on the active surface of the silicon substrate. The probing chip has probing tips and side electrodes. The side electrodes are connected with the contact pads by means of solder material. The peripheral bonding pads of the silicon substrate are connected with a flexible printed circuit for electrically connecting to a multi-layer printed circuit board of a probe card.

    Method for fabricating anisotropic conductive substrate
    9.
    发明申请
    Method for fabricating anisotropic conductive substrate 有权
    制造各向异性导电基板的方法

    公开(公告)号:US20050066521A1

    公开(公告)日:2005-03-31

    申请号:US10671735

    申请日:2003-09-29

    IPC分类号: H01R43/00

    摘要: A method for fabricating an anisotropic conductive substrate is disclosed. A back holder has metal pins on a surface thereof. A liquid compound is formed on the surface of the back holder with metal pins. The liquid compound is pressed to deform the metal pins into electrodes in the liquid compound. The thickness between upper surface and lower surface of the liquid compound is between 25 μm and 250 μm. The electrodes have upper ends and lower ends exposed from upper surface and lower surface of the liquid compound to provide electrical contact of anisotropic conduction.

    摘要翻译: 公开了一种用于制造各向异性导电衬底的方法。 后盖在其表面上具有金属销。 在后支架的表面上用金属销形成液体化合物。 液体化合物被压制以使金属销变形成液体化合物中的电极。 液体化合物的上表面和下表面之间的厚度在25μm和250μm之间。 电极具有从液体化合物的上表面和下表面暴露的上端和下端,以提供各向异性导电的电接触。

    Method of surface treatment on the improvement of electrical properties for doped silicon oxides (SiO2) films
    10.
    发明授权
    Method of surface treatment on the improvement of electrical properties for doped silicon oxides (SiO2) films 有权
    表面处理改善掺杂氧化硅(SiO2)薄膜电性能的方法

    公开(公告)号:US06689645B2

    公开(公告)日:2004-02-10

    申请号:US09851974

    申请日:2001-05-10

    IPC分类号: H01L21335

    CPC分类号: H01L21/02052 H01L21/31629

    摘要: In the fabrication of gate oxides in IC process, a suitable cleaning/etching process is required to remove the native oxides and reduce surface microroughness in addition to standard RCA cleaning. For ultrathin oxide thickness (

    摘要翻译: 在IC工艺中栅极氧化物的制造中,除了标准的RCA清洁之外,还需要适当的清洁/蚀刻工艺去除天然氧化物并降低表面微观粗糙度。 对于超薄氧化物厚度(<10nm),具有无自然氧化物和H钝化硅(Si)表面的重要问题是确保高击穿场,高电荷到击穿和低漏电流。 根据这些概念,我们提出了一种简单的两步氟化氢(HF)蚀刻工艺的发明,以改善液相沉积氟化硅氧化物(LPD-SiOF)的电性能,包括有效去除天然氧化物,降低 界面陷阱密度(〜10 10 eV-1 cm -2),表面微粗糙度(Ra = 0.1nm)的降低和击穿场的提高(〜9.7 MV / cm)。 此外,快速热退火(RTA)也用于进一步提高氧化物质量。 发现击穿场增加18%,界面陷阱密度降低33%。 除了适用于LPD-氧化硅(SiO 2)之外,该技术也适用于其他掺杂氧化物。 该技术有助于在未来的ULSI工艺中获得用于超薄栅极氧化物的高质量和低成本的氧化硅。