Methods and arrangement for the reduction of byproduct deposition in a plasma processing system
    4.
    发明申请
    Methods and arrangement for the reduction of byproduct deposition in a plasma processing system 有权
    在等离子体处理系统中减少副产物沉积的方法和装置

    公开(公告)号:US20060130758A1

    公开(公告)日:2006-06-22

    申请号:US11022982

    申请日:2004-12-22

    IPC分类号: H05H1/24 C23C16/00

    摘要: In a plasma processing system, a method of reducing byproduct deposits on a set of plasma chamber surfaces of a plasma processing chamber is disclosed. The method includes providing a deposition barrier in the plasma processing chamber, the deposition barrier is configured to be disposed in a plasma generating region of the plasma processing chamber, thereby permitting at least some process byproducts produced when a plasma is struck within the plasma processing chamber to adhere to the deposition barrier and reducing the byproduct deposits on the set of plasma processing chamber surfaces.

    摘要翻译: 在等离子体处理系统中,公开了一种在等离子体处理室的一组等离子体室表面上减少副产物沉积的方法。 所述方法包括在所述等离子体处理室中设置沉积阻挡层,所述沉积阻挡层被配置为设置在所述等离子体处理室的等离子体产生区域中,从而允许在所述等离子体处理室内等离子体被击中时产生的至少一些过程副产物 以附着到沉积屏障上并减少等离子体处理室表面组上的副产物沉积物。

    System and method for stress free conductor removal
    5.
    发明申请
    System and method for stress free conductor removal 有权
    无应力导体去除的系统和方法

    公开(公告)号:US20070190771A1

    公开(公告)日:2007-08-16

    申请号:US11732608

    申请日:2007-04-03

    IPC分类号: H01L21/44

    摘要: A system and method for forming a planar dielectric layer includes identifying a non-planarity in the dielectric layer, forming one or more additional dielectric layers over the dielectric layer and planarizing at least one of the additional dielectric layers wherein the one or more additional dielectric layers include at least one of a spin-on-glass layer and at least one of a low-k dielectric material layer and wherein each one of the one or more additional dielectric layers having a thickness of less than about 1000 angstroms and wherein the one or more additional dielectric layers has a total thickness of between about 1000 and about 4000 angstroms.

    摘要翻译: 用于形成平面电介质层的系统和方法包括识别电介质层中的非平面性,在电介质层上形成一个或多个附加的电介质层,并平坦化至少一个附加电介质层,其中一个或多个附加电介质层 包括旋涂玻璃层和低k介电材料层中的至少一个中的至少一个,并且其中所述一个或多个附加电介质层中的每一个具有小于约1000埃的厚度,并且其中所述一个或多个 更多的附加电介质层的总厚度在约1000和约4000埃之间。

    Method for adjusting voltage on a powered faraday shield
    7.
    发明申请
    Method for adjusting voltage on a powered faraday shield 有权
    用于调节动力法拉第盾屏蔽电压的方法

    公开(公告)号:US20050194355A1

    公开(公告)日:2005-09-08

    申请号:US11109921

    申请日:2005-04-19

    摘要: An apparatus and method for adjusting the voltage applied to a Faraday shield of an inductively coupled plasma etching apparatus is provided. An appropriate voltage is easily and variably applied to a Faraday shield such that sputtering of a plasma can be controlled to prevent and mitigate deposition of non-volatile reaction products that adversely affect an etching process. The appropriate voltage for a particular etching process or step is applied to the Faraday shield by simply adjusting a tuning capacitor. It is not necessary to mechanically reconfigure the etching apparatus to adjust the Faraday shield voltage.

    摘要翻译: 提供了一种用于调整施加到电感耦合等离子体蚀刻装置的法拉第屏蔽的电压的装置和方法。 适当的电压容易且可变地施加到法拉第屏蔽,使得可以控制等离子体的溅射以防止和减轻不利地影响蚀刻工艺的非挥发性反应产物的沉积。 通过简单地调整调谐电容器,将特定蚀刻工艺或步骤的适当电压施加到法拉第屏蔽。 不需要机械地重新配置蚀刻装置来调节法拉第屏蔽电压。

    Arrangements for manipulating plasma confinement within a plasma processing system and methods thereof
    10.
    发明授权
    Arrangements for manipulating plasma confinement within a plasma processing system and methods thereof 有权
    在等离子体处理系统中操纵等离子体约束的布置及其方法

    公开(公告)号:US09275838B2

    公开(公告)日:2016-03-01

    申请号:US12552474

    申请日:2009-09-02

    IPC分类号: H01J37/32

    摘要: An arrangement for controlling bevel etch rate during plasma processing within a processing chamber. The arrangement includes a power source and a gas distribution system. The arrangement also includes a lower electrode, which is configured at least for supporting a substrate. The arrangement further includes a top ring electrode positioned above the substrate and a bottom ring electrode positioned below the substrate. The arrangement yet also includes a first match arrangement coupled to the top ring electrode and configured at least for controlling current flowing through the top ring electrode to control amount of plasma available for etching at least a part of the substrate top edge. The arrangement yet further includes a second match arrangement configured to control the current flowing through the bottom ring electrode to control amount of plasma available for at least etching at least a part of the substrate bottom edge.

    摘要翻译: 一种用于在处理室内的等离子体处理期间控制斜面蚀刻速率的装置。 该装置包括电源和气体分配系统。 该布置还包括下电极,其被配置为至少用于支撑衬底。 该布置还包括位于基板上方的顶环电极和位于基板下方的底环电极。 该布置还包括耦合到顶环电极并且被配置为至少用于控制流过顶环电极的电流以控制可用于蚀刻衬底顶部边缘的至少一部分的等离子体的第一匹配布置。 该装置还包括第二匹配装置,其被配置为控制流过底环电极的电流以控制可用于至少蚀刻至少一部分衬底底边缘的等离子体的量。