公开(公告)号：US20090098720A1

公开(公告)日：2009-04-16

申请号：US12334589

申请日：2008-12-15

申请人： Atsuo ISOBE ,  Satoshi MURAKAMI ,  Tamae TAKANO ,  Shunpei YAMAZAKI

发明人： Atsuo ISOBE ,  Satoshi MURAKAMI ,  Tamae TAKANO ,  Shunpei YAMAZAKI

IPC分类号： H01L21/28 ,  H01L21/31

CPC分类号： H01L29/66757 ,  H01L27/12 ,  H01L27/1248 ,  H01L29/42384

摘要： A manufacturing method of a semiconductor device of the present invention includes the steps of forming a first insulating film over a substrate, forming a semiconductor film over the first insulating film, oxidizing or nitriding the semiconductor film by conducting a plasma treatment to the semiconductor film under a condition of an electron density of 1×1011 cm−3 or more and 1×1013 cm−3 or less and an electron temperature of 0.5 eV or more and 1.5 eV or less, using a high frequency wave, forming a second insulating film to cover the semiconductor film, forming a gate electrode over the second insulating film, forming a third insulating film to cover the gate electrode, and forming a conductive film over the third insulating film.

摘要翻译： 本发明的半导体器件的制造方法包括以下步骤：在衬底上形成第一绝缘膜，在第一绝缘膜上形成半导体膜，通过对半导体膜进行等离子体处理来对半导体膜进行氧化或氮化 使用高频波，电子密度为1×10 11 cm -3以上且1×10 13 cm -3以下，电子温度为0.5eV以上且1.5eV以下的条件，形成覆盖半导体的第2绝缘膜 在所述第二绝缘膜上形成栅电极，形成第三绝缘膜以覆盖所述栅电极，以及在所述第三绝缘膜上形成导电膜。

公开(公告)号：US20110031561A1

公开(公告)日：2011-02-10

申请号：US12909393

申请日：2010-10-21

申请人： Tamae TAKANO ,  Atsuo ISOBE

发明人： Tamae TAKANO ,  Atsuo ISOBE

IPC分类号： H01L29/786

CPC分类号： H01L29/78606 ,  H01L27/1214 ,  H01L27/1266 ,  H01L27/13 ,  H01L29/0603 ,  H01L29/78609 ,  H01L29/78636

摘要： The present invention provides a semiconductor device which suppresses a short circuit and a leakage current between a semiconductor film and a gate electrode generated by a break or thin thickness of a gate insulating film in an end portion of a channel region of the semiconductor film, and the manufacturing method of the semiconductor device. Plural thin film transistors which each have semiconductor film provided over a substrate continuously, conductive films provided over the semiconductor film through a gate insulating film, source and drain regions provided in the semiconductor film which are not overlapped with the conductive films, and channel regions provided in the semiconductor film existing under the conductive films and between the source and drain regions. And impurity regions provided in the semiconductor film which is not overlapped with the conductive film and provided adjacent to the source and drain regions. Further, the conductive films are provided over the channel regions and regions of the semiconductor film which are provided adjacent to the channel regions.

摘要翻译： 本发明提供一种半导体器件，其抑制由半导体膜的沟道区域的端部中的栅极绝缘膜的断裂或薄的厚度产生的半导体膜和栅电极之间的短路和漏电流，以及 半导体器件的制造方法。 连续地设置在基板上的半导体膜的多个薄膜晶体管，通过栅极绝缘膜设置在半导体膜上的导电膜，设置在半导体膜中的不与导电膜重叠的源区和漏区，以及设置的沟道区 在存在于导电膜之下以及源极和漏极区之间的半导体膜中。 以及设置在半导体膜中的不与导电膜重叠并且设置在源极和漏极区附近的杂质区。 此外，导电膜设置在与沟道区相邻设置的半导体膜的沟道区域和区域之上。

公开(公告)号：US20100187524A1

公开(公告)日：2010-07-29

申请号：US12751300

申请日：2010-03-31

申请人： Atsuo ISOBE ,  Tamae TAKANO ,  Yasuyuki ARAI ,  Fumiko TERASAWA

发明人： Atsuo ISOBE ,  Tamae TAKANO ,  Yasuyuki ARAI ,  Fumiko TERASAWA

IPC分类号： H01L29/786 ,  H01L29/12 ,  H01L29/788

CPC分类号： H01L27/12 ,  H01L21/84 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524

摘要： A manufacturing method of a semiconductor device of the present invention includes the steps of forming a stacked body in which a semiconductor film, a gate insulating film, and a first conductive film are sequentially stacked over a substrate; selectively removing the stacked body to form a plurality of island-shaped stacked bodies; forming an insulating film to cover the plurality of island-shaped stacked bodies; removing a part of the insulating film to expose a surface of the first conductive film, such that a surface of the first conductive film almost coextensive with a height of the insulating film; forming a second conductive film over the first conductive film and a left part of the insulating film; forming a resist over the second conductive film; selectively removing the first conductive film and the second conductive film using the resist as a mask.

摘要翻译： 本发明的半导体器件的制造方法包括以下步骤：在衬底上依次层叠有半导体膜，栅极绝缘膜和第一导电膜的层叠体; 选择性地去除层叠体以形成多个岛状堆叠体; 形成绝缘膜以覆盖所述多个岛状堆叠体; 去除绝缘膜的一部分以暴露第一导电膜的表面，使得第一导电膜的表面几乎与绝缘膜的高度共同延伸; 在所述第一导电膜和所述绝缘膜的左部分上形成第二导电膜; 在所述第二导电膜上形成抗蚀剂; 使用抗蚀剂作为掩模选择性地去除第一导电膜和第二导电膜。

公开(公告)号：US20130075721A1

公开(公告)日：2013-03-28

申请号：US13613178

申请日：2012-09-13

申请人： Shunpei YAMAZAKI ,  Atsuo ISOBE ,  Toshinari SASAKI

发明人： Shunpei YAMAZAKI ,  Atsuo ISOBE ,  Toshinari SASAKI

IPC分类号： H01L29/12

CPC分类号： H01L29/7869 ,  H01L27/12 ,  H01L27/1225 ,  H01L29/10 ,  H01L29/41733 ,  H01L29/41775

摘要： Provided is a semiconductor device including a transistor with large on-state current even when it is miniaturized. The transistor includes a pair of first conductive films over an insulating surface; a semiconductor film over the pair of first conductive films; a pair of second conductive films, with one of the pair of second conductive films and the other of the pair of second conductive films being connected to one of the pair of first conductive films and the other of the pair of first conductive films, respectively; an insulating film over the semiconductor film; and a third conductive film provided in a position overlapping with the semiconductor film over the insulating film. Further, over the semiconductor film, the third conductive film is interposed between the pair of second conductive films and away from the pair of second conductive films.

摘要翻译： 提供了即使在小型化时也具有大导通状态的晶体管的半导体装置。 晶体管包括在绝缘表面上的一对第一导电膜; 在一对第一导电膜上的半导体膜; 一对第二导电膜，其中一对第二导电膜中的一个和一对第二导电膜中的另一个分别连接到一对第一导电膜中的一个和一对第一导电膜中的另一个; 半导体膜上的绝缘膜; 以及设置在与绝缘膜上的半导体膜重叠的位置的第三导电膜。 此外，在半导体膜之上，第三导电膜插入在一对第二导电膜之间并远离一对第二导电膜。

公开(公告)号：US20080179675A1

公开(公告)日：2008-07-31

申请号：US12015362

申请日：2008-01-16

申请人： Shunpei YAMAZAKI ,  Atsuo ISOBE ,  Hiromichi GODO

发明人： Shunpei YAMAZAKI ,  Atsuo ISOBE ,  Hiromichi GODO

IPC分类号： H01L27/12 ,  H01L21/782

CPC分类号： H01L29/78621 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78618 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device having a novel structure by which the operating characteristics and reliability are improved and a manufacturing method thereof. An island-shaped semiconductor layer provided over a substrate, including a channel formation region provided between a pair of impurity regions; a first insulating layer provided so as to be in contact with the side surface of the semiconductor layer; a gate electrode provided over the channel formation region so as to get across the semiconductor layer; and a second insulating layer provided between the channel formation region and the gate electrode are included. The semiconductor layer is locally thinned, the channel formation region is provided in the thinned region, and the second insulating layer covers the first insulating layer provided on the side surface of the semiconductor layer at least in the region which overlaps with the gate electrode.

摘要翻译： 具有改善其操作特性和可靠性的新颖结构的半导体器件及其制造方法。 一种岛状半导体层，设置在衬底上，包括设置在一对杂质区之间的沟道形成区; 设置成与半导体层的侧表面接触的第一绝缘层; 栅电极，设置在所述沟道形成区上方以穿过所述半导体层; 并且包括设置在沟道形成区域和栅电极之间的第二绝缘层。 半导体层被局部变薄，沟道形成区域设置在减薄区域中，并且第二绝缘层至少在与栅电极重叠的区域中覆盖设置在半导体层的侧表面上的第一绝缘层。

公开(公告)号：US20130069053A1

公开(公告)日：2013-03-21

申请号：US13608039

申请日：2012-09-10

申请人： Shunpei YAMAZAKI ,  Atsuo ISOBE ,  Toshinari SASAKI

发明人： Shunpei YAMAZAKI ,  Atsuo ISOBE ,  Toshinari SASAKI

IPC分类号： H01L29/786

CPC分类号： H01L29/7869 ,  H01L27/1218 ,  H01L27/1225

摘要： To provide a transistor which includes an oxide semiconductor and is capable of operating at high speed or a highly reliable semiconductor device including the transistor, a transistor in which an oxide semiconductor layer including a pair of low-resistance regions and a channel formation region is provided over an electrode layer, which is embedded in a base insulating layer and whose upper surface is at least partly exposed from the base insulating layer, and a wiring layer provided above the oxide semiconductor layer is electrically connected to the electrode layer or a part of a low-resistance region of the oxide semiconductor layer, which overlaps with the electrode layer.

公开(公告)号：US20120286270A1

公开(公告)日：2012-11-15

申请号：US13463092

申请日：2012-05-03

申请人： Atsuo ISOBE ,  Toshinari SASAKI ,  Junichi KOEZUKA ,  Shunpei YAMAZAKI

发明人： Atsuo ISOBE ,  Toshinari SASAKI ,  Junichi KOEZUKA ,  Shunpei YAMAZAKI

IPC分类号： H01L29/786 ,  H01L21/336

CPC分类号： H01L29/4238 ,  H01L21/02565 ,  H01L21/265 ,  H01L21/425 ,  H01L21/84 ,  H01L27/1085 ,  H01L27/10876 ,  H01L27/1156 ,  H01L27/1203 ,  H01L27/1225 ,  H01L28/40 ,  H01L29/045 ,  H01L29/0847 ,  H01L29/66477 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/7869 ,  H01L29/78693

摘要： It is an object to provide a semiconductor device in which a short-channel effect is suppressed and miniaturization is achieved, and a manufacturing method thereof. A trench is formed in an insulating layer and impurities are added to an oxide semiconductor film in contact with an upper end corner portion of the trench, whereby a source region and a drain region are formed. With the above structure, miniaturization can be achieved. Further, with the trench, a short-channel effect can be suppressed setting the depth of the trench as appropriate even when a distance between a source electrode layer and a drain electrode layer is shortened.

摘要翻译： 本发明的目的是提供一种抑制短路效应并实现小型化的半导体器件及其制造方法。 在绝缘层中形成沟槽，并且将杂质添加到与沟槽的上端角部接触的氧化物半导体膜，由此形成源极区域和漏极区域。 利用上述结构，可以实现小型化。 此外，利用沟槽，即使当源电极层和漏电极层之间的距离缩短时，也可以适当地抑制沟槽的深度适当地设定短沟道效应。

公开(公告)号：US20100029068A1

公开(公告)日：2010-02-04

申请号：US12533401

申请日：2009-07-31

申请人： Atsuo ISOBE ,  Shunpei YAMAZAKI ,  Koji DAIRIKI ,  Hiroshi SHIBATA ,  Chiho KOKUBO ,  Tatsuya ARAO ,  Masahiko HAYAKAWA ,  Hidekazu MIYAIRI ,  Akihisa SHIMOMURA ,  Koichiro TANAKA ,  Mai AKIBA

发明人： Atsuo ISOBE ,  Shunpei YAMAZAKI ,  Koji DAIRIKI ,  Hiroshi SHIBATA ,  Chiho KOKUBO ,  Tatsuya ARAO ,  Masahiko HAYAKAWA ,  Hidekazu MIYAIRI ,  Akihisa SHIMOMURA ,  Koichiro TANAKA ,  Mai AKIBA

IPC分类号： H01L21/311 ,  H01L21/20

CPC分类号： H01L27/1222 ,  B23K26/0738 ,  H01L21/02354 ,  H01L21/02356 ,  H01L21/02675 ,  H01L21/02683 ,  H01L21/02686 ,  H01L21/02691 ,  H01L21/2026 ,  H01L21/32139 ,  H01L21/84 ,  H01L27/1214 ,  H01L27/1218 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/1274 ,  H01L27/1281 ,  H01L27/1296 ,  H01L29/66757 ,  H01L29/78603 ,  H01L29/78675 ,  H01L29/78696 ,  Y10S118/90 ,  Y10T117/10 ,  Y10T117/1004 ,  Y10T117/1008

摘要： A semiconductor device production system using a laser crystallization method is provided which can avoid forming grain boundaries in a channel formation region of a TFT, thereby preventing grain boundaries from lowering the mobility of the TFT greatly, from lowering ON current, and from increasing OFF current. Rectangular or stripe pattern depression and projection portions are formed on an insulating film. A semiconductor film is formed on the insulating film. The semiconductor film is irradiated with continuous wave laser light by running the laser light along the stripe pattern depression and projection portions of the insulating film or along the major or minor axis direction of the rectangle. Although continuous wave laser light is most preferred among laser light, it is also possible to use pulse oscillation laser light in irradiating the semiconductor film.

摘要翻译： 提供了一种使用激光晶化方法的半导体器件制造系统，其可以避免在TFT的沟道形成区域中形成晶界，从而防止晶界大大降低TFT的迁移率，降低导通电流，并且提高截止电流 。 在绝缘膜上形成矩形或条纹图案凹陷和突出部分。 在绝缘膜上形成半导体膜。 通过沿着条形图案凹陷和绝缘膜的突出部分沿着矩形的长轴或短轴方向运行激光来对连续波激光照射半导体膜。 尽管在激光中最优选连续波激光，但也可以在照射半导体膜时使用脉冲振荡激光。

公开(公告)号：US20130075722A1

公开(公告)日：2013-03-28

申请号：US13613192

申请日：2012-09-13

申请人： Shunpei YAMAZAKI ,  Atsuo ISOBE ,  Yutaka OKAZAKI ,  Takehisa HATANO ,  Sachiaki TEZUKA ,  Suguru HONDO ,  Toshihiko SAITO

发明人： Shunpei YAMAZAKI ,  Atsuo ISOBE ,  Yutaka OKAZAKI ,  Takehisa HATANO ,  Sachiaki TEZUKA ,  Suguru HONDO ,  Toshihiko SAITO

IPC分类号： H01L29/786

CPC分类号： H01L29/41733 ,  H01L29/42384 ,  H01L29/78618 ,  H01L29/7869

摘要： A highly reliable structure for high-speed response and high-speed driving of a semiconductor device, in which on-state characteristics of a transistor are increased is provided. In the coplanar transistor, an oxide semiconductor layer, a source and drain electrode layers including a stack of a first conductive layer and a second conductive layer, a gate insulating layer, and a gate electrode layer are sequentially stacked in this order. The gate electrode layer is overlapped with the first conductive layer with the gate insulating layer provided therebetween, and is not overlapped with the second conductive layer with the gate insulating layer provided therebetween.

摘要翻译： 提供了一种用于高速响应和高速驱动半导体器件的高度可靠的结构，其中晶体管的导通状态特性增加。 在共面晶体管中，依次层叠氧化物半导体层，包括第一导电层和第二导电层的堆叠的源极和漏极电极层，栅极绝缘层和栅极电极层。 栅极电极层与第一导电层重叠，栅极绝缘层设置在它们之间，并且与其间设置有栅极绝缘层的第二导电层不重叠。

公开(公告)号：US20100237354A1

公开(公告)日：2010-09-23

申请号：US12794120

申请日：2010-06-04

申请人： Yoshiaki YAMAMOTO ,  Koichiro TANAKA ,  Atsuo ISOBE ,  Daisuke OHGARANE ,  Shunpei YAMAZAKI

发明人： Yoshiaki YAMAMOTO ,  Koichiro TANAKA ,  Atsuo ISOBE ,  Daisuke OHGARANE ,  Shunpei YAMAZAKI

IPC分类号： H01L29/786

CPC分类号： H01L21/6835 ,  H01L21/02532 ,  H01L21/02683 ,  H01L21/02691 ,  H01L21/84 ,  H01L23/544 ,  H01L24/29 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L27/12 ,  H01L29/78603 ,  H01L29/78648 ,  H01L2221/6835 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/6677 ,  H01L2224/16 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48464 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/838 ,  H01L2224/85 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/0106 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01077 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/10253 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01Q1/38 ,  H01Q9/285 ,  H01Q23/00 ,  Y10S438/982 ,  H01L2924/00 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： It is an object of the present invention to provide a method of separating a thin film transistor, and circuit or a semiconductor device including the thin film transistor from a substrate by a method different from that disclosed in the patent document 1 and transposing the thin film transistor, and the circuit or the semiconductor device to a substrate having flexibility. According to the present invention, a large opening or a plurality of openings is formed at an insulating film, a conductive film connected to a thin film transistor is formed at the opening, and a peeling layer is removed, then, a layer having the thin film transistor is transposed to a substrate provided with a conductive film or the like. A thin film transistor according to the present invention has a semiconductor film which is crystallized by laser irradiation and prevents a peeling layer from exposing at laser irradiation not to be irradiated with laser light.

摘要翻译： 本发明的目的是提供一种通过与专利文献1中公开的方法不同的方法从衬底分离薄膜晶体管和包括薄膜晶体管的电路或半导体器件的方法，并且将薄膜 晶体管，以及电路或半导体器件到具有柔性的衬底。 根据本发明，在绝缘膜上形成大的开口或多个开口，在开口处形成连接到薄膜晶体管的导电膜，并且去除剥离层，然后，将具有薄的 薄膜晶体管转置到具有导电膜等的基板上。 根据本发明的薄膜晶体管具有通过激光照射而结晶的半导体膜，并且防止剥离层在不被激光照射的激光照射下曝光。