SEMICONDUCTOR DEVICE
    1.
    发明申请

    公开(公告)号:US20130069053A1

    公开(公告)日:2013-03-21

    申请号:US13608039

    申请日:2012-09-10

    IPC分类号: H01L29/786

    摘要: To provide a transistor which includes an oxide semiconductor and is capable of operating at high speed or a highly reliable semiconductor device including the transistor, a transistor in which an oxide semiconductor layer including a pair of low-resistance regions and a channel formation region is provided over an electrode layer, which is embedded in a base insulating layer and whose upper surface is at least partly exposed from the base insulating layer, and a wiring layer provided above the oxide semiconductor layer is electrically connected to the electrode layer or a part of a low-resistance region of the oxide semiconductor layer, which overlaps with the electrode layer.

    SEMICONDUCTOR DEVICE
    3.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号:US20130075721A1

    公开(公告)日:2013-03-28

    申请号:US13613178

    申请日:2012-09-13

    IPC分类号: H01L29/12

    摘要: Provided is a semiconductor device including a transistor with large on-state current even when it is miniaturized. The transistor includes a pair of first conductive films over an insulating surface; a semiconductor film over the pair of first conductive films; a pair of second conductive films, with one of the pair of second conductive films and the other of the pair of second conductive films being connected to one of the pair of first conductive films and the other of the pair of first conductive films, respectively; an insulating film over the semiconductor film; and a third conductive film provided in a position overlapping with the semiconductor film over the insulating film. Further, over the semiconductor film, the third conductive film is interposed between the pair of second conductive films and away from the pair of second conductive films.

    摘要翻译: 提供了即使在小型化时也具有大导通状态的晶体管的半导体装置。 晶体管包括在绝缘表面上的一对第一导电膜; 在一对第一导电膜上的半导体膜; 一对第二导电膜,其中一对第二导电膜中的一个和一对第二导电膜中的另一个分别连接到一对第一导电膜中的一个和一对第一导电膜中的另一个; 半导体膜上的绝缘膜; 以及设置在与绝缘膜上的半导体膜重叠的位置的第三导电膜。 此外,在半导体膜之上,第三导电膜插入在一对第二导电膜之间并远离一对第二导电膜。

    SEMICONDUCTOR DEVICE
    6.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号:US20120032236A1

    公开(公告)日:2012-02-09

    申请号:US13277489

    申请日:2011-10-20

    IPC分类号: H01L27/092

    摘要: An object is to realize high performance and low power consumption in a semiconductor device having an SOI structure. In addition, another object is to provide a semiconductor device having a high performance semiconductor element which is more highly integrated. A semiconductor device is such that a plurality of n-channel field-effect transistors and p-channel field-effect transistors are stacked with an interlayer insulating layer interposed therebetween over a substrate having an insulating surface. By controlling a distortion caused to a semiconductor layer due to an insulating film having a stress, a plane orientation of the semiconductor layer, and a crystal axis in a channel length direction, difference in mobility between the n-channel field-effect transistor and the p-channel field-effect transistor can be reduced, whereby current driving capabilities and response speeds of the n-channel field-effect transistor and the p-channel field-effect can be comparable.

    摘要翻译: 目的是在具有SOI结构的半导体器件中实现高性能和低功耗。 此外,另一个目的是提供一种具有更高集成度的高性能半导体元件的半导体器件。 半导体器件使得多个n沟道场效应晶体管和p沟道场效应晶体管层叠在其间具有绝缘表面的衬底之间的层间绝缘层。 通过控制由于具有应力的绝缘膜,半导体层的平面取向和沟道长度方向的晶轴引起的半导体层的失真,n沟道场效应晶体管和 可以减小p沟道场效应晶体管,由此n沟道场效应晶体管的电流驱动能力和响应速度与p沟道场效应相当。

    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
    8.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号:US20090098720A1

    公开(公告)日:2009-04-16

    申请号:US12334589

    申请日:2008-12-15

    IPC分类号: H01L21/28 H01L21/31

    摘要: A manufacturing method of a semiconductor device of the present invention includes the steps of forming a first insulating film over a substrate, forming a semiconductor film over the first insulating film, oxidizing or nitriding the semiconductor film by conducting a plasma treatment to the semiconductor film under a condition of an electron density of 1×1011 cm−3 or more and 1×1013 cm−3 or less and an electron temperature of 0.5 eV or more and 1.5 eV or less, using a high frequency wave, forming a second insulating film to cover the semiconductor film, forming a gate electrode over the second insulating film, forming a third insulating film to cover the gate electrode, and forming a conductive film over the third insulating film.

    摘要翻译: 本发明的半导体器件的制造方法包括以下步骤:在衬底上形成第一绝缘膜,在第一绝缘膜上形成半导体膜,通过对半导体膜进行等离子体处理来对半导体膜进行氧化或氮化 使用高频波,电子密度为1×10 11 cm -3以上且1×10 13 cm -3以下,电子温度为0.5eV以上且1.5eV以下的条件,形成覆盖半导体的第2绝缘膜 在所述第二绝缘膜上形成栅电极,形成第三绝缘膜以覆盖所述栅电极,以及在所述第三绝缘膜上形成导电膜。

    SEMICONDUCTOR DEVICE
    9.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开
    半导体器件

    公开(公告)号:US20130075722A1

    公开(公告)日:2013-03-28

    申请号:US13613192

    申请日:2012-09-13

    IPC分类号: H01L29/786

    摘要: A highly reliable structure for high-speed response and high-speed driving of a semiconductor device, in which on-state characteristics of a transistor are increased is provided. In the coplanar transistor, an oxide semiconductor layer, a source and drain electrode layers including a stack of a first conductive layer and a second conductive layer, a gate insulating layer, and a gate electrode layer are sequentially stacked in this order. The gate electrode layer is overlapped with the first conductive layer with the gate insulating layer provided therebetween, and is not overlapped with the second conductive layer with the gate insulating layer provided therebetween.

    摘要翻译: 提供了一种用于高速响应和高速驱动半导体器件的高度可靠的结构,其中晶体管的导通状态特性增加。 在共面晶体管中,依次层叠氧化物半导体层,包括第一导电层和第二导电层的堆叠的源极和漏极电极层,栅极绝缘层和栅极电极层。 栅极电极层与第一导电层重叠,栅极绝缘层设置在它们之间,并且与其间设置有栅极绝缘层的第二导电层不重叠。