公开(公告)号：US20060088997A1

公开(公告)日：2006-04-27

申请号：US10904138

申请日：2004-10-26

申请人： Benjamin Fasano ,  Richard Indyk ,  Kevin Prettyman

发明人： Benjamin Fasano ,  Richard Indyk ,  Kevin Prettyman

IPC分类号： H01L21/4763

CPC分类号： G01R31/2886 ,  G01R1/0466 ,  H01L21/486 ,  H01L21/6835

摘要： The present invention provides a method for producing a temporary chip carrier for semiconductor chip burn-in test and speed sorting. A multi-layered substrate or card, usually comprised of one of various materials is made by offsetting the conductor-filled vias or holes in the outer few layers with the outer most layer not being filled with a conductor, such that a partially filled via or hole is produced. This effectively produces a smaller surface conductor feature, on which the semiconductor chip is temporarily attached, electrically tested, and subsequently removed using various methods, at forces much lower than normal chip removal processes require.

摘要翻译： 本发明提供一种用于制造用于半导体芯片老化测试和速度分选的临时芯片载体的方法。 通常由各种材料中的一种构成的多层基板或卡通过抵消外部几层中的导体填充的通孔或孔，其中最外层未填充有导体，从而使部分填充的通孔或 产生孔。 这有效地产生较小的表面导体特征，半导体芯片暂时附着，电学测试，并随后使用各种方法，以比正常的芯片去除工艺要求低得多的力除去。

公开(公告)号：US20060014309A1

公开(公告)日：2006-01-19

申请号：US10891542

申请日：2004-07-13

申请人： Krishna Sachdev ,  Daniel Berger ,  Kelly Chioujones ,  Richard Indyk

发明人： Krishna Sachdev ,  Daniel Berger ,  Kelly Chioujones ,  Richard Indyk

IPC分类号： G01R31/26 ,  H01L21/66

CPC分类号： G01R1/0466 ,  G01R1/0483 ,  G01R31/2863 ,  H01L24/81 ,  H01L2224/16225 ,  H01L2224/73253 ,  H01L2224/81801 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01025 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/10253 ,  H05K3/321 ,  H01L2924/00 ,  H01L2224/0401

摘要： A method for temporary chip attach to determine known good die using a reworkable conductive adhesive interconnection between the chip carrier and die. The die is easily separated from the chip carrier after test, without the use of potentially damaging shear forces, by subjecting the TCA assembly to a rework solution.

摘要翻译： 一种临时芯片连接的方法，用于使用芯片载体和芯片之间的可再加工的导电粘合剂互连来确定已知的良好的裸片。 通过使TCA组件经受返工解决方案，模具在测试后容易地与芯片载体分离，而不会使用潜在的有害的剪切力。

公开(公告)号：US07294909B2

公开(公告)日：2007-11-13

申请号：US11099161

申请日：2005-04-05

申请人： Jon A. Casey ,  James G. Balz ,  Michael Berger ,  Jerome Cohen ,  Charles Hendricks ,  Richard Indyk ,  Mark LaPlante ,  David C. Long ,  Lori A. Maiorino ,  Arthur G. Merryman ,  Glenn A. Pomerantz ,  Robert A. Rita ,  Krystyna W. Semkow ,  Patrick E. Spencer ,  Brian R. Sundlof ,  Richard P. Surprenant ,  Donald R. Wall ,  Thomas A. Wassick ,  Kathleen M. Wiley

发明人： Jon A. Casey ,  James G. Balz ,  Michael Berger ,  Jerome Cohen ,  Charles Hendricks ,  Richard Indyk ,  Mark LaPlante ,  David C. Long ,  Lori A. Maiorino ,  Arthur G. Merryman ,  Glenn A. Pomerantz ,  Robert A. Rita ,  Krystyna W. Semkow ,  Patrick E. Spencer ,  Brian R. Sundlof ,  Richard P. Surprenant ,  Donald R. Wall ,  Thomas A. Wassick ,  Kathleen M. Wiley

IPC分类号： H01L27/148 ,  H01L29/768

CPC分类号： H05K3/225 ,  H01L21/4846 ,  H01L23/49811 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H05K1/0306 ,  H05K3/0029 ,  H05K3/4629 ,  H05K2203/173 ,  Y10T29/49124 ,  Y10T29/49135 ,  H01L2924/00

摘要： A multilayer ceramic repair process which provides a new electrical repair path to connect top surface vias. The repair path is established between a defective net and a redundant repair net contained within the multilayer ceramic substrate. The defective net and the repair net each terminate at surface vias of the substrate. A laser is used to form post fired circuitry on and in the substrate. This is followed by the electrical isolation of the defective net from the electrical repair structure and passivation of the electrical repair line.

摘要翻译： 一种多层陶瓷修复工艺，提供了一个新的电气修复路径，以连接顶面通孔。 修复路径是建立在有缺陷的网和包含在多层陶瓷基板内的冗余修复网之间。 有缺陷的网和修复网各自终止在基板的表面通孔处。 使用激光器在基板上和基板上形成点火电路。 之后是有缺陷的网络与电气修复结构的电气隔离和电气修复线路的钝化。

公开(公告)号：US20070099346A1

公开(公告)日：2007-05-03

申请号：US11163832

申请日：2005-11-01

申请人： Mukta Farooq ,  Thomas Lombardi ,  Julie Nadeau Filtreau ,  Scott Bradley ,  Claude Blais ,  Richard Indyk

发明人： Mukta Farooq ,  Thomas Lombardi ,  Julie Nadeau Filtreau ,  Scott Bradley ,  Claude Blais ,  Richard Indyk

IPC分类号： H01L21/00

CPC分类号： H01L21/563 ,  H01L2224/73203 ,  H01L2924/01078 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/00

摘要： Methods to reduce or eliminate the bleed out of underfill material. Surface treatments to selective areas on a chip carrier substrate surface create a non-wettable surface or a reduced wettability surface in the areas where the underfill should not flow. The substrate surface is subjected to surface treatments such as media blasting or chemical exposure which will roughen the exposed surface.

摘要翻译： 减少或消除底部填充材料渗出的方法。 在芯片载体基材表面上的选择性区域的表面处理在底部填充物不应流动的区域中产生不可润湿的表面或降低的润湿性表面。 对基材表面进行表面处理，例如介质喷涂或化学暴露，这将使暴露的表面变粗糙。

公开(公告)号：US20050176255A1

公开(公告)日：2005-08-11

申请号：US11099161

申请日：2005-04-05

申请人： Jon Casey ,  James Balz ,  Michael Berger ,  Jerome Cohen ,  Charles Hendricks ,  Richard Indyk ,  Mark LaPlante ,  David Long ,  Lori Maiorino ,  Arthur Merryman ,  Glenn Pomerantz ,  Robert Rita ,  Krystyna Semkow ,  Patrick Spencer ,  Brian Sundlof ,  Richard Surprenant ,  Donald Wall ,  Thomas Wassick ,  Kathleen Wiley

发明人： Jon Casey ,  James Balz ,  Michael Berger ,  Jerome Cohen ,  Charles Hendricks ,  Richard Indyk ,  Mark LaPlante ,  David Long ,  Lori Maiorino ,  Arthur Merryman ,  Glenn Pomerantz ,  Robert Rita ,  Krystyna Semkow ,  Patrick Spencer ,  Brian Sundlof ,  Richard Surprenant ,  Donald Wall ,  Thomas Wassick ,  Kathleen Wiley

IPC分类号： H05K3/46 ,  H01L21/48 ,  H01L23/12 ,  H01L23/498 ,  H05K1/03 ,  H05K3/00 ,  H05K3/22 ,  H01L21/311 ,  H01L21/00 ,  H01L21/302 ,  H01L21/461 ,  H01L29/745 ,  H01L29/76

CPC分类号： H05K3/225 ,  H01L21/4846 ,  H01L23/49811 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H05K1/0306 ,  H05K3/0029 ,  H05K3/4629 ,  H05K2203/173 ,  Y10T29/49124 ,  Y10T29/49135 ,  H01L2924/00

摘要： A multilayer ceramic repair process which provides a new electrical repair path to connect top surface vias. The repair path is established between a defective net and a redundant repair net contained within the multilayer ceramic substrate. The defective net and the repair net each terminate at surface vias of the substrate. A laser is used to form post fired circuitry on and in the substrate. This is followed by the electrical isolation of the defective net from the electrical repair structure and passivation of the electrical repair line.

公开(公告)号：US06916670B2

公开(公告)日：2005-07-12

申请号：US10358431

申请日：2003-02-04

申请人： Jon A. Casey ,  James G. Balz ,  Michael Berger ,  Jerome Cohen ,  Charles Hendricks ,  Richard Indyk ,  Mark LaPlante ,  David C. Long ,  Lori A. Maiorino ,  Arthur G. Merryman ,  Glenn A. Pomerantz ,  Robert A. Rita ,  Krystyna W. Semkow ,  Patrick E. Spencer ,  Brian R. Sundlof ,  Richard P. Surprenant ,  Donald R. Wall ,  Thomas A. Wassick ,  Kathleen M. Wiley

发明人： Jon A. Casey ,  James G. Balz ,  Michael Berger ,  Jerome Cohen ,  Charles Hendricks ,  Richard Indyk ,  Mark LaPlante ,  David C. Long ,  Lori A. Maiorino ,  Arthur G. Merryman ,  Glenn A. Pomerantz ,  Robert A. Rita ,  Krystyna W. Semkow ,  Patrick E. Spencer ,  Brian R. Sundlof ,  Richard P. Surprenant ,  Donald R. Wall ,  Thomas A. Wassick ,  Kathleen M. Wiley

IPC分类号： H05K3/46 ,  H01L21/48 ,  H01L23/12 ,  H01L23/498 ,  H05K1/03 ,  H05K3/00 ,  H05K3/22 ,  H01L21/00

CPC分类号： H05K3/225 ,  H01L21/4846 ,  H01L23/49811 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H05K1/0306 ,  H05K3/0029 ,  H05K3/4629 ,  H05K2203/173 ,  Y10T29/49124 ,  Y10T29/49135 ,  H01L2924/00

摘要： A multilayer ceramic repair process which provides a new electrical repair path to connect top surface vias. The repair path is established between a defective net and a redundant repair net contained within the multilayer ceramic substrate. The defective net and the repair net each terminate at surface vias of the substrate. A laser is used to form post fired circuitry on and in the substrate. This is followed by the electrical isolation of the defective net from the electrical repair structure and passivation of the electrical repair line.

摘要翻译： 一种多层陶瓷修复工艺，提供了一种新的电气修复路径，以连接顶部表面通孔。 修复路径是建立在有缺陷的网和包含在多层陶瓷基片内的冗余修复网之间。 有缺陷的网和修复网各自终止在基板的表面通孔处。 使用激光器在基板上和基板上形成点火电路。 之后是有缺陷的网络与电气修复结构的电气隔离和电气修复线路的钝化。

公开(公告)号：US20050037640A1

公开(公告)日：2005-02-17

申请号：US10604695

申请日：2003-08-11

申请人： Gaetano Messina ,  Patrick Coico ,  Lewis Goldmann ,  Richard Indyk ,  Vladimir Jambrih ,  Jeffrey Zitz

发明人： Gaetano Messina ,  Patrick Coico ,  Lewis Goldmann ,  Richard Indyk ,  Vladimir Jambrih ,  Jeffrey Zitz

IPC分类号： H01L21/50 ,  H05K1/00

CPC分类号： H01L21/50

摘要： A system and method to form a reworkable compression seal between an electronic module and a cap are disclosed. The system and method include an electronic module having a tapered edge configured on at least a portion of the edge defining a perimeter of the electronic module and the cap configured with an opening to receive the electronic module therein. A compression seal is disposed with the cap and is configured to surround one or more chips or other electronic components on the electronic module to form a seal between the electronic module and the cap. A plurality of side loaders are operably coupled to the cap and aligned to receive the tapered edge on the electronic module. Each side loader is configured to engage the tapered edge and provide sufficient compressive force to the compression seal disposed between the electronic module and the cap.

摘要翻译： 公开了一种在电子模块和盖子之间形成可再加工的压缩密封的系统和方法。 该系统和方法包括具有锥形边缘的电子模块，该锥形边缘被配置在限定电子模块的周边的边缘的至少一部分上，并且帽被配置有用于在其中接收电子模块的开口。 压缩密封件与盖一起设置并且被配置为围绕电子模块上的一个或多个芯片或其它电子部件，以在电子模块和盖之间形成密封。 多个侧装载器可操作地联接到盖并对准以接收电子模块上的锥形边缘。 每个侧装载器构造成接合锥形边缘并且向设置在电子模块和盖之间的压缩密封件提供足够的压缩力。