公开(公告)号：US06916670B2

公开(公告)日：2005-07-12

申请号：US10358431

申请日：2003-02-04

Applicant: Jon A. Casey ,  James G. Balz ,  Michael Berger ,  Jerome Cohen ,  Charles Hendricks ,  Richard Indyk ,  Mark LaPlante ,  David C. Long ,  Lori A. Maiorino ,  Arthur G. Merryman ,  Glenn A. Pomerantz ,  Robert A. Rita ,  Krystyna W. Semkow ,  Patrick E. Spencer ,  Brian R. Sundlof ,  Richard P. Surprenant ,  Donald R. Wall ,  Thomas A. Wassick ,  Kathleen M. Wiley

Inventor： Jon A. Casey ,  James G. Balz ,  Michael Berger ,  Jerome Cohen ,  Charles Hendricks ,  Richard Indyk ,  Mark LaPlante ,  David C. Long ,  Lori A. Maiorino ,  Arthur G. Merryman ,  Glenn A. Pomerantz ,  Robert A. Rita ,  Krystyna W. Semkow ,  Patrick E. Spencer ,  Brian R. Sundlof ,  Richard P. Surprenant ,  Donald R. Wall ,  Thomas A. Wassick ,  Kathleen M. Wiley

IPC: H05K3/46 ,  H01L21/48 ,  H01L23/12 ,  H01L23/498 ,  H05K1/03 ,  H05K3/00 ,  H05K3/22 ,  H01L21/00

CPC classification number: H05K3/225 ,  H01L21/4846 ,  H01L23/49811 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H05K1/0306 ,  H05K3/0029 ,  H05K3/4629 ,  H05K2203/173 ,  Y10T29/49124 ,  Y10T29/49135 ,  H01L2924/00

Abstract: A multilayer ceramic repair process which provides a new electrical repair path to connect top surface vias. The repair path is established between a defective net and a redundant repair net contained within the multilayer ceramic substrate. The defective net and the repair net each terminate at surface vias of the substrate. A laser is used to form post fired circuitry on and in the substrate. This is followed by the electrical isolation of the defective net from the electrical repair structure and passivation of the electrical repair line.

Abstract translation: 一种多层陶瓷修复工艺，提供了一种新的电气修复路径，以连接顶部表面通孔。 修复路径是建立在有缺陷的网和包含在多层陶瓷基片内的冗余修复网之间。 有缺陷的网和修复网各自终止在基板的表面通孔处。 使用激光器在基板上和基板上形成点火电路。 之后是有缺陷的网络与电气修复结构的电气隔离和电气修复线路的钝化。

公开(公告)号：US06823585B2

公开(公告)日：2004-11-30

申请号：US10249305

申请日：2003-03-28

Applicant: Mark J. LaPlante ,  Jon A. Casey ,  Thomas A. Wassick ,  David C. Long ,  Krystyna W. Semkow ,  Patrick E. Spencer ,  Robert A. Rita ,  Richard F. Indyk ,  Kathleen M. Wiley ,  Brian R. Sundlof ,  James Balz ,  Lori A. Maiorino ,  Donald R. Wall ,  Glenn A. Pomerantz

Inventor： Mark J. LaPlante ,  Jon A. Casey ,  Thomas A. Wassick ,  David C. Long ,  Krystyna W. Semkow ,  Patrick E. Spencer ,  Robert A. Rita ,  Richard F. Indyk ,  Kathleen M. Wiley ,  Brian R. Sundlof ,  James Balz ,  Lori A. Maiorino ,  Donald R. Wall ,  Glenn A. Pomerantz

IPC: H01R4300

CPC classification number: H05K3/242 ,  H05K1/0306 ,  H05K3/0035 ,  H05K3/048 ,  H05K3/184 ,  H05K3/225 ,  H05K2203/0191 ,  H05K2203/0264 ,  H05K2203/0574 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49158 ,  Y10T29/49163 ,  Y10T29/49165 ,  Y10T29/49171 ,  Y10T29/49172 ,  Y10T29/49721 ,  Y10T29/49732 ,  Y10T29/49737 ,  Y10T29/49746

Abstract: A method and structure to form surface plating metallization on a substrate. Two layers of tape are applied to the surface of the substrate. A first path is cut through both layers of tape exposing the substrate surface. The first path connects at least one conductive via on the top surface of the substrate. A second path is cut through the second layer of tape exposing the first layer of tape. The second path is routed from the first path to an edge of the substrate A seed layer is deposited over the surface of the second layer of tape thereby creating a seeded plating path in the first path and a sacrificial seeded conduction path in the second path. Connecting the sacrificial seeded conduction path to a plating potential at the edge of the substrate creates a plated path on the surface of the substrate. The sacrificial path is removed when the tape is removed.

Abstract translation: 在基板上形成表面电镀金属化的方法和结构。 将两层胶带施加到基材的表面。 通过暴露衬底表面的两层带切割第一路径。 第一路径在衬底的顶表面上连接至少一个导电通孔。 通过暴露第一层胶带的第二层胶带切割第二条路径。 第二路径从第一路径路由到衬底的边缘。种子层沉积在第二层带的表面上，从而在第一路径中形成种子电镀路径，并在第二路径中形成牺牲种子传导路径。 将牺牲种子传导路径连接到衬底边缘处的电镀电位在衬底的表面上产生电镀路径。 去除胶带时，去除牺牲路径。

公开(公告)号：US06430030B2

公开(公告)日：2002-08-06

申请号：US09770357

申请日：2001-01-26

Applicant: Mukta S. Farooq ,  Harvey C. Hamel ,  Robert A. Rita ,  Herbert I. Stoller

Inventor： Mukta S. Farooq ,  Harvey C. Hamel ,  Robert A. Rita ,  Herbert I. Stoller

IPC: H01G406

CPC classification number: H05K1/162 ,  H01G4/30 ,  H01L23/49827 ,  H01L23/50 ,  H01L2224/16225 ,  H01L2924/01019 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/19103 ,  H05K1/0306 ,  H05K1/115 ,  H05K2201/0187 ,  H05K2201/09581 ,  Y10T156/1056 ,  Y10T156/1057 ,  Y10T156/107

Abstract: A multi-layer ceramic capacitor and method of manufacturing the capacitor, the capacitor having signal vias surrounded by an area containing a material having a low dielectric constant, the via and surrounding area of low dielectric constant material inserted in a material having a high dielectric constant.

Abstract translation: 一种多层陶瓷电容器和制造该电容器的方法，该电容器具有由包含具有低介电常数的材料的区域包围的信号通孔，插入在具有高介电常数的材料中的低介电常数材料的通孔和周围区域 。

公开(公告)号：US06413339B1

公开(公告)日：2002-07-02

申请号：US09470457

申请日：1999-12-22

Applicant: Govindarajan Natarajan ,  Jon A. Casey ,  Martin E. Klepeis ,  John U. Knickerbocker ,  Srinivasa S. N. Reddy ,  Robert A. Rita ,  Subhash L. Shinde

Inventor： Govindarajan Natarajan ,  Jon A. Casey ,  Martin E. Klepeis ,  John U. Knickerbocker ,  Srinivasa S. N. Reddy ,  Robert A. Rita ,  Subhash L. Shinde

IPC: B32B3116

CPC classification number: C04B35/2683 ,  C04B35/64 ,  H01F1/0027 ,  H01F41/0253 ,  Y10T156/1056 ,  Y10T156/1057

Abstract: The present invention relates generally to a new metal/magnetic-ceramic laminate with through-holes and process thereof. More particularly, the invention encompasses a new process for fabrication of a large area ceramic laminate magnet with a significant number of holes, integrated metal plate(s) and co-sintered electrodes for electron and electron beam control. The present invention also relates to a magnetic matrix display (MMD), and electron beam source, and methods of manufacture thereof.

Abstract translation: 本发明一般涉及具有通孔的新的金属/磁陶瓷层压体及其工艺。 更具体地，本发明包括用于制造具有大量孔的大面积陶瓷层压体磁体的新方法，用于电子和电子束控制的集成金属板和共烧结电极。 本发明还涉及磁矩阵显示器（MMD）和电子束源，及其制造方法。

公开(公告)号：US5337475A

公开(公告)日：1994-08-16

申请号：US992091

申请日：1992-12-17

Applicant: Farid Y. Aoude ,  Emanuel I. Cooper ,  Peter R. Duncombe ,  Shaji Farooq ,  Edward A. Giess ,  Young-Ho Kim ,  Sarah H. Knickerbocker ,  Friedel Muller-Landau ,  Mark O. Neisser ,  Jae M. Park ,  Robert R. Shaw ,  Robert A. Rita ,  Thomas M. Shaw ,  Rao Vallabhaneni ,  Jon A. Van Hise ,  George F. Walker ,  Jungihl Kim ,  James M. Brownlow, deceased

Inventor： Farid Y. Aoude ,  Emanuel I. Cooper ,  Peter R. Duncombe ,  Shaji Farooq ,  Edward A. Giess ,  Young-Ho Kim ,  Sarah H. Knickerbocker ,  Friedel Muller-Landau ,  Mark O. Neisser ,  Jae M. Park ,  Robert R. Shaw ,  Robert A. Rita ,  Thomas M. Shaw ,  Rao Vallabhaneni ,  Jon A. Van Hise ,  George F. Walker ,  Jungihl Kim ,  James M. Brownlow, deceased

IPC: H01B1/16 ,  H01L21/48 ,  H01L23/498 ,  H05K1/03 ,  H05K1/09 ,  H05K3/46 ,  H01K3/10

CPC classification number: H05K1/092 ,  H01B1/16 ,  H01L21/486 ,  H01L21/4867 ,  H01L23/49883 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/0306 ,  H05K3/4611 ,  H05K3/4629 ,  Y10S428/901 ,  Y10T29/49147 ,  Y10T29/49165 ,  Y10T428/12472 ,  Y10T428/12556 ,  Y10T428/12604 ,  Y10T428/12611 ,  Y10T428/24322 ,  Y10T428/24802 ,  Y10T428/25 ,  Y10T428/251 ,  Y10T428/252 ,  Y10T428/2982 ,  Y10T428/2991

Abstract: Improved vie-filling compositions for producing conductive vias in circuitized ceramic substrates, particularly multi-layer substrates, without cracking and/or loss of hermetic sealing. The via-filling compositions comprise pastes containing a mixture of (a) ceramic and/or glass spheres of substantially- uniform diameter between about 0.5 and 6 .mu.m, (b) conductive metal particles or spheres having a maximum dimension or diameter between about 1/3 and 1/4 of the diameter of the ceramic and/or glass spheres, and (c) a binder vehicle. The formed conductive via bodies comprise a uniform conductive skeletal network of sintered metal particles densely packed within a uniform matrix of the co-sintered ceramic and/or glass spheres, which matrix is hermetically fused and integrated with ceramic layers forming the wall of the via in the ceramic circuit substrate.

Abstract translation: 用于在电路化陶瓷衬底，特别是多层衬底中产生导电通孔的改进的充填组合物，而不会破裂和/或损失气密密封。 通孔填充组合物包含含有（a）在约0.5至6μm之间具有基本均匀直径的陶瓷和/或玻璃球的混合物的浆料，（b）具有约1至约6μm的最大尺寸或直径的导电金属颗粒或球体 / 3和1/4的陶瓷和/或玻璃球的直径，和（c）粘合剂载体。 形成的导电通孔体包括致密地包裹在共烧结陶瓷和/或玻璃球的均匀基质内的烧结金属颗粒的均匀导电骨架网络，该基质被气密地融合并与形成通孔壁的陶瓷层成一体 陶瓷电路基板。

公开(公告)号：US07608295B2

公开(公告)日：2009-10-27

申请号：US11684679

申请日：2007-03-12

Applicant: Krishna G Sachdev ,  Michael Berger ,  Gregg Monjeau ,  Robert A. Rita ,  Kathleen M Wiley

Inventor： Krishna G Sachdev ,  Michael Berger ,  Gregg Monjeau ,  Robert A. Rita ,  Kathleen M Wiley

IPC: B05D7/00 ,  B32B43/00

CPC classification number: H05K3/386 ,  C03C17/32 ,  C04B41/009 ,  C04B41/488 ,  C04B41/83 ,  C04B2111/00844 ,  C08G73/10 ,  C08G73/1014 ,  C08G73/1017 ,  C08G73/1039 ,  C08G73/1042 ,  C08G73/1067 ,  C08G73/1075 ,  H01L21/4807 ,  H05K1/0306 ,  H05K3/225 ,  H05K2201/0154 ,  C04B41/455 ,  C04B35/00

Abstract: A method to repair ceramic substrates is disclosed using a novel polyimide polymer which has high thermal stability, resistance to fluxes and flux residue cleaning solvents and processes, good mechanical properties, good adhesion to all contacting surfaces with low moisture uptake and good flow properties suitable for repairing chipped ceramic, filling deep trench or vias and writing passivation lines with automated process The polyimide polymer is made by reacting aromatic dianhydride and aromatic diamine monomers with a stoichiometric offset and end capping the resulting polymer when the reaction is completed. The preferred polyimide is made using a molar excess of diamine which is end-capped using an anhydride.

Abstract translation: 公开了一种修复陶瓷基板的方法，该方法具有高热稳定性，耐焊剂和焊剂残留物清洗溶剂和工艺的良好的机械性能，对所有接触表面的良好粘合性，具有低吸湿性和良好的流动性能，适用于 修复切屑陶瓷，填充深沟或通孔，并用自动化工艺写入钝化线聚酰亚胺聚合物是通过使化学计量偏移的芳族二酐和芳族二胺单体反应制得的，并在反应完成时封端所得聚合物。 使用摩尔过量的二胺制成优选的聚酰亚胺，其使用酸酐封端。

公开(公告)号：US20080245467A1

公开(公告)日：2008-10-09

申请号：US12136236

申请日：2008-06-10

Applicant: Robert A. RITA

Inventor： Robert A. RITA

IPC: C03B29/00 ,  C03C3/085

CPC classification number: B32B17/061 ,  B32B7/12 ,  B32B15/04 ,  B32B17/06 ,  B32B18/00 ,  B32B37/06 ,  B32B37/10 ,  B32B2305/80 ,  B32B2309/025 ,  B32B2311/12 ,  B32B2315/02 ,  C03B19/06 ,  C03C10/0045 ,  C03C12/00 ,  C04B35/01 ,  C04B35/14 ,  C04B35/195 ,  C04B37/026 ,  C04B2235/3201 ,  C04B2235/3203 ,  C04B2235/3206 ,  C04B2235/3208 ,  C04B2235/3284 ,  C04B2235/3287 ,  C04B2235/3409 ,  C04B2235/3418 ,  C04B2235/3445 ,  C04B2235/36 ,  C04B2235/447 ,  C04B2235/6025 ,  C04B2235/656 ,  C04B2235/80 ,  C04B2235/9607 ,  C04B2237/125 ,  C04B2237/34 ,  C04B2237/341 ,  C04B2237/343 ,  C04B2237/40 ,  C04B2237/403 ,  C04B2237/405 ,  C04B2237/407 ,  C04B2237/408 ,  H01L23/15 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/0306 ,  H01L2924/00

Abstract: A glass-ceramic is provided having a thermal expansion coefficient in a range of 3-6 ppm/° C., a dielectric constant that is less than 5 and a Quality factor Q of at least 400. The glass-ceramic consists essentially of SiO2 in a range of 45-58 wt %, Al2O3 in a range of 10-18 wt % and MgO in a range of 10-25 wt %. A method of making the glass-ceramic is also provided. Further, an electronic package is also provided, including a base member and a glass-ceramic substrate bonded to the base member.

Abstract translation: 提供玻璃陶瓷，其热膨胀系数在3-6ppm /℃，介电常数小于5，质量因子Q至少为400.玻璃陶瓷基本上由SiO 在45-58重量％的范围内，在10-18重量％的范围内的Al 2 O 3 3＆lt; 2＆gt; 为10-25重量％。 还提供了制造玻璃陶瓷的方法。 此外，还提供了一种电子封装，其包括基底构件和粘结到基底构件的玻璃陶瓷基底。

公开(公告)号：US07387838B2

公开(公告)日：2008-06-17

申请号：US11084722

申请日：2005-03-18

Applicant: Robert A. Rita

Inventor： Robert A. Rita

IPC: B32B17/06 ,  C03C10/14 ,  C03C10/04

CPC classification number: B32B17/061 ,  B32B7/12 ,  B32B15/04 ,  B32B17/06 ,  B32B18/00 ,  B32B37/06 ,  B32B37/10 ,  B32B2305/80 ,  B32B2309/025 ,  B32B2311/12 ,  B32B2315/02 ,  C03B19/06 ,  C03C10/0045 ,  C03C12/00 ,  C04B35/01 ,  C04B35/14 ,  C04B35/195 ,  C04B37/026 ,  C04B2235/3201 ,  C04B2235/3203 ,  C04B2235/3206 ,  C04B2235/3208 ,  C04B2235/3284 ,  C04B2235/3287 ,  C04B2235/3409 ,  C04B2235/3418 ,  C04B2235/3445 ,  C04B2235/36 ,  C04B2235/447 ,  C04B2235/6025 ,  C04B2235/656 ,  C04B2235/80 ,  C04B2235/9607 ,  C04B2237/125 ,  C04B2237/34 ,  C04B2237/341 ,  C04B2237/343 ,  C04B2237/40 ,  C04B2237/403 ,  C04B2237/405 ,  C04B2237/407 ,  C04B2237/408 ,  H01L23/15 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/0306 ,  H01L2924/00

Abstract: A glass-ceramic is provided having a thermal expansion coefficient in a range of 3-6 ppm/° C., a dielectric constant that is less than 5 and a Quality factor Q of at least 400. The glass-ceramic consists essentially of SiO2 in a range of 45-58 wt %, Al2O3 in a range of 10-18 wt % and MgO in a range of 10-25 wt %. A method of making the glass-ceramic is also provided. Further, an electronic package is also provided, including a base member and a glass-ceramic substrate bonded to the base member.

Abstract translation: 提供玻璃陶瓷，其热膨胀系数在3-6ppm /℃，介电常数小于5，质量因数Q至少为400.玻璃陶瓷基本上由SiO 在45-58重量％的范围内，在10-18重量％的范围内的Al 2 O 3 3＆lt; 2＆gt; 为10-25重量％。 还提供了制造玻璃陶瓷的方法。 此外，还提供了一种电子封装，其包括基底构件和粘结到基底构件的玻璃陶瓷基底。

公开(公告)号：US07186461B2

公开(公告)日：2007-03-06

申请号：US11084718

申请日：2005-03-18

Applicant: Robert A. Rita

Inventor： Robert A. Rita

IPC: B32B17/06

CPC classification number: B32B17/061 ,  B32B7/12 ,  B32B15/04 ,  B32B17/06 ,  B32B18/00 ,  B32B2305/80 ,  B32B2311/12 ,  B32B2315/02 ,  C03C10/0045 ,  C03C12/00 ,  C04B35/01 ,  C04B35/18 ,  C04B35/195 ,  C04B37/026 ,  C04B2235/3206 ,  C04B2235/3208 ,  C04B2235/3213 ,  C04B2235/3215 ,  C04B2235/3217 ,  C04B2235/3222 ,  C04B2235/3284 ,  C04B2235/3409 ,  C04B2235/3418 ,  C04B2235/3445 ,  C04B2235/3481 ,  C04B2235/447 ,  C04B2235/6025 ,  C04B2235/80 ,  C04B2235/9607 ,  C04B2237/125 ,  C04B2237/34 ,  C04B2237/341 ,  C04B2237/403 ,  C04B2237/405 ,  C04B2237/407 ,  C04B2237/408 ,  H01L23/15 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/0306 ,  H01L2924/00

Abstract: A glass-ceramic is provided having a thermal expansion coefficient in a range of 4.0 to 8.5 ppm/° C., a dielectric constant in a range of 5–7 and a Quality factor Q of at least 400. The glass-ceramic consists essentially of SiO2 in a range of 40–55 wt %, Al2O3 in a range of 7–22 wt %, MgO in a range of 6 to less than 26 wt %, and at least one of BaO in an amount up to 35 wt %, SrO in an amount up to 37 wt % and ZnO in an amount up to 17 wt %. An electronic package is also provided, including one of a metal and sintered ceramic base member and a glass-ceramic substrate bonded to the base member.

Abstract translation: 玻璃陶瓷的热膨胀系数为4.0〜8.5ppm /℃，介电常数为5-7，质量系数Q为400以上。玻璃陶瓷基本上由 的SiO 2 2在40-55重量％的范围内，Al 2 O 3 O 3在7-22重量％的范围内，MgO在 6至小于26重量％的范围和至多35重量％的BaO中的至少一种，至多37重量％的SrO和至多17重量％的ZnO。 还提供了一种电子封装件，包括金属和烧结陶瓷基底构件中的一种以及粘合到基底构件的玻璃陶瓷基底。

公开(公告)号：US06475555B2

公开(公告)日：2002-11-05

申请号：US09429256

申请日：1999-10-29

Applicant: Jon A. Casey ,  Dinesh Gupta ,  Lester Wynn Herron ,  John U. Knickerbocker ,  David C. Long ,  Jawahar P. Nayak ,  Brenda L. Peterson ,  Robert A. Rita

Inventor： Jon A. Casey ,  Dinesh Gupta ,  Lester Wynn Herron ,  John U. Knickerbocker ,  David C. Long ,  Jawahar P. Nayak ,  Brenda L. Peterson ,  Robert A. Rita

IPC: B05D132

CPC classification number: H05K3/1233 ,  H01L21/4867 ,  H01L23/49883 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/092 ,  H05K3/227 ,  H05K2201/0116 ,  H05K2203/0783 ,  H01L2924/00

Abstract: A process wherein a low viscosity, metal-containing paste is screened onto a ceramic greensheet and then sets up to increase its viscosity. In one method, the low viscosity is caused by excess solvent which is then blotted or otherwise removed so that the viscosity of the paste is increased. In an alternative method, the low viscosity paste contains a cross-linking agent which causes the paste to increase its viscosity after screening.

Abstract translation: 一种方法，其中将低粘度的含金属浆料筛选到陶瓷毛坯上，然后设置以增加其粘度。 在一种方法中，低粘度是由过量的溶剂引起的，然后将其印迹或以其它方式除去，使得糊料的粘度增加。 在另一种方法中，低粘度糊剂含有交联剂，其使糊剂在筛选后增加其粘度。