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1.发明授权Metal insulator metal (MIM) capacitor fabrication with sidewall spacers and aluminum cap (ALCAP) top electrode 有权金属绝缘体金属（MIM）电容器制造与侧壁间隔和铝帽（ALCAP）顶部电极公开(公告)号：US07250334B2
公开(公告)日：2007-07-31
申请号：US10909648
申请日：2004-07-31
申请人： Darius L. Crenshaw , Byron L. Williams , Alwin Tsao , Hisashi Shichijo , Satyavolu S. Papa Rao , Kenneth D. Brennan , Steven A. Lytle
发明人： Darius L. Crenshaw , Byron L. Williams , Alwin Tsao , Hisashi Shichijo , Satyavolu S. Papa Rao , Kenneth D. Brennan , Steven A. Lytle
IPC分类号： H01L21/8242
CPC分类号： H01L23/5223 , H01L21/76834 , H01L28/57 , H01L28/91 , H01L2924/0002 , H01L2924/00
摘要： A method (10) of forming a MIM (metal insulator metal) capacitor is disclosed whereby adverse affects associated with copper diffusion are mitigated even as the capacitor is scaled down. A sidewall spacer (156) is formed against an edge (137) of a layer of bottom electrode/copper diffusion barrier material (136), an edge (151) of a layer of capacitor dielectric material (150) and at least some of an edge (153) of a layer of top electrode material. The sidewall spacer (156) is dielectric or non-conductive and mitigates “shorting” currents that can develop between the plates as a result of copper diffusion. Bottom electrode diffusion barrier material (136) mitigates copper diffusion and/or copper drift, thereby reducing the likelihood of premature device failure.
摘要翻译： 公开了形成MIM（金属绝缘金属）电容器的方法（10），其中即使电容器按比例缩小，也减轻了与铜扩散相关的不利影响。 侧壁间隔物（156）抵靠着底部电极/铜扩散阻挡材料层（136）的边缘（137），电容器介电材料层（150）的边缘（151）和至少一些 边缘（153）的顶层电极材料层。 侧壁间隔物（156）是电介质或非导电的，并且减轻由于铜扩散而在板之间产生的“短路”电流。 底部电极扩散阻挡材料（136）减轻了铜扩散和/或铜漂移，从而降低了设备过早失效的可能性。
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公开(公告)号：US07115467B2
公开(公告)日：2006-10-03
申请号：US10903712
申请日：2004-07-30
申请人： Sameer Kumar Ajmera , Darius L. Crenshaw , Stephan Grunow , Satyavolu S. Papa Rao , Phillip D. Matz
发明人： Sameer Kumar Ajmera , Darius L. Crenshaw , Stephan Grunow , Satyavolu S. Papa Rao , Phillip D. Matz
IPC分类号： H01L21/8242
CPC分类号： H01L28/75
摘要： A method (10) of forming a MIM (metal insulator metal) capacitor is disclosed whereby adverse affects associated with copper diffusion are mitigated even as the capacitor is scaled down. A layer of bottom electrode/copper diffusion barrier material (136) is formed (16) within an aperture (128) wherein the capacitor (100) is to be defined. The bottom electrode layer (136) is formed via a directional process so that a horizontal aspect (138) of the layer (136) is formed over a metal (110) at a bottom of the aperture (128) to a thickness (142) that is greater than a thickness (144) of a sidewall aspect (148) of the layer (136) formed upon sidewalls (132) of the aperture (128). Accordingly, the thinner sidewall aspects (148) are removed during an etching act (18) while some of the thicker horizontal aspect (138) remains. A layer of capacitor dielectric material (150) is then conformally formed (20) into the aperture 128 and over the horizontal aspect (138). A layer of top electrode material (152) is then conformally formed (22) over the layer of capacitor dielectric material (150) to complete the capacitor stack (154).
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3.发明授权Method to improve inductance with a high-permeability slotted plate core in an integrated circuit 有权在集成电路中用高磁导率开槽板芯改善电感的方法公开(公告)号：US07969274B2
公开(公告)日：2011-06-28
申请号：US12202665
申请日：2008-09-02
IPC分类号： H01F5/00
CPC分类号： H01L23/5227 , H01F17/0006 , H01F41/046 , H01F2017/008 , H01L2924/0002 , H01L2924/3011 , Y10T29/49073 , H01L2924/00
摘要： An inductor structure (102) formed in an integrated circuit (100) is disclosed, and includes a first isolation layer (106) and a first core plate (104) disposed over or within the first isolation layer (106, 114). The first core plate (104) includes a plurality of electrically coupled conductive traces composed of a conductive ferromagnetic material layer. A second isolation layer (108) overlies the first isolation layer and an inductor coil (102) composed of a conductive material layer (118) is formed within the second isolation layer (108). Another core plate may be formed over the coil. The one or more core plates increase an inductance (L) of the inductor coil (102).
摘要翻译： 公开了一种形成在集成电路（100）中的电感器结构（102），并且包括设置在第一隔离层（106,114）上或第一隔离层（106,114）内的第一隔离层（106）和第一芯板（104）。 第一芯板（104）包括由导电铁磁材料层构成的多个电耦合导电迹线。 第二隔离层（108）覆盖第一隔离层，并且在第二隔离层（108）内形成由导电材料层（118）构成的电感线圈（102）。 可以在线圈上形成另一个芯板。 一个或多个芯板增加电感线圈（102）的电感（L）。
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4.发明授权Fabrication of a ferromagnetic inductor core and capacitor electrode in a single photo mask step 有权在单个光罩步骤中制造铁磁感应芯和电容电极公开(公告)号：US07118925B2
公开(公告)日：2006-10-10
申请号：US11008900
申请日：2004-12-10
IPC分类号： H01L21/00
CPC分类号： H01L23/5227 , H01F17/0033 , H01F41/046 , H01L23/5223 , H01L23/53295 , H01L28/10 , H01L2924/0002 , H01L2924/00
摘要： A method of manufacturing an integrated circuit on a semiconductor wafer. The method comprising forming a bottom plate of a capacitor 50a and a bottom portion of an induction coil 50a, forming an etch stop layer 250′, forming a ferromagnetic capacitor top plate 20a and a ferromagnetic core 20b, forming a top portion of the induction coil 50b plus vias 50c that couple the top portion of the induction coil 50b to the bottom portion of the induction coil 50c.
摘要翻译： 一种在半导体晶片上制造集成电路的方法。 该方法包括形成电容器50a的底板和感应线圈50a的底部，形成蚀刻停止层250'，形成铁磁电容器顶板20A和铁磁芯20b，形成顶部 感应线圈50b加上将感应线圈50b的顶部连接到感应线圈50c的底部的通孔50c。
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公开(公告)号：US07397107B2
公开(公告)日：2008-07-08
申请号：US11340278
申请日：2006-01-26
IPC分类号： H01L29/00
CPC分类号： H01L23/5227 , H01F17/0033 , H01F41/046 , H01L23/5223 , H01L23/53295 , H01L28/10 , H01L2924/0002 , H01L2924/00
摘要： An integrated circuit capacitor having a bottom plate 50a, a dielectric layer 250′, and a ferromagnetic top plate 20a.
摘要翻译： 具有底板50a，介电层250'和铁磁顶板20a的集成电路电容器。
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6.发明申请公开(公告)号：US20090002115A1
公开(公告)日：2009-01-01
申请号：US12202665
申请日：2008-09-02
CPC分类号： H01L23/5227 , H01F17/0006 , H01F41/046 , H01F2017/008 , H01L2924/0002 , H01L2924/3011 , Y10T29/49073 , H01L2924/00
摘要： An inductor structure (102) formed in an integrated circuit (100) is disclosed, and includes a first isolation layer (106) and a first core plate (104) disposed over or within the first isolation layer (106, 114). The first core plate (104) includes a plurality of electrically coupled conductive traces composed of a conductive ferromagnetic material layer. A second isolation layer (108) overlies the first isolation layer and an inductor coil (102) composed of a conductive material layer (118) is formed within the second isolation layer (108). Another core plate may be formed over the coil. The one or more core plates increase an inductance (L) of the inductor coil (102).
摘要翻译： 公开了一种形成在集成电路（100）中的电感器结构（102），并且包括设置在第一隔离层（106,114）上或第一隔离层（106,114）内的第一隔离层（106）和第一芯板（104）。 第一芯板（104）包括由导电铁磁材料层构成的多个电耦合导电迹线。 第二隔离层（108）覆盖第一隔离层，并且在第二隔离层（108）内形成由导电材料层（118）构成的电感线圈（102）。 可以在线圈上形成另一个芯板。 一个或多个芯板增加电感线圈（102）的电感（L）。
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7.发明授权Method to improve inductance with a high-permeability slotted plate core in an integrated circuit 有权在集成电路中用高磁导率开槽板芯改善电感的方法公开(公告)号：US07436281B2
公开(公告)日：2008-10-14
申请号：US10909046
申请日：2004-07-30
IPC分类号： H01F5/00
CPC分类号： H01L23/5227 , H01F17/0006 , H01F41/046 , H01F2017/008 , H01L2924/0002 , H01L2924/3011 , Y10T29/49073 , H01L2924/00
摘要： An inductor structure (102) formed in an integrated circuit (100) is disclosed, and includes a first isolation layer (106) and a first core plate (104) disposed over or within the first isolation layer (106, 114). The first core plate (104) includes a plurality of electrically coupled conductive traces composed of a conductive ferromagnetic material layer. A second isolation layer (108) overlies the first isolation layer and an inductor coil (102) composed of a conductive material layer (118) is formed within the second isolation layer (108). Another core plate may be formed over the coil. The one or more core plates increase an inductance (L) of the inductor coil (102).
摘要翻译： 公开了一种形成在集成电路（100）中的电感器结构（102），并且包括设置在第一隔离层（106,114）上或第一隔离层（106,114）内的第一隔离层（106）和第一芯板（104）。 第一芯板（104）包括由导电铁磁材料层构成的多个电耦合导电迹线。 第二隔离层（108）覆盖第一隔离层，并且在第二隔离层（108）内形成由导电材料层（118）构成的电感线圈（102）。 可以在线圈上形成另一个芯板。 一个或多个芯板增加电感线圈（102）的电感（L）。
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8.发明授权Use of metal phosphorus in metallization of photovoltaic devices and method of fabricating same 有权在金属化光伏器件中使用金属磷及其制造方法公开(公告)号：US09284656B2
公开(公告)日：2016-03-15
申请号：US13154058
申请日：2011-06-06
IPC分类号： C25D3/56 , C25D3/58 , H01L21/288 , H01L23/532 , H01L21/768 , H01L31/0224 , C25D3/38 , C25D3/60 , C25D3/62 , C25D3/64 , C25D5/10 , C25D5/12 , C25D5/50 , C25D7/12 , C25D5/00
CPC分类号： H01L31/022433 , C25D3/38 , C25D3/56 , C25D3/562 , C25D3/567 , C25D3/58 , C25D3/60 , C25D3/62 , C25D3/64 , C25D5/006 , C25D5/10 , C25D5/12 , C25D5/50 , C25D7/12 , H01L21/2885 , H01L21/76841 , H01L23/53238 , H01L31/02168 , H01L31/022425 , H01L31/068 , H01L31/1864 , H01L2924/0002 , Y02E10/50 , H01L2924/00
摘要： A photovoltaic device, such as a solar cell, including a copper-containing-grid metallization structure that contains a metal phosphorus layer as a diffusion barrier is provided. The copper-containing-grid metallization structure includes, from bottom to top, an electroplated metal phosphorus layer that does not include copper or a copper alloy located within a grid pattern formed on a front side surface of a semiconductor substrate, and an electroplated copper-containing layer. A method of forming such a structure is also provided.
摘要翻译： 提供了包含含有金属磷层作为扩散阻挡层的含铜网状金属化结构的太阳能电池等太阳能电池。 含铜网格金属化结构从底部到顶部包括不包括位于半导体衬底的前侧表面上的栅格图案内的铜或铜合金的电镀金属磷层，以及电镀铜 - 含有层。 还提供了一种形成这种结构的方法。
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公开(公告)号：US20120329200A1
公开(公告)日：2012-12-27
申请号：US13165339
申请日：2011-06-21
CPC分类号： H01L31/03845 , B82Y30/00 , C09K13/02 , H01L31/02363 , H01L31/1804 , H01L31/186 , Y02E10/547 , Y02P70/521
摘要： A method of texturing a surface of a crystalline silicon substrate is provided. The method includes immersing a crystalline silicon substrate into an aqueous alkaline etchant solution to form a pyramid shaped textured surface, with (111) faces exposed, on the crystalline silicon substrate. The aqueous alkaline etchant solution employed in the method of the present disclosure includes an alkaline component and a nanoparticle slurry component. Specifically, the aqueous alkaline etchant solution of the present disclosure includes 0.5 weight percent to 5 weight percent of an alkaline component and from 0.1 weight percent to 5 weight percent of a nanoparticle slurry on a dry basis.
摘要翻译： 提供了一种纹理化晶体硅衬底表面的方法。 该方法包括将晶体硅衬底浸入碱性蚀刻剂水溶液中，以形成在晶体硅衬底上（111）面暴露的金字塔形纹理表面。 用于本公开方法的碱性蚀刻剂水溶液包括碱性组分和纳米颗粒淤浆组分。 具体地说，本公开的碱性蚀刻剂水溶液包含0.5重量％至5重量％的碱性组分和0.1重量％至5重量％的基于干基的纳米颗粒浆料。
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10.发明授权Capacitor integration at top-metal level with a protective cladding for copper surface protection 有权电容器集成在顶级金属层与铜表面保护用保护层公开(公告)号：US07674682B2
公开(公告)日：2010-03-09
申请号：US10697138
申请日：2003-10-30
IPC分类号： H01L21/331
CPC分类号： H01L28/60 , H01L23/5223 , H01L2924/0002 , H01L2924/00
摘要： An on-chip decoupling capacitor (106) and method of fabrication. The decoupling capacitor (106) is integrated at the top metal interconnect level (104) and includes surface protection cladding (109) for the copper metal (104b) of the top metal interconnect.
摘要翻译： 片上去耦电容器（106）及其制造方法。 去耦电容器（106）集成在顶部金属互连级（104）处，并且包括用于顶部金属互连的铜金属（104b）的表面保护包层（109）。
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