公开(公告)号：US07998792B2

公开(公告)日：2011-08-16

申请号：US12631296

申请日：2009-12-04

申请人： Leonard E. Mess ,  Jerry M. Brooks ,  David J. Corisis

发明人： Leonard E. Mess ,  Jerry M. Brooks ,  David J. Corisis

IPC分类号： H01L21/00

CPC分类号： H01L23/3128 ,  H01L23/49575 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0657 ,  H01L29/0657 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/4917 ,  H01L2224/49171 ,  H01L2224/4943 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2225/06586 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01039 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10158 ,  H01L2924/10161 ,  H01L2924/10162 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/1627 ,  H01L2924/181 ,  H01L2924/20752 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device is formed of two or more dice of similar dimensions and bond pad arrangements, in which bond pads are located in fields along less than three edges of the active surface of each die. A first die is attached to a substrate and subsequent die or dice are attached in a vertical sequence atop the first die, each in an offset configuration from the next lower die to expose the bond pads thereof for conductive bonding to metallization of the substrate. The multiple chip device permits a plurality of dice to be stacked in a high-density low-profile device. A particularly useful application is the formation of stacked mass storage flash memory package.

摘要翻译： 半导体器件由两个或更多个具有类似尺寸和接合焊盘布置的管芯形成，其中焊盘位于沿着每个管芯的有效表面的三个边缘的场内。 将第一裸片连接到基底上，随后的裸片或裸片以垂直顺序连接在第一裸片的顶部，每一个都具有与下一个下裸片的偏移配置，以露出其接合焊盘，用于导电粘合以进行衬底的金属化。 多芯片器件允许多个芯片堆叠在高密度薄型器件中。 特别有用的应用是形成堆叠的大容量存储闪存包。

公开(公告)号：US07423336B2

公开(公告)日：2008-09-09

申请号：US10118366

申请日：2002-04-08

申请人： David J. Corisis ,  Jerry M. Brooks ,  Matt E. Schwab ,  Tracy V. Reynolds

发明人： David J. Corisis ,  Jerry M. Brooks ,  Matt E. Schwab ,  Tracy V. Reynolds

IPC分类号： H01L23/02

CPC分类号： H01L25/0657 ,  H01L24/73 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2225/06572 ,  H01L2225/06586 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A rerouting element for a semiconductor device that includes a dielectric film that carries conductive vias, conductive elements, and contact pads. The conductive vias are positioned at locations that correspond to the locations of bond pads of a semiconductor device with which the rerouting element is to be used. The conductive elements, which communicate with corresponding conductive vias, reroute the bond pad locations to corresponding contact pad locations adjacent to one peripheral edge or two adjacent peripheral edges of the rerouted semiconductor device. The rerouting element is particularly useful for rerouting centrally located bond pads of a semiconductor device, as well as for rerouting the peripheral locations of bond pads of a semiconductor device to one or two adjacent peripheral edges thereof. Methods for designing and using the rerouting element are also disclosed, as are semiconductor device assemblies including one or more rerouting elements.

摘要翻译： 一种用于半导体器件的重新路由元件，其包括承载导电通孔，导电元件和接触焊盘的电介质膜。 导电通孔位于对应于要使用重新路由元件的半导体器件的接合焊盘的位置的位置处。 与相应的导电通孔连通的导电元件将接合焊盘位置重新路由到与被重新路由的半导体器件的一个外围边缘或两个相邻外围边缘相邻的相应接触焊盘位置。 重新路由元件对于重新布置半导体器件的中心位置的接合焊盘以及将半导体器件的接合焊盘的外围位置重新路由到其一个或两个相邻的外围边缘是特别有用的。 还公开了用于设计和使用重新路由元件的方法，半导体器件组件包括一个或多个重新布线元件。

公开(公告)号：US07282397B2

公开(公告)日：2007-10-16

申请号：US11352685

申请日：2006-02-13

申请人： David J. Corisis ,  Jerry M. Brooks ,  Matt E. Schwab ,  Tracy V. Reynolds

发明人： David J. Corisis ,  Jerry M. Brooks ,  Matt E. Schwab ,  Tracy V. Reynolds

IPC分类号： H01L21/00

CPC分类号： H01L25/0657 ,  H01L24/73 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2225/06572 ,  H01L2225/06586 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A rerouting element for a semiconductor device includes a substantially planar member that carries at least one contact location, at least one conductive, at least one rerouted bond pad. The contact location is positioned adjacent to a first periphered edge of the substantially planar member and at a location that corresponds to the location of a bond pad of a semiconductor device with which the rerouting element is to be used. The at least one conductive element, which communicates with the at least one contact location, reroutes the bond pad location of the semiconductor device to a corresponding rerouted bond pad location adjacent to a second one peripheral edge of the rerouted substantially planar member which is opposite the first periphered edge. In addition, assemblies including rerouting elements and methods for designing and using rerouting elements are disclosed.

摘要翻译： 用于半导体器件的重新路由元件包括承载至少一个接触位置的基本上平面的构件，至少一个导电的至少一个重新路由的接合焊盘。 接触位置邻近于基本平坦的构件的第一密封边缘并且位于对应于要使用重新路由元件的半导体器件的接合焊盘的位置的位置。 与至少一个接触位置连通的至少一个导电元件将半导体器件的接合焊盘位置重新路由到与重新路由的基本上平面的部件的第二个周边边缘相邻的相应的重路由接合焊盘位置， 第一个边缘。 此外，公开了包括重新路由元件和用于设计和使用重新路由元件的方法的组件。

公开(公告)号：US07094631B2

公开(公告)日：2006-08-22

申请号：US10646420

申请日：2003-08-22

申请人： David J. Corisis ,  Jerry M. Brooks ,  Matt E. Schwab ,  Tracy V. Reynolds

发明人： David J. Corisis ,  Jerry M. Brooks ,  Matt E. Schwab ,  Tracy V. Reynolds

IPC分类号： H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC分类号： H01L25/0657 ,  H01L24/73 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2225/06572 ,  H01L2225/06586 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A rerouting element for a semiconductor device that includes a dielectric film that carries conductive vias, conductive elements, and contact pads. The conductive vias are positioned at locations that correspond to the locations of bond pads of a semiconductor device with which the rerouting element is to be used. The conductive elements, which communicate with corresponding conductive vias, reroute the bond pad locations to corresponding contact pad locations adjacent to one peripheral edge or two adjacent peripheral edges of the rerouted semiconductor device. The rerouting element is particularly useful for rerouting centrally located bond pads of a semiconductor device, as well as for rerouting the peripheral locations of bond pads of a semiconductor device to one or two adjacent peripheral edges thereof. Methods for designing and using the rerouting element are also disclosed, as are semiconductor device assemblies including one or more rerouting elements.

摘要翻译： 一种用于半导体器件的重新路由元件，其包括承载导电通孔，导电元件和接触焊盘的电介质膜。 导电通孔位于对应于要使用重新路由元件的半导体器件的接合焊盘的位置的位置处。 与相应的导电通孔连通的导电元件将接合焊盘位置重新路由到与被重新路由的半导体器件的一个外围边缘或两个相邻外围边缘相邻的相应接触焊盘位置。 重新路由元件对于重新布置半导体器件的中心位置的接合焊盘以及将半导体器件的接合焊盘的外围位置重新路由到其一个或两个相邻的外围边缘是特别有用的。 还公开了用于设计和使用重新路由元件的方法，半导体器件组件包括一个或多个重新布线元件。

公开(公告)号：US06902952B2

公开(公告)日：2005-06-07

申请号：US10076849

申请日：2002-02-14

申请人： S. Derek Hinkle ,  Jerry M. Brooks ,  David J. Corisis

发明人： S. Derek Hinkle ,  Jerry M. Brooks ,  David J. Corisis

IPC分类号： H01L23/495 ,  H01L21/50

CPC分类号： H01L24/06 ,  H01L23/49503 ,  H01L23/49506 ,  H01L23/4951 ,  H01L23/49537 ,  H01L23/49565 ,  H01L23/49579 ,  H01L23/49582 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48599 ,  H01L2224/49171 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/09701 ,  H01L2924/12044 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012

摘要： A multi-part lead frame die assembly is disclosed including a die bonded to a die paddle. A second lead frame including leads is superimposed and bonded onto the first lead frame. Also disclosed is a method for fabricating the multi-part lead frame assembly which utilizes equipment designed for single lead frame processing. If desired, the materials for the multi-part lead frame may be dissimilar.

摘要翻译： 公开了一种多部件引线框架模具组件，其包括结合到管芯焊盘的管芯。 包括引线的第二引线框架叠加并结合到第一引线框架上。 还公开了一种使用设计用于单引线框处理的设备来制造多部分引线框架组件的方法。 如果需要，多部分引线框架的材料可能是不相似的。

公开(公告)号：US06894372B2

公开(公告)日：2005-05-17

申请号：US10290741

申请日：2002-11-07

申请人： David J. Corisis ,  Larry D. Kinsman ,  Jerry M. Brooks

发明人： David J. Corisis ,  Larry D. Kinsman ,  Jerry M. Brooks

IPC分类号： H01L23/495 ,  H05K5/02

CPC分类号： H01L23/49506 ,  H01L23/49544 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/00

摘要： A semiconductor integrated circuit device, and method of manufacturing the same, having a conventional-type lead frame with the die paddle removed. In particular, the die paddle is replaced with a section of tape that is supported by the ends of the lead fingers. The semiconductor die is attached to the tape so that it may be wire bonded to the lead fingers. The tape contains at least one slot to allow for expansion and/or contraction of the tape due to various temperatures experienced during the manufacturing process so that the tape does not wrinkle or warp to alter the position of the die.

摘要翻译： 一种半导体集成电路器件及其制造方法，具有去除了管芯焊盘的常规型引线框架。 特别地，模具板被用引线指的端部支撑的一部分带替代。 将半导体管芯附着到带子上，使其可以被引线接合到引线指。 胶带包含至少一个槽，以允许由于在制造过程中经历的各种温度而导致的带的膨胀和/或收缩，使得带不会起皱或翘曲以改变模具的位置。

公开(公告)号：US06882034B2

公开(公告)日：2005-04-19

申请号：US09942183

申请日：2001-08-29

申请人： David J. Corisis ,  Jerry M. Brooks ,  Matt E. Schwab ,  Tracy V. Reynolds

发明人： David J. Corisis ,  Jerry M. Brooks ,  Matt E. Schwab ,  Tracy V. Reynolds

IPC分类号： H01L23/538 ,  H05K1/14 ,  H05K3/30 ,  H05K3/40 ,  H01L23/495

CPC分类号： H05K1/141 ,  H01L23/5385 ,  H01L24/48 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/09701 ,  H01L2924/12044 ,  H01L2924/19041 ,  H05K1/147 ,  H05K3/305 ,  H05K3/4084 ,  H05K2201/048 ,  H05K2203/049 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49204 ,  H01L2224/45015 ,  H01L2924/207

摘要： A routing element for use with a multichip module includes a substrate that carries conductive traces that provide either additional electrical paths or shorter electrical paths that those provided by a multichip module substrate. The conductive traces may be carried upon a single surface of the routing element substrate, be carried internally by the routing element substrate, or include externally and internally carried portions. The routing element also includes a contact pad positioned at each end of each conductive trace thereof to facilitate electrical connection of each conductive trace to a corresponding terminal of the substrate or to a corresponding bond pad of a semiconductor device of the multichip module. Multichip modules are also disclosed, as are methods for designing the routing element and methods in which the routing element is used.

摘要翻译： 用于多芯片模块的布线元件包括承载导电迹线的衬底，该衬底提供比由多芯片模块衬底提供的电路更多的电路径或更短的电路径。 导电迹线可以承载在路由元件衬底的单个表面上，由路由元件衬底在内部承载，或包括外部和内部承载的部分。 路由元件还包括位于其每个导电迹线的每一端处的接触焊盘，以便于将每个导电迹线电连接到衬底的对应端子或多芯片模块的半导体器件的对应接合焊盘。 还公开了多芯片模块，以及用于设计路由元件的方法和使用路由元件的方法。

公开(公告)号：US06837731B2

公开(公告)日：2005-01-04

申请号：US10458015

申请日：2003-06-10

申请人： David J. Corisis ,  Jerry M. Brooks ,  Terry R. Lee

发明人： David J. Corisis ,  Jerry M. Brooks ,  Terry R. Lee

IPC分类号： H05K3/30 ,  H05K7/10 ,  H01R13/62

CPC分类号： H05K7/1023 ,  H01R12/7029 ,  H01R12/7064 ,  H01R12/707 ,  H05K3/301

摘要： A semiconductor package for vertically surface mounting to a printed circuit board having a retention apparatus for holding the package thereto.

公开(公告)号：US06563192B1

公开(公告)日：2003-05-13

申请号：US09882469

申请日：2001-06-14

申请人： David J. Corisis ,  Jerry M. Brooks

发明人： David J. Corisis ,  Jerry M. Brooks

IPC分类号： H01L2900

CPC分类号： H01L23/5223 ,  H01L2224/49171 ,  H01L2924/13091 ,  H01L2924/00

摘要： A gateway or circuit barrier capacitor incorporated in a semiconductor die structure in lieu of a discrete capacitor employed with such a die in a Chip on Board assembly such as a single in-line memory module (SIMM). The capacitor may comprise a single layer with laterally adjacent, dielectrically separated electrode traces, or a more traditional vertically superimposed electrode design with an intervening dielectric layer. The capacitor is preferably formed using the existing fabrication process for the die by altering a photoresist mask to define the electrode traces in the same step as other conductors, such as bond pads, are formed.

摘要翻译： 一种集成在半导体管芯结构中的网关或电路阻挡电容器，代替了诸如单列直插式存储器模块（SIMM）的片上组件的这种模具所采用的分立电容器。 电容器可以包括具有横向相邻的介电离开的电极迹线的单层或者具有中间介电层的更传统的垂直叠加的电极设计。 优选地，通过改变光致抗蚀剂掩模来使用现有的裸片的制造工艺来形成电容器，以与其它导体（例如接合焊盘）形成相同的步骤来限定电极迹线。

公开(公告)号：US06331939B1

公开(公告)日：2001-12-18

申请号：US09416249

申请日：1999-10-12

申请人： David J. Corisis ,  Jerry M. Brooks ,  Walter L. Moden

发明人： David J. Corisis ,  Jerry M. Brooks ,  Walter L. Moden

IPC分类号： H05K111

CPC分类号： H01L24/06 ,  H01L23/3107 ,  H01L24/48 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/85399 ,  H01L2225/0651 ,  H01L2225/0652 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/06586 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

摘要： A stackable fine ball grid array (FBGA) package is disclosed that allows the stacking of one array upon another. This stackable FBGA package is configured such that conductive elements are placed along the outside perimeter of an integrated circuit (IC) device mounted to the FBGA. The conductive elements also are of sufficient size so that they extend beyond the bottom or top surface of the IC device, including the wiring interconnect and encapsulate material, as the conductive elements make contact with the FBGA positioned below or above to form a stack. The IC device, such as a memory chip, is mounted upon a first surface of a printed circuit board substrate forming part of the FBGA. Lead wires are used to attach the IC device to the printed board substrate and encapsulant is used to contain the IC device and wires within and below the matrix and profile of the conductive elements. Additionally, certain pins on the FBGA in the stack require an isolated connection to the PC board. Yet, this isolated connection should be able to be connected to an adjacent ball on a different FBGA stack above or below that particular isolated connection. This provides for a stair step connection from the bottom of the FBGA stacked array to the top. This allows IC devices to be stacked one upon the other while maintaining a unique pin out for each pin required in the stack.

摘要翻译： 公开了一种可堆叠的精细球栅阵列（FBGA）封装，其允许将一个阵列堆叠在另一阵列上。 这种可堆叠的FBGA封装被配置成使得导电元件沿着安装到FBGA的集成电路（IC）器件的外周放置。 导电元件也具有足够的尺寸，使得它们延伸超过IC器件的底表面或顶表面，包括布线互连和封装材料，因为导电元件与位于或之下的FBGA接触以形成叠层。 诸如存储器芯片的IC器件安装在形成FBGA的一部分的印刷电路板基板的第一表面上。 引线用于将IC器件连接到印刷电路板基板，并且密封剂用于将IC器件和导线元件的基体内部和外部的电线包含在IC器件中。 此外，堆叠中的FBGA上的某些引脚需要与PC板的隔离连接。 然而，这种隔离的连接应该能够连接到位于该特定隔离连接之上或之下的不同FBGA堆叠上的相邻球。 这提供了从FBGA堆叠阵列的底部到顶部的阶梯连接。 这允许IC器件彼此堆叠，同时为堆栈中所需的每个引脚保持唯一的引脚输出。