公开(公告)号：US20100328896A1

公开(公告)日：2010-12-30

申请号：US12826337

申请日：2010-06-29

申请人： David Mulford Shaddock ,  Deng Tao ,  Hendrik Pieter Jacobus De Bock ,  Dalong Zhong ,  Christopher Michael Eastman ,  Kevin Matthew Durocher ,  Stanton Earl Weaver, JR.

发明人： David Mulford Shaddock ,  Deng Tao ,  Hendrik Pieter Jacobus De Bock ,  Dalong Zhong ,  Christopher Michael Eastman ,  Kevin Matthew Durocher ,  Stanton Earl Weaver, JR.

IPC分类号： H05K7/20 ,  C23C14/34 ,  C25D7/12 ,  F28F7/00 ,  B23P17/04

CPC分类号： H01L23/433 ,  B82Y30/00 ,  B82Y40/00 ,  C25D5/022 ,  C25D7/12 ,  F28F2013/006 ,  F28F2255/00 ,  H01L2924/0002 ,  Y10T29/49 ,  Y10T428/30 ,  H01L2924/00

摘要： An article and method of forming the article is disclosed. The article includes a heat source, a heat-sink, and a thermal interface element having a plurality of freestanding nanosprings, a top layer, and a bottom layer. The nanosprings, top layer, and the bottom layers of the article include at least one inorganic material. The article can be prepared using a number of methods including the methods such as GLAD and electrochemical deposition.

摘要翻译： 公开了一种形成物品的制品和方法。 该制品包括热源，散热器和具有多个独立纳米脉冲，顶层和底层的热界面元件。 制品的纳米螺旋，顶层和底层包括至少一种无机材料。 该制品可以使用许多方法制备，包括诸如GLAD和电化学沉积的方法。

公开(公告)号：US08405996B2

公开(公告)日：2013-03-26

申请号：US12826337

申请日：2010-06-29

申请人： David Mulford Shaddock ,  Deng Tao ,  Hendrik Pieter Jacobus De Bock ,  Dalong Zhong ,  Christopher Michael Eastman ,  Kevin Matthew Durocher ,  Stanton Earl Weaver, Jr.

发明人： David Mulford Shaddock ,  Deng Tao ,  Hendrik Pieter Jacobus De Bock ,  Dalong Zhong ,  Christopher Michael Eastman ,  Kevin Matthew Durocher ,  Stanton Earl Weaver, Jr.

IPC分类号： H05K7/20

CPC分类号： H01L23/433 ,  B82Y30/00 ,  B82Y40/00 ,  C25D5/022 ,  C25D7/12 ,  F28F2013/006 ,  F28F2255/00 ,  H01L2924/0002 ,  Y10T29/49 ,  Y10T428/30 ,  H01L2924/00

摘要： An article and method of forming the article is disclosed. The article includes a heat source, a heat-sink, and a thermal interface element having a plurality of freestanding nanosprings, a top layer, and a bottom layer. The nanosprings, top layer, and the bottom layers of the article include at least one inorganic material. The article can be prepared using a number of methods including the methods such as GLAD and electrochemical deposition.

摘要翻译： 公开了一种形成物品的制品和方法。 该制品包括热源，散热器和具有多个独立纳米脉冲，顶层和底层的热界面元件。 制品的纳米螺旋，顶层和底层包括至少一种无机材料。 该制品可以使用许多方法制备，包括诸如GLAD和电化学沉积的方法。

公开(公告)号：US06429381B1

公开(公告)日：2002-08-06

申请号：US09681555

申请日：2001-04-27

申请人： Richard Joseph Saia ,  Robert John Wojnarowski ,  Stanton Earl Weaver, Jr. ,  Kevin Matthew Durocher ,  Christopher James Kapusta ,  James Enrico Sabatini

发明人： Richard Joseph Saia ,  Robert John Wojnarowski ,  Stanton Earl Weaver, Jr. ,  Kevin Matthew Durocher ,  Christopher James Kapusta ,  James Enrico Sabatini

IPC分类号： H05K103

CPC分类号： H05K3/403 ,  H01L23/3677 ,  H01L23/481 ,  H01L25/0657 ,  H01L2224/16 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2924/3011 ,  H05K1/0306 ,  H05K3/0052 ,  H05K3/0061 ,  H05K3/321 ,  H05K3/4605 ,  H05K3/4611 ,  H05K3/4629 ,  H05K2201/09663 ,  H05K2201/1028 ,  H05K2203/0415 ,  H05K2203/063 ,  H05K2203/0733 ,  Y10T29/5313 ,  Y10T29/53174

摘要： A method for fabricating a substrate package for a high density interconnect multichip module stack comprises: providing a substrate having holes extending therethrough and having a bottom surface with metallization situated thereon; providing a metal sheet having grooves extending therethrough; attaching the metal sheet to the bottom surface of the substrate; attaching metal plugs through the holes to the metal sheet; and removing portions of the substrate to expose the metal plugs and separate the metal sheet into a plurality of segments defined by the grooves.

摘要翻译： 一种用于制造用于高密度互连多芯片模块堆叠的衬底封装的方法，包括：提供具有延伸穿过其中并且具有位于其上的金属化的底表面的孔的衬底; 提供具有延伸穿过其中的槽的金属片; 将所述金属片附接到所述基板的底面; 将金属塞通过孔附接到金属板; 以及去除所述基板的部分以暴露所述金属塞并将所述金属板分离成由所述槽限定的多个段。

公开(公告)号：US08824635B2

公开(公告)日：2014-09-02

申请号：US13283373

申请日：2011-10-27

申请人： John Eric Tkaczyk ,  Kevin Matthew Durocher ,  James Rose ,  Haochuan Jiang ,  Abdelaziz Ikhlef ,  Vladimir Lobastov ,  Daniel David Harrison

发明人： John Eric Tkaczyk ,  Kevin Matthew Durocher ,  James Rose ,  Haochuan Jiang ,  Abdelaziz Ikhlef ,  Vladimir Lobastov ,  Daniel David Harrison

IPC分类号： H05G1/64 ,  H01L27/148 ,  G01T1/16 ,  G01T1/208

CPC分类号： G01T1/247 ,  A61B6/037 ,  A61B6/4233 ,  G01N2223/419 ,  G01N2223/507 ,  G01T1/249 ,  G01T7/005

摘要： Detector modules for an imaging system and methods of manufacturing are provided. One detector module includes a substrate, a direct conversion sensor material coupled to the substrate and a flexible interconnect electrically coupled to the direct conversion sensor material and configured to provide readout of electrical signals generated by the direct conversion sensor material. The detector module also includes at least one illumination source for illuminating the direct conversion sensor material.

摘要翻译： 提供了用于成像系统的检测器模块和制造方法。 一个检测器模块包括衬底，耦合到衬底的直接转换传感器材料和电耦合到直接转换传感器材料并被配置为提供由直接转换传感器材料产生的电信号的读出的柔性互连。 检测器模块还包括用于照亮直接转换传感器材料的至少一个照明源。

公开(公告)号：US08742646B2

公开(公告)日：2014-06-03

申请号：US13433422

申请日：2012-03-29

申请人： Robert Gideon Wodnicki ,  Charles Edward Baumgartner ,  David Martin Mills ,  Kevin Matthew Durocher ,  William Hullinger Huber ,  George Charles Sogoian ,  Christopher James Kapusta

发明人： Robert Gideon Wodnicki ,  Charles Edward Baumgartner ,  David Martin Mills ,  Kevin Matthew Durocher ,  William Hullinger Huber ,  George Charles Sogoian ,  Christopher James Kapusta

IPC分类号： H01L41/08 ,  B06B1/06

CPC分类号： B06B1/0622 ,  H01L41/338 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/1433 ,  H01L2924/15321 ,  Y10T29/42 ,  H01L2924/00

摘要： An ultrasound acoustic assembly includes a number of ultrasound acoustic arrays, each array comprising an acoustic stack comprising a piezoelectric layer assembled with at least one acoustic impedance dematching layer and with a support layer. The acoustic stack defines a number of dicing kerfs and a number of acoustic elements, such that the dicing kerfs are formed between neighboring ones of the acoustic elements. The dicing kerfs extend through the piezoelectric layer and through the acoustic impedance dematching layer(s) but extend only partially through the support layer. The ultrasound acoustic assembly further includes a number of application specific integrated circuit (ASIC) die. Each ultrasound acoustic array is coupled to a respective ASIC die to form a respective acoustic-electric transducer module. Methods of manufacture are also provided.

摘要翻译： 超声波声学组件包括多个超声波阵列，每个阵列包括声叠层，声堆叠包括与至少一个声阻抗分配层和支撑层组装的压电层。 声学堆叠限定了多个切割切口和多个声学元件，使得切割切口形成在相邻的声学元件之间。 切割切口延伸穿过压电层并通过声阻抗分层，但仅部分延伸穿过支撑层。 超声波组件还包括许多专用集成电路（ASIC）芯片。 每个超声波阵列耦合到相应的ASIC管芯，以形成相应的声电传感器模块。 还提供了制造方法。

公开(公告)号：US07952196B1

公开(公告)日：2011-05-31

申请号：US12106805

申请日：2008-04-21

申请人： Joseph Alfred Iannotti ,  Kevin Matthew Durocher ,  Christopher James Kapusta

发明人： Joseph Alfred Iannotti ,  Kevin Matthew Durocher ,  Christopher James Kapusta

IPC分类号： H01L23/34

CPC分类号： H01L23/36 ,  H01L21/563 ,  H01L23/3107 ,  H01L23/373 ,  H01L23/5389 ,  H01L23/66 ,  H01L25/0652 ,  H01L25/18 ,  H01L2223/6605 ,  H01L2223/6622 ,  H01L2224/1134 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/1461 ,  H01L2924/1627 ,  H01L2924/19051 ,  H01L2924/3011 ,  H01L2924/00

摘要： An interconnect assembly for use in high frequency applications includes an interconnect structure, a plurality of electronic die disposed on the interconnect structure, and an encapsulant at least partially surrounding the plurality of electronic die. The interconnect structure includes a plurality of layers. The interconnect assembly further includes a thermal management layer disposed within a portion of the encapsulant and proximate to the plurality of electronic die and a controlled impedance interconnect connected to the interconnect structure and extending to a peripheral surface of the interconnect assembly.

摘要翻译： 用于高频应用的互连组件包括互连结构，布置在互连结构上的多个电子管芯以及至少部分围绕多个电子管芯的密封剂。 互连结构包括多个层。 互连组件还包括设置在密封剂的一部分内并且靠近多个电子管芯的热管理层和连接到互连结构并延伸到互连组件的外围表面的受控阻抗互连。

公开(公告)号：US20090028491A1

公开(公告)日：2009-01-29

申请号：US11828550

申请日：2007-07-26

申请人： Raymond Albert Fillion ,  Kevin Matthew Durocher ,  Richard Joseph Saia ,  Charles Gerard Woychik

发明人： Raymond Albert Fillion ,  Kevin Matthew Durocher ,  Richard Joseph Saia ,  Charles Gerard Woychik

IPC分类号： G02B6/12 ,  H01L23/48

CPC分类号： H01L23/13 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49833 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/18 ,  H01L2224/76155 ,  H01L2224/82102 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15312 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/3511 ,  H01L2924/00

摘要： An interconnect structure includes an insulative web having a first surface and a second surface; a logic device secured to the second surface of the insulative web; a frame panel assembly including a frame base having a first surface and a second surface, a first frame insulative layer disposed between the frame base first surface and the insulative web second surface, an aperture extending through the frame base and first frame insulative layer, wherein at least a portion of the logic device is disposed within the aperture, and a first frame connector disposed between a first electrically conductive layer located on the frame base first surface, and a second electrically conductive layer located on a surface of the first frame insulative layer; a device connector disposed between an I/O contact on a surface of the logic device and a third electrical conductor located on a surface of the insulative web; and an insulative layer connector that is disposed between the third electrical conductor located on a surface of the insulative web and the second electrically conductive layer located on a surface of the first frame insulative layer.

摘要翻译： 互连结构包括具有第一表面和第二表面的绝缘网; 固定在绝缘网的第二表面上的逻辑装置; 框架面板组件，包括具有第一表面和第二表面的框架基座，设置在框架基部第一表面和绝缘网片第二表面之间的第一框架绝缘层，延伸穿过框架基部和第一框架绝缘层的孔，其中 所述逻辑器件的至少一部分设置在所述孔内，并且设置在位于所述框架基底第一表面上的第一导电层之间的第一框架连接器和位于所述第一框架绝缘层的表面上的第二导电层 ; 设置在所述逻辑器件的表面上的I / O触点和位于所述绝缘网的表面上的第三电导体之间的器件连接器; 以及绝缘层连接器，其设置在位于所述绝缘片的表面上的所述第三电导体和位于所述第一框架绝缘层的表面上的所述第二导电层之间。

公开(公告)号：US07427566B2

公开(公告)日：2008-09-23

申请号：US11297868

申请日：2005-12-09

申请人： Kevin Matthew Durocher ,  Stacey Joy Goodwin ,  Ernest Wayne Balch ,  Christopher James Kapusta

发明人： Kevin Matthew Durocher ,  Stacey Joy Goodwin ,  Ernest Wayne Balch ,  Christopher James Kapusta

IPC分类号： H01L21/302

CPC分类号： H01L23/473 ,  F28F3/12 ,  H01L2924/0002 ,  H05K3/108 ,  H01L2924/00

摘要： A method is provided. The method includes forming a conductive layer on an inner surface of a substrate and providing a sacrificial layer over the conductive layer. The method includes forming a plurality of channels in the sacrificial layer and plating the sacrificial layer to substantially fill the plurality of channels with a plating material comprising conducting material. The method also includes etching the sacrificial layer to form a conducting structure having fins where conducting material remains separated by microchannels where the sacrificial layer is etched.

摘要翻译： 提供了一种方法。 该方法包括在衬底的内表面上形成导电层并在导电层上提供牺牲层。 该方法包括在牺牲层中形成多个通道，并且使牺牲层电镀以使包含导电材料的镀覆材料基本上填充多个通道。 该方法还包括蚀刻牺牲层以形成具有翅片的导电结构，其中导电材料保持由其中蚀刻牺牲层的微通道分离。

公开(公告)号：US20070131645A1

公开(公告)日：2007-06-14

申请号：US11297868

申请日：2005-12-09

申请人： Kevin Matthew Durocher ,  Stacey Goodwin ,  Ernest Balch ,  Christopher Kapusta

发明人： Kevin Matthew Durocher ,  Stacey Goodwin ,  Ernest Balch ,  Christopher Kapusta

IPC分类号： C23F1/00 ,  H01L21/302

CPC分类号： H01L23/473 ,  F28F3/12 ,  H01L2924/0002 ,  H05K3/108 ,  H01L2924/00

摘要： A method is provided. The method includes forming a conductive layer on an inner surface of a substrate and providing a sacrificial layer over the conductive layer. The method includes forming a plurality of channels in the sacrificial layer and plating the sacrificial layer to substantially fill the plurality of channels with a plating material comprising conducting material. The method also includes etching the sacrificial layer to form a conducting structure having fins where conducting material remains separated by microchannels where the sacrificial layer is etched.

摘要翻译： 提供了一种方法。 该方法包括在衬底的内表面上形成导电层并在导电层上提供牺牲层。 该方法包括在牺牲层中形成多个通道，并且使牺牲层电镀以使包含导电材料的镀覆材料基本上填充多个通道。 该方法还包括蚀刻牺牲层以形成具有翅片的导电结构，其中导电材料保持由其中蚀刻牺牲层的微通道分离。

公开(公告)号：US06933813B2

公开(公告)日：2005-08-23

申请号：US10714376

申请日：2003-11-12

申请人： William Edward Burdick, Jr. ,  James Wilson Rose ,  Kevin Matthew Durocher ,  Raymond Albert Fillion

发明人： William Edward Burdick, Jr. ,  James Wilson Rose ,  Kevin Matthew Durocher ,  Raymond Albert Fillion

IPC分类号： H01L23/52 ,  H01H20060101 ,  H01L21/3205 ,  H01L21/48 ,  H01L21/60 ,  H01L23/12 ,  H01L23/34 ,  H01L23/50 ,  H01L23/538 ,  H01P1/04 ,  H05K3/06 ,  H05K3/38

CPC分类号： H01L27/14636 ,  H01L24/19 ,  H01L24/82 ,  H01L27/14618 ,  H01L2224/04105 ,  H01L2224/18 ,  H01L2224/92144 ,  H01L2924/01004 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/12042 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  H01L2924/00

摘要： An interconnection structure includes: a dielectric layer; a first metallization pattern on the dielectric layer, the first metallization pattern including at least one etch stop having a perimeter defining at least one etch stop opening; a cured adhesive on a portion of the dielectric layer, the adhesive not present in an area aligned with the at least one etch stop; and at least one electrical device being attached to the dielectric layer by the adhesive such that an active area of the at least one electrical device is aligned with the etch stop perimeter. The active area of the at least one electrical device may further be aligned with at least one predetermined area defined by an optional additional portion of cured adhesive, the additional portion of the cured adhesive being adhesively attached to the dielectric layer and not adhesively attached to the at least one electrical device.

摘要翻译： 互连结构包括：介电层; 所述第一金属化图案包括至少一个具有限定至少一个蚀刻停止开口的周边的蚀刻停止件; 在所述电介质层的一部分上的固化的粘合剂，所述粘合剂不存在于与所述至少一个蚀刻停止件对准的区域中; 并且至少一个电气装置通过所述粘合剂附接到所述电介质层，使得所述至少一个电气装置的有效面积与所述蚀刻停止周界对准。 至少一个电气装置的活动区域还可以与由固化的粘合剂的任选的附加部分限定的至少一个预定区域对准，固化的粘合剂的附加部分粘合地附着到电介质层上，而不粘附到 至少一个电气设备。