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    PROGRAMMABLE OPTICAL INTERCONNECT FOR MULTI-NODE COMPUTER SYSTEMS
    1.
    发明申请
    PROGRAMMABLE OPTICAL INTERCONNECT FOR MULTI-NODE COMPUTER SYSTEMS 失效
    多节点计算机系统的可编程光学互连

    公开(公告)号：US20120275798A1

    公开(公告)日：2012-11-01

    申请号：US13096365

    申请日：2011-04-28

    申请人： Emmanuel Atta ,  Darcy Berger ,  John R. Dangler ,  Matthew S. Doyle ,  Jesse M. Hefner ,  Thomas W. Liang

    发明人： Emmanuel Atta ,  Darcy Berger ,  John R. Dangler ,  Matthew S. Doyle ,  Jesse M. Hefner ,  Thomas W. Liang

    IPC分类号： H04B10/00

    CPC分类号： H04B10/803

    摘要： A device for connecting a plurality of assemblage-mounted optical transmitters to a plurality of assemblage-mounted optical receivers mounted on a selected side of an assemblage includes a planar frame configured to be coupled to the selected side of the assemblage. A plurality of first redirecting structures is affixed to the planar frame and each is configured to receive a first optical signal from a different assemblage-mounted optical transmitter. Each first redirecting structure transmits a second optical signal, corresponding to the first optical signal, along a preselected path. A plurality of second redirecting structures is affixed to the planar frame and each is configured to receive the second optical signal from a different one of the first redirecting structures. Each of the second redirecting structures transmits a third optical signal, corresponding to the second optical signal, to a different one of the assemblage-mounted optical receivers.

    摘要翻译： 用于将多个组装安装的光发射器连接到安装在组合件的选定侧上的多个组装安装的光学接收器的装置包括被配置为耦合到组件的选定侧的平面框架。 多个第一重定向结构被固定到平面框架，并且每个重新定向结构被配置成从不同的组装安装的光发送器接收第一光信号。 每个第一重定向结构沿预选路径发送对应于第一光信号的第二光信号。 多个第二重定向结构被固定到平面框架，并且每个被配置为从第一重定向结构中的不同的一个接收第二光信号。 第二重定向结构中的每一个将对应于第二光信号的第三光信号发送到装配在一起的光接收器中的不同的一个。

    Programmable optical interconnect for multi-node computer systems
    2.
    发明授权
    Programmable optical interconnect for multi-node computer systems 失效
    用于多节点计算机系统的可编程光学互连

    公开(公告)号：US08488968B2

    公开(公告)日：2013-07-16

    申请号：US13096365

    申请日：2011-04-28

    申请人： Emmanuel Atta ,  Darcy Berger ,  John R. Dangler ,  Matthew S. Doyle ,  Jesse M. Hefner ,  Thomas W. Liang

    发明人： Emmanuel Atta ,  Darcy Berger ,  John R. Dangler ,  Matthew S. Doyle ,  Jesse M. Hefner ,  Thomas W. Liang

    IPC分类号： H04B10/00

    CPC分类号： H04B10/803

    摘要： A device for connecting a plurality of assemblage-mounted optical transmitters to a plurality of assemblage-mounted optical receivers mounted on a selected side of an assemblage includes a planar frame configured to be coupled to the selected side of the assemblage. A plurality of first redirecting structures is affixed to the planar frame and each is configured to receive a first optical signal from a different assemblage-mounted optical transmitter. Each first redirecting structure transmits a second optical signal, corresponding to the first optical signal, along a preselected path. A plurality of second redirecting structures is affixed to the planar frame and each is configured to receive the second optical signal from a different one of the first redirecting structures. Each of the second redirecting structures transmits a third optical signal, corresponding to the second optical signal, to a different one of the assemblage-mounted optical receivers.

    摘要翻译： 用于将多个组装安装的光发射器连接到安装在组合件的选定侧上的多个组装安装的光学接收器的装置包括被配置为耦合到组件的选定侧的平面框架。 多个第一重定向结构被固定到平面框架，并且每个重新定向结构被配置成从不同的组装安装的光发送器接收第一光信号。 每个第一重定向结构沿预选路径发送对应于第一光信号的第二光信号。 多个第二重定向结构被固定到平面框架，并且每个被配置为从第一重定向结构中的不同的一个接收第二光信号。 第二重定向结构中的每一个将对应于第二光信号的第三光信号发送到装配在一起的光接收器中的不同的一个。

    Apparatus for accessing and probing the connections between a chip package and a printed circuit board
    6.
    发明授权
    Apparatus for accessing and probing the connections between a chip package and a printed circuit board 失效
    用于访问和探测芯片封装和印刷电路板之间的连接的装置

    公开(公告)号：US07525299B1

    公开(公告)日：2009-04-28

    申请号：US12163346

    申请日：2008-06-27

    申请人： Paul W. Rudrud ,  Roger A. Booth, Jr. ,  John R. Dangler ,  Matthew S. Doyle ,  Jesse M. Hefner ,  Ankur K. Patel ,  Thomas W. Liang

    发明人： Paul W. Rudrud ,  Roger A. Booth, Jr. ,  John R. Dangler ,  Matthew S. Doyle ,  Jesse M. Hefner ,  Ankur K. Patel ,  Thomas W. Liang

    IPC分类号： G01R31/02

    CPC分类号： G01R31/2812 ,  G01R31/046

    摘要： A device to access and/or verify connections between a chip package and a printed circuit board (“PCB”), specifically within packages lacking back-side measurement access, includes a housing for insertion between the chip package and PCB. A passageway in the housing connects an entrance and an exit from the housing. The entrance is disposed on an end of the housing facing away from the chip package. The exit is disposed on a side of the housing below the chip package such that the passageway is directed at a signal path between the chip package and the PCB. A conductor disposed in the passageway is movable between a retracted position in which a contact end of the conductor is disposed within the passageway of the housing and an extended position in which the contact end of the conductor is disposed outside of the housing and in contact with the signal path.

    摘要翻译： 访问和/或验证芯片封装和印刷电路板（“PCB”）之间的连接的装置，特别是在没有背面测量通路的封装中，包括用于插入芯片封装和PCB之间的壳体。 壳体中的通道连接入口和出口与壳体。 入口设置在壳体的远离芯片封装的一端。 出口设置在芯片封装下方的壳体的一侧，使得通道指向芯片封装和PCB之间的信号路径。 设置在通道中的导体可在缩回位置之间移动，在该缩回位置，导体的接触端设置在壳体的通道内，并且延伸位置，其中导体的接触端设置在壳体的外部并与其接触 信号路径。

    METHODS FOR MANUFACTURING A SEMI-BURIED VIA AND ARTICLES COMPRISING THE SAME
    8.
    发明申请
    METHODS FOR MANUFACTURING A SEMI-BURIED VIA AND ARTICLES COMPRISING THE SAME 审中-公开
    制造半岛威力的方法及其包含的文章

    公开(公告)号：US20090056998A1

    公开(公告)日：2009-03-05

    申请号：US11848330

    申请日：2007-08-31

    申请人： Roger A. Booth, Jr. ,  John R. Dangler ,  Matthew S. Doyle ,  Jesse Hefner ,  Thomas W. Liang ,  Ankur K. Patel ,  Paul Rudrud

    发明人： Roger A. Booth, Jr. ,  John R. Dangler ,  Matthew S. Doyle ,  Jesse Hefner ,  Thomas W. Liang ,  Ankur K. Patel ,  Paul Rudrud

    IPC分类号： H05K1/11 ,  H05K3/10

    CPC分类号： H05K3/429 ,  H05K1/0222 ,  H05K1/115 ,  H05K2201/09536 ,  H05K2201/09809 ,  H05K2203/061 ,  Y10T29/49165

    摘要： Disclosed herein is a method comprising drilling a first hole in a multilayered device; the multilayered device comprising a fill layer disposed between and in intimate contact with two layers of a first electrically conducting material; the fill layer being electrically insulating; plating the first hole with a slurry; the slurry comprising a magnetic material, an electrically conducting material, or a combination comprising at least one of the foregoing materials; filling the first hole with a fill material; the fill material being electrically insulating; laminating a first layer and a second layer on opposing faces of the multilayered device to form a laminate; the opposing faces being the faces through which the first hole is drilled; the first layer and the second layer each comprising a second electrically conducting material; drilling a second hole through the laminate; the second hole having a circumference that is encompassed by a circumference of the first hole; and plating the surface of the second hole with a third electrically conducting material.

    摘要翻译： 本文公开了一种方法，包括在多层装置中钻出第一孔; 所述多层器件包括设置在两层第一导电材料之间并与之紧密接触的填充层; 填充层电绝缘; 用浆料电镀第一个孔; 所述浆料包括磁性材料，导电材料或包含至少一种前述材料的组合; 用填充材料填充第一个孔; 填充材料电绝缘; 在所述多层器件的相对面上层叠第一层和第二层以形成层压体; 相对的面是钻出第一孔的面; 所述第一层和所述第二层各自包括第二导电材料; 穿过层压板钻出第二个孔; 所述第二孔具有由所述第一孔的圆周包围的圆周; 以及用第三导电材料电镀所述第二孔的表面。

    Unlock mode in source synchronous receivers
    9.
    发明授权
    Unlock mode in source synchronous receivers 失效
    源同步接收器中的解锁模式

    公开(公告)号：US07940878B2

    公开(公告)日：2011-05-10

    申请号：US11678256

    申请日：2007-02-23

    申请人： Steven J. Baumgartner ,  Timothy C. Buchholtz ,  Andrew D. Davies ,  Thomas W. Liang ,  Andrew B. Maki ,  Thomas Pham ,  Dana M. Woeste ,  Daniel G. Young

    发明人： Steven J. Baumgartner ,  Timothy C. Buchholtz ,  Andrew D. Davies ,  Thomas W. Liang ,  Andrew B. Maki ,  Thomas Pham ,  Dana M. Woeste ,  Daniel G. Young

    IPC分类号： H03D3/24 ,  H04L7/00

    CPC分类号： H03L7/0812 ,  H04L7/0008

    摘要： A phase locked loop generates an output corresponding to a source synchronous input and an input link clock signal. A phase locking feedback system receives the input and an input link clock signal and detects phase deviations between the output and the input. The phase locking feedback system also adjusts an adjusted clock signal based on the phase deviations thereby causing the phase locking feedback system to generate the output so that the output has a steady phase relationship with the input. A first mechanism causes the phase locking feedback system not to track phase deviations between the output and the input upon occurrence of a first predefined event, thereby maintaining the adjusted clock signal at a current state.

    摘要翻译： 锁相环产生对应于源同步输入和输入链路时钟信号的输出。 相位锁定反馈系统接收输入和输入链路时钟信号，并检测输出和输入之间的相位偏差。 相位锁定反馈系统还基于相位偏差来调整调整的时钟信号，从而使相位锁定反馈系统产生输出，使得输出与输入具有稳定的相位关系。 第一机制使得相位锁定反馈系统在出现第一预定义事件时不跟踪输出和输入之间的相位偏差，从而将经调整的时钟信号保持在当前状态。