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    DOPING OF ZrO2 FOR DRAM APPLICATIONS
    2.
    发明申请
    DOPING OF ZrO2 FOR DRAM APPLICATIONS 审中-公开
    用于DRAM应用的ZrO2的掺杂

    公开(公告)号：US20160343795A1

    公开(公告)日：2016-11-24

    申请号：US15161217

    申请日：2016-05-21

    Applicant: Entegris, Inc.

    Inventor： Julie Cissell ,  Chongying Xu ,  Thomas M. Cameron ,  William Hunks ,  David W. Peters

    IPC: H01L49/02 ,  C23C16/455 ,  H01L21/02

    CPC classification number: H01L28/40 ,  C23C16/45525 ,  H01L21/02189 ,  H01L21/02194 ,  H01L21/0228

    Abstract: A method of forming a dielectric material, comprising doping a zirconium oxide material, using a dopant precursor selected from the group consisting of Ti(NMe2)4; Ti(NMeEt)4; Ti(NEt2)4; TiCl4; tBuN=Nb(NEt2)3; tBuN=Nb(NMe2)3; t-BuN=Nb(NEtMe)3; t-AmN=Nb(NEt2)3; t-AmN=Nb(NEtMe)3; t-AmN=Nb(NMe2)3; t-AmN=Nb(OBu-t)3; Nb-13; Nb(NEt2)4; Nb(NEt2)5; Nb(N(CH3)2)5; Nb(OC2H5)5; Nb(thd)(OPr-i)4; SiH(OMe)3; SiCl4; Si(NMe2)4; (Me3Si)2NH; GeRax(ORb)4-x wherein x is from 0 to 4, each Ra is independently selected from H or C1-C8 alkyl and each Rb is independently selected from C1-C8 alkyl; GeCl4; Ge(NRa2)4 wherein each Ra is independently selected from H and C1-C8 alkyl; and (Rb3Ge)2NH wherein each Rb is independently selected from C1-C8 alkyl; bis(N,N′-diisopropyl-1,3-propanediamide) titanium; and tetrakis(isopropylmethylamido) titanium; wherein Me is methyl, Et is ethyl, Pr-i is isopropyl, t-Bu is tertiary butyl, t-Am is tertiary amyl, and thd is 2,2,6,6-tetramethyl-3,5-heptanedionate. Doped zirconium oxide materials of the present disclosure are usefully employed in ferroelectric capacitors and dynamic random access memory (DRAM) devices.

    Abstract translation: 一种形成电介质材料的方法，包括使用选自Ti（NMe 2）4的掺杂剂前体掺杂氧化锆材料; Ti（NMeEt）4; Ti（NEt2）4; TiCl4; tBuN = Nb（NEt2）3; tBuN = Nb（NMe2）3; t-BuN = Nb（NEtMe）3; t-AmN = Nb（NEt2）3; t-AmN = Nb（NEtMe）3; t-AmN = Nb（NMe2）3; t-AmN = Nb（OBu-t）3; Nb-13; Nb（NEt2）4; Nb（NEt2）5; Nb（N（CH 3）2）5; Nb（OC2H5）5; Nb（thd）（OPr-i）4; SiH（OMe）3; SiCl4; Si（NMe2）4; （Me 3 Si）2 NH GeRax（ORb）4-x其中x为0至4，每个R a独立地选自H或C 1 -C 8烷基，并且每个R b独立地选自C 1 -C 8烷基; GeCl4; Ge（NRa 2）4，其中每个R a独立地选自H和C 1 -C 8烷基; 和（Rb 3 Ge）2 NH，其中每个R b独立地选自C 1 -C 8烷基; 双（N，N'-二异丙基-1,3-丙二酰胺）钛; 和四（异丙基甲基氨基）钛; 其中Me是甲基，Et是乙基，Pr-i是异丙基，t-Bu是叔丁基，t-Am是叔戊基，thd是2,2,6,6-四甲基-3,5-庚二酮酸。 本公开的掺杂氧化锆材料有用地用于铁电电容器和动态随机存取存储器（DRAM）器件中。

    FLUORINE FREE TUNGSTEN ALD/CVD PROCESS
    3.
    发明申请
    FLUORINE FREE TUNGSTEN ALD/CVD PROCESS 有权
    无氟化学气相沉积/ CVD工艺

    公开(公告)号：US20150251920A1

    公开(公告)日：2015-09-10

    申请号：US14431116

    申请日：2013-09-26

    Applicant: ENTEGRIS, INC.

    Inventor： Weimin Li ,  David W. Peters ,  Scott L. Battle ,  William Hunks

    IPC: C01G41/00 ,  C07F11/00 ,  H01B1/02 ,  C09D5/24 ,  C23C16/16 ,  C01C3/11

    CPC classification number: C01G41/006 ,  C01C3/11 ,  C07F11/00 ,  C07F11/005 ,  C09D5/24 ,  C23C16/16 ,  C23C16/18 ,  C23C16/4485 ,  H01B1/02

    Abstract: A tungsten precursor useful for forming tungsten-containing material on a substrate, e.g., in the manufacture of microelectronic devices. The tungsten precursor is devoid of fluorine content, and may be utilized in a solid delivery process or other vapor deposition technique, to form films such as elemental tungsten for metallization of integrated circuits, or tungsten nitride films or other tungsten compound films that are useful as base layers for subsequent elemental tungsten metallization.

    Abstract translation: 用于在衬底上形成含钨材料的钨前体，例如在微电子器件的制造中。 钨前体没有氟含量，并且可以用于固体递送过程或其它气相沉积技术，以形成诸如用于集成电路金属化的元素钨，或氮化钨膜或其它钨化合物膜的膜，其可用作 用于随后的元素钨金属化的基础层。

    Cobalt deposition selectivity on copper and dielectrics
    4.
    发明授权
    Cobalt deposition selectivity on copper and dielectrics 有权

    公开(公告)号：US11476158B2

    公开(公告)日：2022-10-18

    申请号：US15510732

    申请日：2015-09-03

    Applicant: Entegris, Inc.

    Inventor： Philip S. H. Chen ,  William Hunks ,  Steven Lippy ,  Ruben Remco Lieten

    IPC: C23C16/02 ,  H01L21/768 ,  H01L21/285 ,  H01L21/02 ,  C23C16/56 ,  C23C16/04 ,  C23C16/18 ,  H01L21/3213 ,  C23C16/06 ,  C23C16/455 ,  H01L23/532 ,  H01L21/311

    Abstract: A process for forming cobalt on a substrate, comprising: volatilizing a cobalt precursor of the disclosure, to form, a precursor vapor: and contacting the precursor vapor with the substrate under vapor deposition conditions effective for depositing cobalt on the substrate from the precursor vapor, wherein the vapor deposition conditions include temperature not exceeding 200° C., wherein: the substrate includes copper surface and dielectric material, e.g., ultra-low dielectric material. Such cobalt deposition process can be used to manufacture product articles in which the deposited cobalt forms a capping layer, encapsulating layer, electrode, diffusion layer, or seed for electroplating of metal thereon, e.g., a semiconductor device, flat-panel, display, or solar panel. A cleaning composition containing base and oxidizing agent components may be employed to clean the copper prior to deposition of cobalt thereon, to achieve substantially reduced defects in the deposited cobalt.

    Precursors for silicon dioxide gap fill
    5.
    发明授权
    Precursors for silicon dioxide gap fill 有权

    公开(公告)号：US10043658B2

    公开(公告)日：2018-08-07

    申请号：US15862205

    申请日：2018-01-04

    Applicant: Entegris, Inc.

    Inventor： William Hunks ,  Chongying Xu ,  Bryan C. Hendrix ,  Jeffrey F. Roeder ,  Steven M. Bilodeau ,  Weimin Li

    IPC: H01L21/02 ,  H01L29/06

    Abstract: A full fill trench structure is described, including a microelectronic device substrate having a high aspect ratio trench therein and filled with silicon dioxide of a substantially void-free character and substantially uniform density throughout its bulk mass. A method of manufacturing a semiconductor product also is described, involving use of specific silicon precursor compositions for forming substantially void-free and substantially uniform density silicon dioxide material in the trench. The precursor fill composition may include silicon and germanium, to produce a microelectronic device structure including a GeO2/SiO2 trench fill material. A suppressor component may be employed in the precursor fill composition, to eliminate or minimize seam formation in the cured trench fill material.

    PRECURSORS FOR SILICON DIOXIDE GAP FILL
    8.
    发明申请
    PRECURSORS FOR SILICON DIOXIDE GAP FILL 审中-公开
    硅二氧化硅填料的前身

    公开(公告)号：US20160225615A1

    公开(公告)日：2016-08-04

    申请号：US15093865

    申请日：2016-04-08

    Applicant: Entegris, Inc.

    Inventor： William Hunks ,  Chongying Xu ,  Bryan C. Hendrix ,  Jeffrey F. Roeder ,  Steven M. Bilodeau ,  Weimin Li

    IPC: H01L21/02 ,  H01L29/06

    CPC classification number: H01L21/02211 ,  H01L21/02123 ,  H01L21/02164 ,  H01L21/02216 ,  H01L21/02222 ,  H01L21/02263 ,  H01L21/31604 ,  H01L21/31608 ,  H01L29/0649

    Abstract: A full fill trench structure is described, including a microelectronic device substrate having a high aspect ratio trench therein and filled with silicon dioxide of a substantially void-free character and substantially uniform density throughout its bulk mass. A method of manufacturing a semiconductor product also is described, involving use of specific silicon precursor compositions for forming substantially void-free and substantially uniform density silicon dioxide material in the trench. The precursor fill composition may include silicon and germanium, to produce a microelectronic device structure including a GeO2/SiO2 trench fill material. A suppressor component may be employed in the precursor fill composition, to eliminate or minimize seam formation in the cured trench fill material.

    Abstract translation: 描述了一种全填充沟槽结构，其包括其中具有高纵横比沟槽的微电子器件衬底，并填充了其整个整体质量基本上无空隙特征和基本均匀密度的二氧化硅。 还描述了制造半导体产品的方法，其涉及使用特定的硅前体组合物，用于在沟槽中形成基本上无空隙且基本均匀的密度二氧化硅材料。 前体填充组合物可以包括硅和锗，以产生包括GeO 2 / SiO 2沟槽填充材料的微电子器件结构。 可以在前体填充组合物中使用抑制剂组分，以消除或最小化固化沟槽填充材料中的接缝形成。

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