公开(公告)号：US20110237085A1

公开(公告)日：2011-09-29

申请号：US13152865

申请日：2011-06-03

申请人： FRANCIMAR CAMPANA SCHMITT ,  Li-Qun Xia ,  Son Van Nguyen ,  Shankar Venkataraman

发明人： FRANCIMAR CAMPANA SCHMITT ,  Li-Qun Xia ,  Son Van Nguyen ,  Shankar Venkataraman

IPC分类号： H01L21/31

CPC分类号： H01L21/76835 ,  C23C16/0272 ,  C23C16/30 ,  C23C16/325 ,  C23C16/505 ,  C23C16/56 ,  H01L21/02126 ,  H01L21/02167 ,  H01L21/022 ,  H01L21/02203 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02304 ,  H01L21/0234 ,  H01L21/02351 ,  H01L21/3105 ,  H01L21/31058 ,  H01L21/3121 ,  H01L21/3148 ,  H01L21/31633 ,  H01L21/76801 ,  H01L21/7681 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76832

摘要： Methods are provided for processing a substrate for depositing an adhesion layer having a low dielectric constant between two low k dielectric layers. In one aspect, the invention provides a method for processing a substrate including depositing a barrier layer on the substrate, wherein the barrier layer comprises silicon and carbon and has a dielectric constant less than 4, depositing a dielectric initiation layer adjacent the barrier layer, and depositing a first dielectric layer adjacent the dielectric initiation layer, wherein the dielectric layer comprises silicon, oxygen, and carbon and has a dielectric constant of about 3 or less.

摘要翻译： 提供了用于处理用于沉积在两个低k电介质层之间具有低介电常数的粘合层的衬底的方法。 一方面，本发明提供了一种处理衬底的方法，包括在衬底上沉积阻挡层，其中阻挡层包括硅和碳并具有小于4的介电常数，沉积与阻挡层相邻的电介质起始层，以及 沉积与电介质起始层相邻的第一电介质层，其中介电层包括硅，氧和碳并且具有约3或更小的介电常数。

公开(公告)号：US07226876B2

公开(公告)日：2007-06-05

申请号：US11126910

申请日：2005-05-11

申请人： Francimar Campana Schmitt ,  Li-Qun Xia ,  Son Van Nguyen ,  Shankar Venkataraman

发明人： Francimar Campana Schmitt ,  Li-Qun Xia ,  Son Van Nguyen ,  Shankar Venkataraman

IPC分类号： H01L21/31 ,  H01L21/469

CPC分类号： H01L21/76835 ,  C23C16/0272 ,  C23C16/30 ,  C23C16/325 ,  C23C16/505 ,  C23C16/56 ,  H01L21/02126 ,  H01L21/02167 ,  H01L21/022 ,  H01L21/02203 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02304 ,  H01L21/0234 ,  H01L21/02351 ,  H01L21/3105 ,  H01L21/31058 ,  H01L21/3121 ,  H01L21/3148 ,  H01L21/31633 ,  H01L21/76801 ,  H01L21/7681 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76832

摘要： Methods are provided for processing a substrate for depositing an adhesion layer having a low dielectric constant between two low k dielectric layers. In one aspect, the invention provides a method for processing a substrate including depositing a barrier layer on the substrate, wherein the barrier layer comprises silicon and carbon and has a dielectric constant less than 4, depositing a dielectric initiation layer adjacent the barrier layer, and depositing a first dielectric layer adjacent the dielectric initiation layer, wherein the dielectric layer comprises silicon, oxygen, and carbon and has a dielectric constant of about 3 or less.

摘要翻译： 提供了用于处理用于沉积在两个低k电介质层之间具有低介电常数的粘合层的衬底的方法。 一方面，本发明提供了一种处理衬底的方法，包括在衬底上沉积阻挡层，其中阻挡层包括硅和碳并具有小于4的介电常数，沉积与阻挡层相邻的电介质起始层，以及 沉积与电介质起始层相邻的第一电介质层，其中介电层包括硅，氧和碳并且具有约3或更小的介电常数。

公开(公告)号：US20090305514A1

公开(公告)日：2009-12-10

申请号：US12506954

申请日：2009-07-21

申请人： Francimar Campana Schmitt ,  Li-Qun Xia ,  Son Van Nguyen ,  Shankar Venkataraman

发明人： Francimar Campana Schmitt ,  Li-Qun Xia ,  Son Van Nguyen ,  Shankar Venkataraman

IPC分类号： H01L21/316 ,  H01L21/314

CPC分类号： H01L21/76835 ,  C23C16/0272 ,  C23C16/30 ,  C23C16/325 ,  C23C16/505 ,  C23C16/56 ,  H01L21/02126 ,  H01L21/02167 ,  H01L21/022 ,  H01L21/02203 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02304 ,  H01L21/0234 ,  H01L21/02351 ,  H01L21/3105 ,  H01L21/31058 ,  H01L21/3121 ,  H01L21/3148 ,  H01L21/31633 ,  H01L21/76801 ,  H01L21/7681 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76832

摘要： Methods are provided for processing a substrate for depositing an adhesion layer having a low dielectric constant between two low k dielectric layers. In one aspect, the invention provides a method for processing a substrate including depositing a barrier layer on the substrate, wherein the barrier layer comprises silicon and carbon and has a dielectric constant less than 4, depositing a dielectric initiation layer adjacent the barrier layer, and depositing a first dielectric layer adjacent the dielectric initiation layer, wherein the dielectric layer comprises silicon, oxygen, and carbon and has a dielectric constant of about 3 or less.

摘要翻译： 提供了用于处理用于沉积在两个低k电介质层之间具有低介电常数的粘合层的衬底的方法。 一方面，本发明提供了一种处理衬底的方法，包括在衬底上沉积阻挡层，其中阻挡层包括硅和碳并具有小于4的介电常数，沉积与阻挡层相邻的电介质起始层，以及 沉积与电介质起始层相邻的第一电介质层，其中介电层包括硅，氧和碳并且具有约3或更小的介电常数。

公开(公告)号：US07563728B2

公开(公告)日：2009-07-21

申请号：US11678752

申请日：2007-02-26

申请人： Francimar Campana Schmitt ,  Li-Qun Xia ,  Son Van Nguyen ,  Shankar Venkataraman

发明人： Francimar Campana Schmitt ,  Li-Qun Xia ,  Son Van Nguyen ,  Shankar Venkataraman

IPC分类号： H01L21/31 ,  H01L21/469

CPC分类号： H01L21/76835 ,  C23C16/0272 ,  C23C16/30 ,  C23C16/325 ,  C23C16/505 ,  C23C16/56 ,  H01L21/02126 ,  H01L21/02167 ,  H01L21/022 ,  H01L21/02203 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02304 ,  H01L21/0234 ,  H01L21/02351 ,  H01L21/3105 ,  H01L21/31058 ,  H01L21/3121 ,  H01L21/3148 ,  H01L21/31633 ,  H01L21/76801 ,  H01L21/7681 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76832

摘要： Methods are provided for processing a substrate for depositing an adhesion layer having a low dielectric constant between two low k dielectric layers. In one aspect, the invention provides a method for processing a substrate including depositing a barrier layer on the substrate, wherein the barrier layer comprises silicon and carbon and has a dielectric constant less than 4, depositing a dielectric initiation layer adjacent the barrier layer, and depositing a first dielectric layer adjacent the dielectric initiation layer, wherein the dielectric layer comprises silicon, oxygen, and carbon and has a dielectric constant of about 3 or less.

摘要翻译： 提供了用于处理用于沉积在两个低k电介质层之间具有低介电常数的粘合层的衬底的方法。 一方面，本发明提供了一种处理衬底的方法，包括在衬底上沉积阻挡层，其中阻挡层包括硅和碳并具有小于4的介电常数，沉积与阻挡层相邻的电介质起始层，以及 沉积与电介质起始层相邻的第一电介质层，其中介电层包括硅，氧和碳并且具有约3或更小的介电常数。

公开(公告)号：US06913992B2

公开(公告)日：2005-07-05

申请号：US10383837

申请日：2003-03-07

申请人： Francimar Campana Schmitt ,  Li-Qun Xia ,  Son Van Nguyen ,  Shankar Venkataraman

发明人： Francimar Campana Schmitt ,  Li-Qun Xia ,  Son Van Nguyen ,  Shankar Venkataraman

IPC分类号： C23C16/02 ,  C23C16/30 ,  C23C16/32 ,  C23C16/505 ,  C23C16/56 ,  H01L21/3105 ,  H01L21/312 ,  H01L21/314 ,  H01L21/316 ,  H01L21/768 ,  H01L21/4763

CPC分类号： H01L21/76835 ,  C23C16/0272 ,  C23C16/30 ,  C23C16/325 ,  C23C16/505 ,  C23C16/56 ,  H01L21/02126 ,  H01L21/02167 ,  H01L21/022 ,  H01L21/02203 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02304 ,  H01L21/0234 ,  H01L21/02351 ,  H01L21/3105 ,  H01L21/31058 ,  H01L21/3121 ,  H01L21/3148 ,  H01L21/31633 ,  H01L21/76801 ,  H01L21/7681 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76832

摘要： Methods are provided for processing a substrate for depositing an adhesion layer having a low dielectric constant between two low k dielectric layers. In one aspect, the invention provides a method for processing a substrate including depositing a barrier layer on the substrate, wherein the barrier layer comprises silicon and carbon and has a dielectric constant less than 4, depositing a dielectric initiation layer adjacent the barrier layer, and depositing a first dielectric layer adjacent the dielectric initiation layer, wherein the dielectric layer comprises silicon, oxygen, and carbon and has a dielectric constant of about 3 or less.

摘要翻译： 提供了用于处理用于沉积在两个低k电介质层之间具有低介电常数的粘合层的衬底的方法。 一方面，本发明提供了一种处理衬底的方法，包括在衬底上沉积阻挡层，其中阻挡层包括硅和碳并具有小于4的介电常数，沉积与阻挡层相邻的电介质起始层，以及 沉积与电介质起始层相邻的第一电介质层，其中介电层包括硅，氧和碳并且具有约3或更小的介电常数。

公开(公告)号：US07960294B2

公开(公告)日：2011-06-14

申请号：US12506954

申请日：2009-07-21

申请人： Francimar Campana Schmitt ,  Li-Qun Xia ,  Son Van Nguyen ,  Shankar Venkataraman

发明人： Francimar Campana Schmitt ,  Li-Qun Xia ,  Son Van Nguyen ,  Shankar Venkataraman

IPC分类号： H01L21/31 ,  H01L21/469

CPC分类号： H01L21/76835 ,  C23C16/0272 ,  C23C16/30 ,  C23C16/325 ,  C23C16/505 ,  C23C16/56 ,  H01L21/02126 ,  H01L21/02167 ,  H01L21/022 ,  H01L21/02203 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02304 ,  H01L21/0234 ,  H01L21/02351 ,  H01L21/3105 ,  H01L21/31058 ,  H01L21/3121 ,  H01L21/3148 ,  H01L21/31633 ,  H01L21/76801 ,  H01L21/7681 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76832

摘要： Methods are provided for processing a substrate for depositing an adhesion layer having a low dielectric constant between two low k dielectric layers. In one aspect, the invention provides a method for processing a substrate including depositing a barrier layer on the substrate, wherein the barrier layer comprises silicon and carbon and has a dielectric constant less than 4, depositing a dielectric initiation layer adjacent the barrier layer, and depositing a first dielectric layer adjacent the dielectric initiation layer, wherein the dielectric layer comprises silicon, oxygen, and carbon and has a dielectric constant of about 3 or less.

摘要翻译： 提供了用于处理用于沉积在两个低k电介质层之间具有低介电常数的粘合层的衬底的方法。 一方面，本发明提供了一种处理衬底的方法，包括在衬底上沉积阻挡层，其中阻挡层包括硅和碳并具有小于4的介电常数，沉积与阻挡层相邻的电介质起始层，以及 沉积与电介质起始层相邻的第一电介质层，其中介电层包括硅，氧和碳并且具有约3或更小的介电常数。

公开(公告)号：US08569166B2

公开(公告)日：2013-10-29

申请号：US13152865

申请日：2011-06-03

申请人： Francimar Campana Schmitt ,  Li-Qun Xia ,  Son Van Nguyen ,  Shankar Venkataraman

发明人： Francimar Campana Schmitt ,  Li-Qun Xia ,  Son Van Nguyen ,  Shankar Venkataraman

IPC分类号： H01L21/4763

CPC分类号： H01L21/76835 ,  C23C16/0272 ,  C23C16/30 ,  C23C16/325 ,  C23C16/505 ,  C23C16/56 ,  H01L21/02126 ,  H01L21/02167 ,  H01L21/022 ,  H01L21/02203 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02304 ,  H01L21/0234 ,  H01L21/02351 ,  H01L21/3105 ,  H01L21/31058 ,  H01L21/3121 ,  H01L21/3148 ,  H01L21/31633 ,  H01L21/76801 ,  H01L21/7681 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76832

摘要： Methods are provided for processing a substrate for depositing an adhesion layer having a low dielectric constant between two low k dielectric layers. In one aspect, the invention provides a method for processing a substrate including depositing a barrier layer on the substrate, wherein the barrier layer comprises silicon and carbon and has a dielectric constant less than 4, depositing a dielectric initiation layer adjacent the barrier layer, and depositing a first dielectric layer adjacent the dielectric initiation layer, wherein the dielectric layer comprises silicon, oxygen, and carbon and has a dielectric constant of about 3 or less.

公开(公告)号：US06878620B2

公开(公告)日：2005-04-12

申请号：US10293543

申请日：2002-11-12

申请人： Son Van Nguyen ,  Li-Qun Xia ,  Srinivas D. Nemani

发明人： Son Van Nguyen ,  Li-Qun Xia ,  Srinivas D. Nemani

IPC分类号： H01L21/768 ,  H01L21/4763

CPC分类号： H01L21/76844 ,  H01L21/76829 ,  H01L21/76831

摘要： Methods and apparatus for protecting the dielectric layer sidewalls of openings, such as vias and trenches, in semiconductor substrates are provided. A pre-liner and a liner are deposited over the sidewalls of the openings as part of integrated processing sequences that either do not remove the photoresist until subsequent processing or remove the photoresist with a plasma etch that does not contaminate the sidewalls of the openings.

摘要翻译： 提供了用于保护半导体衬底中诸如通路和沟槽之类的开口的电介质层侧壁的方法和装置。 预先衬里和衬垫沉积在开口的侧壁上，作为集成处理顺序的一部分，其不会除去光致抗蚀剂，直到后续处理或用不污染开口侧壁的等离子体蚀刻去除光致抗蚀剂。

公开(公告)号：US08476743B2

公开(公告)日：2013-07-02

申请号：US13228857

申请日：2011-09-09

申请人： Son Van Nguyen ,  Alfred Grill ,  Thomas J. Haigh, Jr. ,  Sanjay Mehta

发明人： Son Van Nguyen ,  Alfred Grill ,  Thomas J. Haigh, Jr. ,  Sanjay Mehta

IPC分类号： H01L23/58 ,  H01L21/31 ,  C23C8/54 ,  B05D5/12

CPC分类号： H01L21/02112 ,  H01B3/12 ,  H01L21/02274 ,  H01L21/02318 ,  H01L21/02348 ,  H01L21/02351 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76828 ,  H01L21/76829 ,  H01L21/76832 ,  H01L21/76834 ,  H01L23/53252 ,  H01L23/53276 ,  H01L29/1054 ,  H01L29/1606 ,  H01L29/456 ,  H01L29/4908 ,  H01L29/4983 ,  H01L29/78648 ,  H01L2924/0002 ,  H01L2924/00

摘要： A carbon-rich carbon boron nitride dielectric film having a dielectric constant of equal to, or less than 3.6 is provided that can be used as a component in various electronic devices. The carbon-rich carbon boron nitride dielectric film has a formula of CxByNz wherein x is 35 atomic percent or greater, y is from 6 atomic percent to 32 atomic percent and z is from 8 atomic percent to 33 atomic percent.

摘要翻译： 提供具有等于或小于3.6的介电常数的富碳碳氮化硼介电膜，其可用作各种电子器件中的组分。 富碳碳氮化硼电介质膜具有C x B y N z的化学式，其中x为35原子％以上，y为6原子％〜32原子％，z为8原子％〜33原子％。

公开(公告)号：US20120175023A1

公开(公告)日：2012-07-12

申请号：US13420728

申请日：2012-03-15

申请人： Son Van Nguyen ,  Alfred Grill ,  Thomas J. Haigh, JR. ,  Hosadurga Shobha ,  Tuan A. Vo

发明人： Son Van Nguyen ,  Alfred Grill ,  Thomas J. Haigh, JR. ,  Hosadurga Shobha ,  Tuan A. Vo

IPC分类号： C23C8/00 ,  C23C28/04

CPC分类号： H01L21/76849 ,  H01L21/76846 ,  H01L21/76864 ,  H01L21/76867

摘要： An interconnect structure is provided that has improved electromigration resistance as well as methods of forming such an interconnect structure. The interconnect structure includes a composite M-MOx cap located at least on the upper surface of the Cu-containing material within the at least one opening. The composite M-MOx cap includes an upper region that is composed of the metal having a higher affinity for oxygen than copper and copper oxide and a lower region that is composed of a non-stoichiometric oxide of said metal.

摘要翻译： 提供了具有改进的电迁移阻力的互连结构以及形成这种互连结构的方法。 互连结构包括至少位于至少一个开口内的含Cu材料的上表面上的复合M-MOx帽。 复合M-MOx帽包括由与氧和氧化铜相比具有比氧更高的亲和性的金属构成的上部区域和由所述金属的非化学计量氧化物构成的下部区域。