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公开(公告)号：US20180027654A1
公开(公告)日：2018-01-25
申请号：US15613427
申请日：2017-06-05
Applicant: FUJITSU LIMITED
Inventor： Takashi KANDA , Shunji Baba
Abstract: A board includes a substrate having a bending property, a wiring pattern formed over the substrate and having a bending property, a conductive member formed over the wiring pattern, an electronic component; and a bonding member that bonds the conductive member and the electronic component to each other. And an electronic device includes a board having a bending property, a wiring pattern formed over the substrate and having a bending property, a conductive member formed over the wiring pattern, an electronic component; and a bonding member that bonds the conductive member and the electronic component to each other.
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2.发明申请公开(公告)号：US20160255728A1
公开(公告)日：2016-09-01
申请号：US14976266
申请日：2015-12-21
Applicant: FUJITSU LIMITED
Inventor： Takashi KANDA
CPC classification number: B23K1/0016 , H01L23/15 , H01L23/367 , H01L23/3731 , H01L23/49811 , H01L23/49827 , H01L2224/16227 , H01L2224/32225 , H01L2224/32245 , H01L2224/73253 , H01L2924/15311 , H01L2924/16251 , H05K1/0271 , H05K1/113 , H05K1/115 , H05K1/181 , H05K3/3436 , H05K2201/09036 , H05K2201/09136 , H05K2201/094 , H05K2201/09572 , H05K2201/10295 , H05K2201/10303 , H05K2201/10734 , Y02P70/613
Abstract: A semiconductor package includes: a first substrate, disposed so as to be opposed to a second substrate, on which a semiconductor chip is mounted; and a solder ball formed on the first substrate, wherein the solder ball is joined to a pin that penetrates through the second substrate.
Abstract translation: 半导体封装包括：第一衬底，被布置成与其上安装有半导体芯片的第二衬底相对; 以及形成在所述第一基板上的焊球，其中所述焊球与穿过所述第二基板的销接合。
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公开(公告)号：US20160118322A1
公开(公告)日：2016-04-28
申请号：US14837131
申请日：2015-08-27
Applicant: FUJITSU LIMITED
Inventor： Takashi KANDA , Shunji BABA
IPC: H01L23/498 , H01L21/48 , H05K1/11
CPC classification number: H01L23/49822 , H01L23/49827 , H01L23/5385 , H01L24/00 , H01L24/14 , H01L24/17 , H01L2224/1403 , H01L2224/16225 , H05K3/4614 , H05K3/4694 , H05K2201/10674
Abstract: A laminated substrate includes: a core portion; a first wiring portion configured to be stacked on the core portion and to include a first exposed surface formed by exposing at least part of a surface of the first wiring portion; and a second wiring portion configured to be stacked on the first wiring portion, to include a second exposed surface formed by exposing at least part of a surface of the second wiring portion, and to have higher wiring density of conductor than the first wiring portion has, wherein the first exposed surface and the second exposed surface are provided respectively with a first pad and a second pad which are to be connected to electrodes of one semiconductor chip to be mounted on both the first exposed surface and the second exposed surface.
Abstract translation: 层叠基板包括：芯部; 第一布线部，被配置为堆叠在所述芯部上，并且包括通过暴露所述第一布线部的表面的至少一部分而形成的第一暴露表面; 以及第二布线部，其被配置为层叠在所述第一布线部上，以包括通过暴露所述第二布线部的表面的至少一部分而形成的第二暴露表面，并且具有比所述第一布线部具有更高的导体布线密度 其中，所述第一暴露表面和所述第二暴露表面分别设置有要连接到要安装在所述第一暴露表面和所述第二暴露表面上的一个半导体芯片的电极的第一焊盘和第二焊盘。
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Patent Agency Ranking
4.发明申请公开(公告)号：US20160360617A1
公开(公告)日：2016-12-08
申请号：US15239205
申请日：2016-08-17
Applicant: FUJITSU LIMITED
Inventor： Takashi KANDA
CPC classification number: H05K1/113 , H05K1/0298 , H05K1/115 , H05K3/4069 , H05K3/4617 , H05K3/4623
Abstract: There is provided a manufacturing method of a layered circuit board in which a first board and a second board are layered, the manufacturing. The method includes arranging an adhesive resin sheet on the first board so that one face faces the first board, the adhesive resin sheet including a plurality of variant via holes, an opening area on the one face of each of the plurality of variant via holes being larger than an opening area on the other face, filling the variant via holes with conductive paste, arranging the second board on the other face of the adhesive resin sheet after the filling with the conductive paste, and performing heat press treatment to apply pressure to the adhesive resin sheet in a layering direction of the first board and the second board under heat.
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5.发明申请公开(公告)号：US20130341767A1
公开(公告)日：2013-12-26
申请号：US13896739
申请日：2013-05-17
Applicant: Fujitsu Limited
Inventor： Manabu WATANABE , Masateru KOIDE , Kenji FUKUZONO , Takashi KANDA
CPC classification number: H01L21/50 , H01L21/82 , H01L29/06 , H01L2924/15311 , H01L2924/19106 , H05K1/141 , H05K3/323 , H05K3/368 , H05K2201/2018
Abstract: A semiconductor device mounting structure includes: a substrate with an opening provided therein; a frame member with a frame body and a protruding portion that protrudes from the frame body, the frame body being formed and accommodated in a groove around the opening; a coreless substrate provided above the substrate and supported by the protruding portion of the frame member; and semiconductor elements provided on the coreless substrate.
Abstract translation: 半导体器件安装结构包括：其中设置有开口的基板; 框架构件，其具有框架体和从框架体突出的突出部分，框体形成并容纳在围绕开口的凹槽中; 无芯基板，设置在所述基板的上方并由所述框架部件的突出部支撑; 以及设置在无芯基板上的半导体元件。
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公开(公告)号：US20130340249A1
公开(公告)日：2013-12-26
申请号：US13870368
申请日：2013-04-25
Applicant: FUJITSU LIMITED
Inventor： Takashi KANDA
IPC: H05K3/46
CPC classification number: H05K3/46 , H05K3/4069 , H05K3/4617 , H05K2203/1121 , Y10T29/49165
Abstract: A method of manufacturing a multilayer circuit substrate, the method includes: injecting a conductive paste into through-holes provided in an insulating substrate to one or both sides of which a protection film is attached; cooling and setting the conductive paste injected into the through-holes; and removing the protection film from the insulating substrate after cooling and setting the conductive paste.
Abstract translation: 一种制造多层电路基板的方法，该方法包括：将导电浆料注入设置在绝缘基板上的通孔中，其一面或两面上安装有保护膜; 冷却并设置注入通孔的导电膏; 并且在冷却和设置导电浆料之后从绝缘基板上去除保护膜。
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7.发明申请METHOD FOR MANUFACTURING LAYERED CIRCUIT BOARD, LAYERED CIRCUIT BOARD, AND ELECTRONIC DEVICE 有权制造层状电路板，层状电路板和电子器件的方法公开(公告)号：US20130126221A1
公开(公告)日：2013-05-23
申请号：US13677537
申请日：2012-11-15
Applicant: FUJITSU LIMITED
Inventor： Takashi KANDA
CPC classification number: H05K1/113 , H05K1/0298 , H05K1/115 , H05K3/4069 , H05K3/4617 , H05K3/4623
Abstract: There is provided a manufacturing method of a layered circuit board in which a first board and a second board are layered, the manufacturing. The method includes arranging an adhesive resin sheet on the first board so that one face faces the first board, the adhesive resin sheet including a plurality of variant via holes, an opening area on the one face of each of the plurality of variant via holes being larger than an opening area on the other face, filling the variant via holes with conductive paste, arranging the second board on the other face of the adhesive resin sheet after the filling with the conductive paste, and performing heat press treatment to apply pressure to the adhesive resin sheet in a layering direction of the first board and the second board under heat.
Abstract translation: 提供了一种分层电路板的制造方法，其中第一板和第二板被层叠，制造。 该方法包括在第一板上布置粘合树脂片，使得一个面朝向第一板，粘合树脂片包括多个不同的通孔，多个不同通孔中的每一个的一个面上的开口面积为 大于另一面上的开口面积，用导电膏填充变体通孔，在填充导电浆料之后将第二板布置在粘合树脂片的另一面上，并进行热压处理以向 粘合树脂片在第一板和第二板的分层方向上加热。
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公开(公告)号：US20140193953A1
公开(公告)日：2014-07-10
申请号：US14203912
申请日：2014-03-11
Applicant: FUJITSU LIMITED
Inventor： Manabu WATANABE , Masateru KOIDE , Kenji FUKUZONO , Takashi KANDA
IPC: H01L21/50
CPC classification number: H01L21/50 , H01L21/82 , H01L29/06 , H01L2924/15311 , H01L2924/19106 , H05K1/141 , H05K3/323 , H05K3/368 , H05K2201/2018
Abstract: A semiconductor device mounting structure includes: a substrate with an opening provided therein; a frame member with a frame body and a protruding portion that protrudes from the frame body, the frame body being formed and accommodated in a groove around the opening; a coreless substrate provided above the substrate and supported by the protruding portion of the frame member; and semiconductor elements provided on the coreless substrate.
Abstract translation: 半导体器件安装结构包括：其中设置有开口的基板; 框架构件，其具有框架体和从框架体突出的突出部分，框体形成并容纳在围绕开口的凹槽中; 无芯基板，设置在所述基板的上方并由所述框架部件的突出部支撑; 以及设置在无芯基板上的半导体元件。
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