摘要:
The exemplary embodiments of the present invention provide a method and apparatus for enhancing the cooling of a chip stack of semiconductor chips. The method includes creating a first chip with circuitry on a first side and creating a second chip electrically and mechanically coupled to the first chip by a grid of connectors. The method further includes creating a cavity in a second side of the first chip between the connectors and filling the cavity with a thermal material. The chip stack of semiconductor chips with enhanced cooling apparatus includes a first chip with circuitry on a first side and a second chip electrically and mechanically coupled to the first chip by a grid of connectors. The apparatus further includes wherein portions of a second side of the first chip between the connectors is removed to provide a cavity in which a thermal material is placed.
摘要:
The chip stack of semiconductor chips with enhanced cooling apparatus includes a first chip with circuitry on a first side and a second chip electrically and mechanically coupled to the first chip by a grid of connectors. The apparatus further includes a thermal interface material pad placed between the first chip and the second chip, wherein the thermal interface material pad includes nanofibers aligned parallel to mating surfaces of the first chip and the second chip and nanofibers aligned perpendicular to mating surfaces of the first chip and the second chip
摘要:
The chip stack of semiconductor chips with enhanced cooling apparatus includes a first chip with circuitry on a first side and a second chip electrically and mechanically coupled to the first chip by a grid of connectors. The apparatus further includes a thermal interface material pad placed between the first chip and the second chip, wherein the thermal interface material pad includes nanofibers aligned parallel to mating surfaces of the first chip and the second chip and nanofibers aligned perpendicular to mating surfaces of the first chip and the second chip.
摘要:
A three-dimensional (3D) chip is fabricated from components that have been cut out of a two-dimensional (2D) chip. The components from the 2D chip are layered and coupled to create the layers of the 3D chip. By testing the 2D chip first, the layers of the 3D chip have been pre-tested, thus reducing testing and production costs.
摘要:
A circuit arrangement and method in one aspect utilize thermal-only through vias, extending between the opposing faces of stacked semiconductor dies, to increase the thermal conductivity of a multi-layer semiconductor stack. The thermal vias are provided in addition to data-carrying through vias, which communicate data signals between circuit layers, and power-carrying through vias, which are coupled to a power distribution network for the circuit layers, such that the thermal conductivity is increased above that which may be provided by the data-carrying and power-carrying through vias in the stack. A circuit arrangement and method in another aspect organize the circuit layers in a multi-layer semiconductor stack based upon current density so as to reduce power distribution losses in the stack.
摘要:
A propulsion system for a spacecraft includes a solar sail system and an electrodynamic tether system. The solar sail system is used to generate propulsion to propel the spacecraft through space using solar photons and the electrodynamic tether system is used to generate propulsion to steer the spacecraft into orbit and to perform orbital maneuvers around a planet using the planet's magnetic field. The electrodynamic tether system can also be used to generate power for the spacecraft using the planet's magnetic field.
摘要:
A closed circuit rebreather including a breathing hose assembly, head assembly and internal counterlung assembly having axial and radial gas flow passageways therethrough, wherein the assembly is housed within a tank and includes a scrubber substantially enclosed along its longitudinal length within a water impervious counterlung bladder, the scrubber including foraminous inner and outer tubes having a carbon dioxide absorbent material filling the space therebetween.
摘要:
A digital computer is provided having a clock generation circuit for generating a clock signal in response to an input signal from a fixed-frequency oscillator, which includes a first fixed-frequency oscillator and a second fixed-frequency oscillator, each providing an output signal. Also included is failure detection circuit for detecting a failure of either of the fixed-frequency oscillators, wherein a failure occurs when the first fixed-frequency oscillator or the second fixed-frequency oscillator ceases generating an output. A circuit synchronizing the output from the oscillators is coupled to both the first fixed-frequency oscillator and to the second fixed-frequency oscillator. This synchronizing circuit modifies the output from the second fixed-frequency oscillator to produce a synchronized output that is substantially synchronous with the output from the first fixed frequency oscillator. A switching circuit is coupled to the failure detection circuit, the output from the first fixed-frequency oscillator and the synchronized output of the second fixed-frequently oscillator. The switching circuit normally couples the output of the first fixed-frequency oscillator as the clock signal and wherein in response to a detection of a failure of the first fixed-frequency oscillator, the synchronized output is provided as the clock signal.
摘要:
Interconnecting bars are employed to connect two standard bicycles in a side-by-side relationship. The bicycles are interconnected adjacent the respective rear axles thereof, adjacent their respective seats and adjacent the front of the frames thereof, for stabilizing the bicycles and are also interconnected at their respective steering mechanisms with a tie rod that is adjustable to allow setting of wheel toe-in for proper steering and handling characteristics.
摘要:
A first cache simultaneously broadcasts, in a single message, a request for a cache line and a request to accept a future related evicted cache line to multiple other caches. Each of the multiple other caches evaluate their occupancy to derive an occupancy value that reflects their ability to accept the future related evicted cache line. In response to receiving a requested cache line, the first cache evicts the related evicted cache line to the cache with the highest occupancy value.