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1.发明授权公开(公告)号：US10196262B2
公开(公告)日：2019-02-05
申请号：US11958945
申请日：2007-12-18
摘要： A process for manufacturing an interaction system of a microelectromechanical type for a storage medium, the interaction system provided with a supporting element and an interaction element carried by the supporting element, envisages the steps of: providing a wafer of semiconductor material having a substrate with a first type of conductivity (P) and a top surface; forming a first interaction region having a second type of conductivity (N), opposite to the first type of conductivity (P), in a surface portion of the substrate in the proximity of the top surface; and carrying out an electrochemical etch of the substrate starting from the top surface, the etching being selective with respect to the second type of conductivity (N), so as to remove the surface portion of the substrate and separate the first interaction region from the substrate, thus forming the supporting element.
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2.发明申请PROCESS FOR MANUFACTURING A MICROELECTROMECHANICAL INTERACTION SYSTEM FOR A STORAGE MEDIUM 审中-公开用于制造存储介质的微电子交互系统的方法公开(公告)号：US20080164576A1
公开(公告)日：2008-07-10
申请号：US11958945
申请日：2007-12-18
CPC分类号： B81C1/00539 , B81B2201/038 , B81B2201/07 , B81B2201/12 , B81B2203/0118 , B81B2203/019 , B81C1/00595 , B81C2201/0136 , B81C2203/0714 , H01L27/10
摘要： A process for manufacturing an interaction system of a microelectromechanical type for a storage medium, the interaction system provided with a supporting element and an interaction element carried by the supporting element, envisages the steps of: providing a wafer of semiconductor material having a substrate with a first type of conductivity (P) and a top surface; forming a first interaction region having a second type of conductivity (N), opposite to the first type of conductivity (P), in a surface portion of the substrate in the proximity of the top surface; and carrying out an electrochemical etch of the substrate starting from the top surface, the etching being selective with respect to the second type of conductivity (N), so as to remove the surface portion of the substrate and separate the first interaction region from the substrate, thus forming the supporting element.
摘要翻译： 一种用于制造用于存储介质的微机电类型的相互作用系统的方法，具有支撑元件的相互作用系统和由支撑元件承载的相互作用元件，其设想是提供具有基板的半导体材料晶片，其具有 第一类电导率（P）和顶面; 在所述顶表面附近的所述衬底的表面部分中形成具有与所述第一类型的导电性（P）相反的第二导电类型（N）的第一相互作用区域; 并且从顶表面开始进行基板的电化学蚀刻，所述蚀刻相对于所述第二导电类型（N）是选择性的，以便移除所述基板的表面部分并将所述第一相互作用区域与所述基板分离 ，从而形成支撑元件。
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3.发明授权公开(公告)号：US08287746B2
公开(公告)日：2012-10-16
申请号：US12246384
申请日：2008-10-06
申请人： Caterina Riva , Bruno Murari , Giovanni Frattini
发明人： Caterina Riva , Bruno Murari , Giovanni Frattini
IPC分类号： H01B13/00
CPC分类号： G11B9/1409 , B82Y10/00 , G11B9/14
摘要： A process manufactures an interaction structure for a storage medium. The process includes forming a first interaction head provided with a first conductive region having a sub-lithographic dimension. The step of forming a first interaction head includes: forming on a surface a first delimitation region having a side wall; depositing a conductive portion having a deposition thickness substantially matching the sub-lithographic dimension on the side wall; and then defining the conductive portion. The sub-lithographic dimension preferably is between 1 and 50 nm, more preferably 20 nm.
摘要翻译： 过程制造存储介质的交互结构。 该方法包括形成具有具有亚光刻尺寸的第一导电区域的第一相互作用头。 形成第一相互作用头的步骤包括：在表面上形成具有侧壁的第一划界区域; 沉积具有基本上与侧壁上的亚光刻尺寸匹配的沉积厚度的导电部分; 然后限定导电部分。 亚光刻尺寸优选在1至50nm之间，更优选20nm。
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4.发明授权Substrate-level assembly for an integrated device, manufacturing process thereof and related integrated device 有权集成器件的基板级组装，其制造工艺和相关的集成器件公开(公告)号：US08049287B2
公开(公告)日：2011-11-01
申请号：US12102709
申请日：2008-04-14
申请人： Chantal Combi , Benedetto Vigna , Federico Giovanni Ziglioli , Lorenzo Baldo , Manuela Magugliani , Ernesto Lasalandra , Caterina Riva
发明人： Chantal Combi , Benedetto Vigna , Federico Giovanni Ziglioli , Lorenzo Baldo , Manuela Magugliani , Ernesto Lasalandra , Caterina Riva
IPC分类号： H01L29/84
CPC分类号： B81B7/0061 , B81B7/02 , B81B2201/0235 , B81B2201/0264 , B81C1/0023 , H01L2224/48091 , H01L2224/73265 , H01L2924/1461 , H01L2924/3025 , H04R1/04 , H04R19/005 , H01L2924/00014 , H01L2924/00
摘要： A substrate-level assembly having a device substrate of semiconductor material with a top face and housing a first integrated device, including a buried cavity formed within the device substrate, and with a membrane suspended over the buried cavity in the proximity of the top face. A capping substrate is coupled to the device substrate above the top face so as to cover the first integrated device in such a manner that a first empty space is provided above the membrane. Electrical-contact elements electrically connect the integrated device with the outside of the substrate-level assembly. In one embodiment, the device substrate integrates at least a further integrated device provided with a respective membrane, and a further empty space, fluidly isolated from the first empty space, is provided over the respective membrane of the further integrated device.
摘要翻译： 一种基板级组件，其具有具有顶面的半导体材料的器件基板并且容纳第一集成器件，所述第一集成器件包括形成在所述器件衬底内的掩埋腔，以及悬挂在所述顶面附近的所述掩埋腔上的膜。 封盖衬底在顶面上方连接到器件衬底，以便以这样的方式覆盖第一集成器件，使得在膜上方设置第一空白空间。 电接触元件将集成器件与衬底级组件的外部电连接。 在一个实施例中，器件衬底集成了至少一个设置有相应膜的集成器件，并且在另一个集成器件的相应膜上提供了与第一空白空间流体隔离的另外的空白空间。
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5.发明申请Process for manufacturing deep through vias in a semiconductor device, and semiconductor device made thereby 有权用于制造半导体器件中的深通孔的工艺，以及由此制造的半导体器件公开(公告)号：US20080197512A1
公开(公告)日：2008-08-21
申请号：US11600687
申请日：2006-11-16
申请人： Mauro Marchi , Marco Ferrera , Caterina Riva
发明人： Mauro Marchi , Marco Ferrera , Caterina Riva
IPC分类号： H01L23/48 , H01L23/00 , H01L21/4763
CPC分类号： B81B7/0006 , B81B2201/0242 , B81B2201/0257 , H01L21/76267 , H01L21/76898 , H01L23/481 , H01L2924/0002 , H01L2924/00012 , H01L2924/00
摘要： A process for manufacturing a through via in a semiconductor device includes the steps of: forming a body having a structural layer, a substrate, and a dielectric layer set between the structural layer and the substrate; insulating a portion of the structural layer to form a front-side interconnection region; insulating a portion of the substrate to form a back-side interconnection region; and connecting the front-side interconnection region and the back-side interconnection region through the dielectric layer.
摘要翻译： 一种用于制造半导体器件中的通孔的方法包括以下步骤：在结构层和衬底之间形成具有结构层，衬底和介电层的主体; 绝缘结构层的一部分以形成正面互连区域; 绝缘所述基板的一部分以形成背面互连区域; 并且通过电介质层连接前侧互连区域和背面互连区域。
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6.发明授权公开(公告)号：US07578184B2
公开(公告)日：2009-08-25
申请号：US11302486
申请日：2005-12-12
IPC分类号： G01P15/00
CPC分类号： G11B19/04 , G01P15/0891 , G01P15/18
摘要： A portable apparatus having an accelerometer device and a supporting element in the accelerometer device, having a first body of semiconductor material integrating a sensor element that detects movements of the first body and generates a signal correlated to the detected movement; a second body of semiconductor material that integrates a conditioning electronics and that is electrically connected to the first body; and conductive bumps that provide electrical connection of the first and second bodies to the supporting element. In particular, the conductive bumps connect the first and second bodies to the supporting element without the interposition of any packaging.
摘要翻译： 一种在加速度计装置中具有加速度计装置和支撑元件的便携式装置，具有集成传感器元件的第一体半导体材料，该传感器元件检测第一主体的运动并产生与检测到的运动相关的信号; 第二体半导体材料，其集成了调节电子器件，并且电连接到第一主体; 以及提供第一和第二主体到支撑元件的电连接的导电凸块。 特别地，导电凸块将第一和第二主体连接到支撑元件，而不插入任何包装。
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7.发明申请ASSEMBLY OF AN INTEGRATED DEVICE ENABLING A FACILITATED FLUIDIC CONNECTION TO REGIONS OF THE DEVICE 有权集成装置的装配使得装置的区域的流体流动连接公开(公告)号：US20080011090A1
公开(公告)日：2008-01-17
申请号：US11768090
申请日：2007-06-25
IPC分类号： G01L9/00
CPC分类号： G01L19/0038
摘要： Described herein is an assembly of an integrated device and of a cap coupled to the integrated device; the integrated device is provided with at least a first and a second region to be fluidically accessed from outside, and the cap has an outer portion provided with at least a first and a second inlet port in fluid communication with the first and second regions. In particular, the first and second regions are arranged on a first outer face, or on respective adjacent outer faces, of the integrated device, and an interface structure is set between the integrated device and the outer portion of the cap, and is provided with a channel arrangement for routing the first and second regions towards the first and second inlets.
摘要翻译： 这里描述的是集成装置和联接到集成装置的盖的组件; 集成装置设置有至少第一和第二区域以从外部流体地访问，并且帽具有至少设置有与第一和第二区域流体连通的第一入口和第二入口的外部。 特别地，第一和第二区域布置在集成装置的第一外表面或相应的相邻外表面上，并且界面结构设置在集成装置和盖的外部之间，并且设置有 用于将第一和第二区域朝向第一和第二入口路由的通道布置。
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8.发明授权公开(公告)号：US08633688B2
公开(公告)日：2014-01-21
申请号：US12957175
申请日：2010-11-30
申请人： Dario Paci , Paolo Iuliano , Caterina Riva , Marco Morelli
发明人： Dario Paci , Paolo Iuliano , Caterina Riva , Marco Morelli
IPC分类号： G01R33/02
CPC分类号： G01R33/04 , G01R33/0005 , G01R33/0047 , G01R33/0052 , G01R33/072
摘要： The integrated magnetic sensor for detecting an external magnetic field, is formed by a body of semiconductor material having a surface; an insulating layer covering the body of semiconductor material; a magnetically sensitive region, for example a Hall cell, extending inside the body; and a concentrator of ferromagnetic material, extending on the Hall cell and having a planar portion extending parallel to the surface of the substrate on the insulating layer. The concentrator terminates with a tip protruding peripherally from, and transversely to, the planar portion toward the Hall cell. When the magnetically sensitive region is a sensing coil of a fluxgate sensor, it is formed on the substrate, embedded in the insulating layer, and the tip of the concentrator can reach as far as the sensing coil.
摘要翻译： 用于检测外部磁场的集成磁传感器由具有表面的半导体材料体形成; 覆盖半导体材料体的绝缘层; 在身体内延伸的磁敏感区域，例如霍尔室; 以及在霍尔单元上延伸并且具有在绝缘层上平行于衬底的表面延伸的平面部分的铁磁材料的集中器。 集中器终止于朝向霍尔单元的平面部分周向地突出并且横向于平面部分突出的尖端。 当磁敏感区域是磁通门传感器的感测线圈时，它形成在衬底上，嵌入在绝缘层中，并且集中器的尖端可以达到传感线圈的距离。
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9.发明申请公开(公告)号：US20130299930A1
公开(公告)日：2013-11-14
申请号：US13996922
申请日：2011-12-23
申请人： Dario Paci , Marco Morelli , Caterina Riva
发明人： Dario Paci , Marco Morelli , Caterina Riva
CPC分类号： G01R33/0011 , B82Y25/00 , G01R33/093 , H01L43/12
摘要： An integrated magnetoresistive device, where a substrate of semiconductor material is covered, on a first surface, by an insulating layer. A magnetoresistor of ferromagnetic material extends in the insulating layer and defines a sensitivity plane of the sensor. A concentrator of ferromagnetic material including at least one arm, extending in a transversal direction to the sensitivity plane and vertically offset to the magnetoresistor. In this way, magnetic flux lines directed perpendicularly to the sensitivity plane are concentrated and deflected so as to generate magnetic-field components directed in a parallel direction to the sensitivity plane.
摘要翻译： 在第一表面上由绝缘层覆盖半导体材料的衬底的集成磁阻器件。 铁磁材料的磁阻在绝缘层中延伸并限定传感器的灵敏度平面。 铁磁材料的集中器，包括至少一个臂，沿横向方向延伸到灵敏平面并垂直偏移到磁电阻。 以这种方式，垂直于灵敏度平面指向的磁通线被集中和偏转，以便产生指向与灵敏平面平行的方向的磁场分量。
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公开(公告)号：US20130001719A1
公开(公告)日：2013-01-03
申请号：US13612575
申请日：2012-09-12
申请人： Caterina Riva , Bruno Murari , Giovanni Frattini
发明人： Caterina Riva , Bruno Murari , Giovanni Frattini
IPC分类号： H01L29/82
CPC分类号： G11B9/1409 , B82Y10/00 , G11B9/14
摘要： A process manufactures an interaction structure for a storage medium. The process includes forming a first interaction head provided with a first conductive region having a sub-lithographic dimension. The step of forming a first interaction head includes: forming on a surface a first delimitation region having a side wall; depositing a conductive portion having a deposition thickness substantially matching the sub-lithographic dimension on the side wall; and then defining the conductive portion. The sub-lithographic dimension preferably is between 1 and 50 nm, more preferably 20 nm.
摘要翻译： 过程制造存储介质的交互结构。 该方法包括形成具有具有亚光刻尺寸的第一导电区域的第一相互作用头。 形成第一相互作用头的步骤包括：在表面上形成具有侧壁的第一划界区域; 沉积具有基本上与侧壁上的亚光刻尺寸匹配的沉积厚度的导电部分; 然后限定导电部分。 亚光刻尺寸优选在1至50nm之间，更优选20nm。
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