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公开(公告)号：US06358809B1
公开(公告)日：2002-03-19
申请号：US09764812
申请日：2001-01-16
申请人： Glenn Nobinger , Alexander Kalnitsky , Melvin Schmidt , Jonathan Herman , Viktor Zekeriya , Vijaykumar Ullal , Daniel H. Rosenblatt , Joseph P. Ellul
发明人： Glenn Nobinger , Alexander Kalnitsky , Melvin Schmidt , Jonathan Herman , Viktor Zekeriya , Vijaykumar Ullal , Daniel H. Rosenblatt , Joseph P. Ellul
IPC分类号： H01L2120
CPC分类号： H01L28/24 , H01L21/265
摘要： A method of modifying a layer of thin film composite material to achieve one or more desired properties for the thin film layer which cannot be achieved by heat treatment at all practical temperatures of operation allowable by particular integrated circuit processes. In particular, the thin film composite material is subjected to an ion implantation process. Depending on the doping species, the doping concentration, the doping energy, and other ion implantation parameters, one or more properties of the deposited thin film resistive layer can be modified. Such properties may include electrical, optical, thermal and physical properties. For instance, the sheet resistance and/or the temperature coefficient of resistance of the thin film composite material may be increased or decreased by appropriately implanting ions into the material. The ion implantation can be applied globally in order to modify one or more properties of the entire deposited thin film composite layer. Alternatively, the ion implantation can be applied regionally in order to modify the thin film composite material at a first region, not modify the thin film composite material at a second region, and/or modify the thin film composite material in another way at a third region.
摘要翻译： 一种改变薄膜复合材料层的方法，以实现薄膜层的一个或多个期望的性能，这在特定集成电路工艺允许的所有实际操作温度下都不能通过热处理实现。 特别地，对薄膜复合材料进行离子注入工艺。 根据掺杂种类，掺杂浓度，掺杂能和其它离子注入参数，可以修改沉积的薄膜电阻层的一个或多个特性。 这些性质可以包括电，光，热和物理性质。 例如，通过将离子适当地注入到材料中，薄膜复合材料的薄层电阻和/或电阻温度系数可以增加或减少。 可以全局地应用离子注入，以便修饰整个沉积的薄膜复合层的一个或多个特性。 或者，可以区域地施加离子注入，以便在第一区域改性薄膜复合材料，而不是在第二区域改变薄膜复合材料，和/或以另一种方式在第三区域改性薄膜复合材料 地区。
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公开(公告)号：US4934774A
公开(公告)日：1990-06-19
申请号：US363006
申请日：1989-06-08
CPC分类号： G02B6/1347
摘要： An optical waveguide is made by forming a layer of SiO.sub.2 on a substrate and implanting a region of the SiO.sub.2 layer with Si ions to define a region containing a stoichiometric excess of Si which defines a region having an elevated refractive index surrounded by a region having a lower refractive index. The resulting optical waveguide is stable at the high temperatures required for many semiconductor processing methods, and is useful for optical interconnection in integrated optical and optoelectronic devices.
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公开(公告)号：US4859303A
公开(公告)日：1989-08-22
申请号：US106213
申请日：1987-10-09
CPC分类号： H01J37/32357 , B44D3/168 , G03F7/427 , H01J2237/004
摘要： In a method and apparatus for plasma stripping a polymer photoresist coating from a semiconductor substrate, positively charged species are removed from an activated gas flow before the gas flow is brought into contact with the coating to strip the coating from the substrate. The positively charged species may be removed by bringing the activated gas into contact with a grounded conducting surface to discharge the positively charged species, or by passing the activated gas through a negatively charged electrostatic filter to filter out positively charged species. The removal of positively charged species from the gas flow reduces or eliminates build up of positive charge on an outer surface of the photoresist coating so as to avoid driving mobile positively charged ions from the photoresist into the substrate, thereby avoiding contamination of the substrate.
摘要翻译： 在用于从半导体衬底等离子体剥离聚合物光刻胶涂层的方法和装置中，在使气流与涂层接触以从衬底剥离涂层之前，从活性气体流中除去带正电的物质。 可以通过使活化气体与接地的导电表面接触以排出带正电的物质或通过使活化气体通过带负电的静电过滤器以过滤带正电的物质来除去带正电的物质。 从气流中去除带正电荷的物质减少或消除在光致抗蚀剂涂层的外表面上的正电荷的积累，以避免驱动移动的带正电荷的离子从光致抗蚀剂进入衬底，从而避免衬底的污染。
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公开(公告)号：US4836902A
公开(公告)日：1989-06-06
申请号：US106214
申请日：1987-10-09
IPC分类号： G03F7/42 , H01J37/32 , H01L21/311
CPC分类号： H01J37/32871 , G03F7/427 , H01L21/31138
摘要： In a method and apparatus for plasma stripping a polymer photoresist coating from a semiconductor substrate, ultraviolet radiation generated as a byproduct of plasma generation is absorbed by a baffle placed between a plasma source and the substrate. The baffle inhibits incidence of ultraviolet light on the substrate while permitting flow of activated gas onto the substrate to chemically strip the photoresist from the substrate. Use of the baffle reduces microscopic damage to the substrate.
摘要翻译： 在用于从半导体衬底等离子体剥离聚合物光刻胶涂层的方法和装置中，作为等离子体产生的副产物产生的紫外线辐射被置于等离子体源和衬底之间的挡板吸收。 挡板抑制基板上的紫外光的入射，同时允许活性气体流到基板上以从基板上化学剥离光致抗蚀剂。 挡板的使用减少了对基材的微观损伤。
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5.发明授权Method of forming laser trimmable thin-film resistors in a fully planarized integrated circuit technology 有权在全平面化集成电路技术中形成激光可调薄膜电阻的方法公开(公告)号：US06475873B1
公开(公告)日：2002-11-05
申请号：US09631581
申请日：2000-08-04
IPC分类号： H01L2120
CPC分类号： H01L28/24 , H01L27/0802 , H01L2924/0002 , H01L2924/00
摘要： A new and improved method of forming a thin film resistor is provided herein that overcomes many of the drawbacks of prior art methods. More specifically, the new method of forming a thin film provides for a well-controlled dielectric thickness under the thin film resistor which is useful for laser trimming purpose. The preferred thickness of the dielectric layer is an integer of a quarter wavelength of the optical energy used to laser trim the resistor. The new method also provides contacts to the thin film resistor that do not directly contact the thin film resistor so as to prevent any adverse process effects to the thin film resistor. More specifically, the method of forming a thin film resistor includes the steps of forming a pair of spaced-apart polysilicon islands over a semiconductor substrate, forming a dielectric layer over and between the polysilicon islands, forming contact holes through the dielectric layer to expose respective first regions of the polysilicon islands, forming a layer of thin film resistive material that extends between respective first regions of the polysilicon islands, forming another dielectric layer over the polysilicon islands and over the thin film resistive material layer, and forming metal contacts through the second dielectric layer in a manner that they make contact to respective second regions of the polysilicon islands, wherein the first and second regions of the polysilicon islands are different.
摘要翻译： 本文提供了一种新的和改进的形成薄膜电阻器的方法，其克服了现有技术方法的许多缺点。 更具体地，形成薄膜的新方法提供了薄膜电阻下的良好控制的电介质厚度，其对于激光修整目的是有用的。 电介质层的优选厚度是用于激光修整电阻器的光能的四分之一波长的整数。 该新方法还提供了不直接接触薄膜电阻器的薄膜电阻器的接触，以防止对薄膜电阻器的任何不利的处理效果。 更具体地，形成薄膜电阻器的方法包括以下步骤：在半导体衬底上形成一对间隔开的多晶硅岛，在多晶硅岛之上和之间形成电介质层，形成通过电介质层的接触孔，以暴露出相应的 形成多晶硅岛的第一区域，形成薄膜电阻材料层，其在多晶硅岛的相应的第一区之间延伸，在多晶硅岛上方和薄膜电阻材料层上方形成另一介电层，并通过第二区形成金属接触 电介质层，使得它们与多晶硅岛的相应第二区接触，其中多晶硅岛的第一和第二区不同。
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公开(公告)号：US4968641A
公开(公告)日：1990-11-06
申请号：US370319
申请日：1989-06-22
IPC分类号： H01L21/32 , H01L21/762
CPC分类号： H01L21/32 , H01L21/76216 , Y10S438/911
摘要： In a method for the formation of an isolating oxide layer on a silicon substrate, an anti-nitridation layer is formed on a silicon substrate at locations where isolating oxide is desired. The anti-nitridation layer has openings therethrough which expose the silicon substrate at locations where isolating oxide is not desired. A thin silicon nitride layer is selectively grown at the locations where isolating oxide is not desired by nitridation of the exposed silicon substrate. Isolating oxide is then selectively grown at the locations where isolating oxide is desired. The thin silicon nitride layer inhibits oxide growth at the locations where isolating oxide is not desired. The method reduces "bird's beak" formation and is particularly applicable to high density IGFET devices.
摘要翻译： 在硅衬底上形成隔离氧化物层的方法中，在需要隔离氧化物的位置的硅衬底上形成抗氮化层。 抗氮化层具有穿过其的开口，在不需要隔离氧化物的位置处露出硅衬底。 通过暴露的硅衬底的氮化，在不需要隔离氧化物的位置选择性地生长薄氮化硅层。 然后在需要隔离氧化物的位置选择性地生长隔离氧化物。 薄氮化硅层在不需要隔离氧化物的位置抑制氧化物生长。 该方法减少了“鸟嘴”形成，特别适用于高密度IGFET装置。
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公开(公告)号：US5035916A
公开(公告)日：1991-07-30
申请号：US501990
申请日：1990-03-28
CPC分类号： G02B6/1347
摘要： An optical waveguide is made by forming a layer of SiO.sub.2 on a substrate and implanting a region of the SiO.sub.2 layer with Si ions to define a region containing a stoichiometric excess of Si which defines a region having an elevated refractive index surrounded by a region having a lower refractive index. The resulting optical waveguide is stable at the high temperatures required for many semiconductor processing methods, and is useful for optical interconnection in integrated optical and optoelectronic devices.
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公开(公告)号：US6114227A
公开(公告)日：2000-09-05
申请号：US280258
申请日：1999-03-29
申请人： David Leksell , Ming Xi Chan , Joseph P. Ellul , Jeanne L. Luce , David T. Ryan , Iqbal A. Shareef , Chung J. Lee , Stephen M. Campbell , Giovanni Antonio Foggiato
发明人： David Leksell , Ming Xi Chan , Joseph P. Ellul , Jeanne L. Luce , David T. Ryan , Iqbal A. Shareef , Chung J. Lee , Stephen M. Campbell , Giovanni Antonio Foggiato
IPC分类号： C23C16/44 , C23C16/455 , H01L21/205 , H01L21/20
CPC分类号： C23C16/45502 , C23C16/4401 , C23C16/455 , C23C16/45563
摘要： This invention relates to the design of apparatus for processing electronic devices, including equipment for chemical vapor deposition or transport polymerization. The new designs of gas separator plates, their configuration, and the regulation of gas flows through the system provides control over the pattern of precursor gas flow away from the separation plates, thereby decreasing the amount of byproducts that are deposited on the plates and throughout the reactor. New designs for shaping other surfaces of the dispersion head reduces contamination of those elements, and new designs for chamber panels decrease the deposition of byproducts on those surfaces, as well as other elements of the reactor. Decreasing deposition of byproducts increases the amount and the quality of the film that can be deposited without requiring the system to be shut down for cleaning. This increases the throughput of products in the deposition process, thereby increasing the efficiency of electronic device manufacture and lowering the cost.
摘要翻译： 本发明涉及用于处理电子设备的装置的设计，包括用于化学气相沉积或运输聚合的设备。 气体分离器板的新设计，其结构和通过系统的气体流量的调节提供了控制离开分离板的前体气体流动的模式，从而减少了沉积在板上和整个过程中的副产物的量 反应堆。 用于成型分散头的其它表面的新设计减少了这些元件的污染，并且用于室板的新设计降低了在那些表面上以及反应器的其它元件的副产物的沉积。 副产物的沉积减少增加了可以沉积的膜的量和质量，而不需要系统关闭清洁。 这增加了沉积工艺中产品的生产量，从而提高了电子设备制造的效率并降低了成本。
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公开(公告)号：US5362669A
公开(公告)日：1994-11-08
申请号：US80544
申请日：1993-06-24
申请人： John M. Boyd , Joseph P. Ellul , Sing P. Tay
发明人： John M. Boyd , Joseph P. Ellul , Sing P. Tay
IPC分类号： H01L21/76 , H01L21/304 , H01L21/3105 , H01L21/762 , H01L21/763
CPC分类号： H01L21/31053 , H01L21/76229 , H01L21/763 , Y10S148/05
摘要： A method is provided for forming a fully planarized trench isolated region in a semiconductor substrate for an integrated circuit, for example, a trench isolated field oxide region, or a trench isolated semiconductor region in which thin film semiconductor devices are formed. Planarization is accomplished by a chemical mechanical polishing process in which coplanar layers of a chemical mechanical polish resistant material are provided in a centre region of wide trenches as well as on the semiconductor substrate surface adjacent the trenches. The chemical mechanical polish resistant layer in the centre region of a wide trench forms an etch stop to prevent dishing of layers filling the trench during overall wafer planarization by chemical mechanical polishing. The method is compatible with CMOS, Bipolar and Bipolar CMOS processes for submicron VLSI and ULSI integrated circuit structures.
摘要翻译： 提供了一种用于在用于集成电路的半导体衬底中形成完全平坦化的沟槽隔离区域的方法，例如沟槽隔离场氧化物区域或其中形成薄膜半导体器件的沟槽隔离半导体区域。 通过化学机械抛光工艺实现平面化，其中化学机械耐光材料的共面层设置在宽沟槽的中心区域以及邻近沟槽的半导体衬底表面上。 在宽沟槽的中心区域中的化学机械耐光层形成蚀刻停止件，以防止在通过化学机械抛光的整个晶片平面化期间填充沟槽的层的凹陷。 该方法兼容CMOS，双极和双极CMOS工艺，用于亚微米VLSI和ULSI集成电路结构。
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公开(公告)号：US08344478B2
公开(公告)日：2013-01-01
申请号：US12605010
申请日：2009-10-23
IPC分类号： H01L21/768 , H01L29/86
CPC分类号： H01L28/10 , H01L21/76898 , H01L23/5227 , H01L23/53238 , H01L2924/0002 , H01L2924/09701 , H01L2924/00
摘要： Inductors and methods for integrated circuits that result in inductors of a size compatible with integrated circuits, allowing the fabrication of inductors, with or without additional circuitry on a first wafer and the bonding of that wafer to a second wafer without wasting of wafer area. The inductors in the first wafer are comprised of coils formed by conductors at each surface of the first wafer coupled to conductors in holes passing through the first wafer. Various embodiments are disclosed.
摘要翻译： 用于集成电路的电感器和方法，其导致尺寸与集成电路兼容的电感器，允许制造电感器，在第一晶片上具有或不具有附加电路，以及将晶片连接到第二晶片，而不浪费晶片面积。 第一晶片中的电感器由在第一晶片的每个表面处的导体形成的线圈组成，该线圈与穿过第一晶片的孔中的导体相连接。 公开了各种实施例。
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