公开(公告)号：US20130241078A1

公开(公告)日：2013-09-19

申请号：US13586309

申请日：2012-08-15

申请人： Gyu Jei LEE ,  Kang Won LEE ,  Hyun Joo KIM

发明人： Gyu Jei LEE ,  Kang Won LEE ,  Hyun Joo KIM

IPC分类号： H01L23/48

CPC分类号： H01L23/481 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/06181 ,  H01L2224/13 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/15311 ,  H01L2924/00012 ,  H01L2924/00

摘要： A semiconductor chip includes a semiconductor substrate having one surface, an other surface which faces away from the one surface, and through holes which pass through the one surface and the other surface; through electrodes filled in the through holes; and a gettering layer formed of polysilicon interposed between the through electrodes and inner surfaces of the semiconductor substrate whose form is defined by the through holes.

摘要翻译： 半导体芯片包括具有一个表面的半导体衬底，一个表面背离其他表面的半导体衬底以及穿过一个表面和另一个表面的通孔; 通过填充在通孔中的电极; 以及由介于通孔之间的多晶硅形成的吸杂层和形成由通孔限定的半导体衬底的内表面。

公开(公告)号：US20130240885A1

公开(公告)日：2013-09-19

申请号：US13565134

申请日：2012-08-02

申请人： Hyun Joo KIM ,  Kang Won LEE ,  Gyu Jei LEE

发明人： Hyun Joo KIM ,  Kang Won LEE ,  Gyu Jei LEE

IPC分类号： H01L29/16

CPC分类号： H01L25/0657 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/15311 ,  H01L2924/00

摘要： A semiconductor chip includes a semiconductor substrate including a substrate body divided into device regions and a peripheral region generally outside the device regions, and having one surface generally facing away from an other surface, and trenches which are defined generally in the device regions substantially on the one surface; and an active layer formed substantially in the trenches and made of polysilicon; semiconductor devices formed substantially over the active layer; and through electrodes substantially passing through the peripheral region of the substrate body.

摘要翻译： 半导体芯片包括半导体衬底，该半导体衬底包括被分为器件区域的衬底主体和大致在器件区域外部的周边区域，并且具有大致背离其它表面的一个表面，以及大致在器件区域中大体上限定在 一面 以及基本上形成在沟槽中并由多晶硅制成的有源层; 基本上形成在有源层上的半导体器件; 并且通过基本上穿过基板主体的周边区域的电极。

公开(公告)号：US20130264689A1

公开(公告)日：2013-10-10

申请号：US13614924

申请日：2012-09-13

申请人： Hyun Joo KIM ,  Kang Won LEE ,  Gyu Jei LEE

发明人： Hyun Joo KIM ,  Kang Won LEE ,  Gyu Jei LEE

IPC分类号： H01L29/06

CPC分类号： H01L25/0657 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/06156 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor substrate includes a substrate body divided into device regions and a peripheral region outside the device region, and having one surface, another surface substantially facing away from the one surface, trenches defined in the device regions under the one surface and inner surfaces which are formed due to defining of the trenches; active regions formed in the trenches; and a gettering layer formed between the inner surfaces of the substrate body and the active regions.

摘要翻译： 半导体衬底包括分为器件区域和器件区域外的周边区域的衬底体，并且具有一个表面，大体上背离所述一个表面的另一表面，在所述一个表面下的器件区域中限定的沟槽和内表面， 由于沟槽的界定而形成; 形成在沟槽中的有源区; 以及形成在基板主体的内表面和有源区之间的吸气层。

公开(公告)号：US20120127660A1

公开(公告)日：2012-05-24

申请号：US13298512

申请日：2011-11-17

申请人： Kang Won LEE ,  Hyun Joo KIM ,  Gyujei LEE

发明人： Kang Won LEE ,  Hyun Joo KIM ,  Gyujei LEE

IPC分类号： H05K7/20 ,  H05K3/30 ,  H05K1/11 ,  H05K1/02 ,  H05K1/18

CPC分类号： H01L24/97 ,  H01L21/561 ,  H01L21/563 ,  H01L23/293 ,  H01L23/3121 ,  H01L23/473 ,  H01L23/4985 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/27 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L25/0655 ,  H01L2224/0401 ,  H01L2224/051 ,  H01L2224/056 ,  H01L2224/1132 ,  H01L2224/1134 ,  H01L2224/11444 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/131 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/16225 ,  H01L2224/1703 ,  H01L2224/27 ,  H01L2224/27436 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/29355 ,  H01L2224/2939 ,  H01L2224/29393 ,  H01L2224/32013 ,  H01L2224/32058 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81191 ,  H01L2224/8185 ,  H01L2224/81902 ,  H01L2224/83385 ,  H01L2224/8385 ,  H01L2224/83851 ,  H01L2224/9211 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/0102 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01051 ,  H01L2924/01056 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1515 ,  H01L2924/181 ,  H05K1/189 ,  H05K2201/051 ,  Y10T29/49139 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/0665 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Cylindrical packages are provided. The cylindrical package includes a cylindrical substrate having a hollow region therein and at least one semiconductor chip mounted on an outer circumference of the cylindrical substrate. Related electronic products and related fabrication methods are also provided.

摘要翻译： 提供圆柱形包装。 圆柱形封装包括其中具有中空区域的圆柱形衬底和安装在圆柱形衬底的外圆周上的至少一个半导体芯片。 还提供了相关的电子产品和相关的制造方法。

公开(公告)号：US20130037939A1

公开(公告)日：2013-02-14

申请号：US13334515

申请日：2011-12-22

申请人： Gyujei LEE ,  Kang Won LEE

发明人： Gyujei LEE ,  Kang Won LEE

IPC分类号： H01L23/498

CPC分类号： H01L23/481 ,  H01L23/293 ,  H01L23/3128 ,  H01L23/3171 ,  H01L23/52 ,  H01L23/538 ,  H01L23/5384 ,  H01L23/5386 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L25/0657 ,  H01L2224/02377 ,  H01L2224/0401 ,  H01L2224/13009 ,  H01L2224/13014 ,  H01L2224/13018 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13184 ,  H01L2224/14181 ,  H01L2224/16146 ,  H01L2224/16237 ,  H01L2224/29099 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06544 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/014

摘要： A semiconductor package includes a semiconductor chip having a first surface, a second surface which faces away from the first surface, and through holes which pass through the first surface and the second surface; a dielectric layer formed on one or more of the first surface and the second surface and formed with grooves around the through holes on a fourth surface of the dielectric layer facing away from a third surface of the dielectric layer which is attached to the semiconductor chip; through-silicon vias filling the through holes; and bumps formed on the through-silicon vias and on portions of the dielectric layer around the through-silicon vias and filling the grooves.

摘要翻译： 半导体封装包括具有第一表面，远离第一表面的第二表面和穿过第一表面和第二表面的通孔的半导体芯片; 电介质层，其形成在所述第一表面和所述第二表面的一个或多个上，并且在所述电介质层的第四表面上的所述通孔周围形成有与所述电介质层的附接到所述半导体芯片的第三表面相背离的沟槽; 通孔通孔填充通孔; 以及形成在穿硅通孔上的电介质层的部分上的凸起，并且填充沟槽。

公开(公告)号：US20120256838A1

公开(公告)日：2012-10-11

申请号：US13080024

申请日：2011-04-05

申请人： Kang Won LEE ,  Seung Seob LEE ,  Jung A. LEE ,  Kwang Cheol LEE

发明人： Kang Won LEE ,  Seung Seob LEE ,  Jung A. LEE ,  Kwang Cheol LEE

IPC分类号： G06F3/045 ,  H05K13/00 ,  A63F13/02 ,  G06F3/02

CPC分类号： H01C17/00 ,  G06F3/0414 ,  G06F2203/04103 ,  H01C10/10 ,  H01C10/12 ,  H01H65/00 ,  H03K17/9643 ,  Y10T29/49002

摘要： The present invention relates to a touch panel, more specifically a piezoresistive type touch panel. According to the present invention, it is provided a manufacturing method of a piezoresistive type touch panel, comprising manufacturing a polymer membrane in which a piezoresistive type film pattern, of which resistance varies with applied pressure, is embedded; manufacturing a spacer layer and attaching one side of the spacer layer to a surface of the polymer membrane; and then attaching a bottom substrate to the other side of the spacer layer.

摘要翻译： 触摸面板技术领域本发明涉及触摸面板，更具体地，涉及一种压阻式触摸面板。 根据本发明，提供了一种压阻式触摸面板的制造方法，其特征在于，包括：制造聚合物膜，其中嵌入电阻随施加压力而变化的压阻型膜图案; 制造间隔层并将间隔层的一侧附接到聚合物膜的表面; 然后将底部基板附接到间隔层的另一侧。

公开(公告)号：US20100139380A1

公开(公告)日：2010-06-10

申请号：US12512825

申请日：2009-07-30

申请人： Kang Won LEE ,  Jungwhun Kang

发明人： Kang Won LEE ,  Jungwhun Kang

IPC分类号： G01M15/10

CPC分类号： F01N3/208 ,  F01N2560/026 ,  F01N2610/02 ,  F01N2610/1453 ,  F01N2900/0408 ,  F01N2900/1622 ,  Y02A50/2325 ,  Y02T10/24

摘要： A system for and process of is provided for calculating SCR conversion efficiency by applying a reference control signal by which a urea dosing module is controlled to an NOx conversion value respectively in absorption and release modes of NH3 according to a loading amount of the NH3 determined from the SCR efficiency map. The system and process may include a process of determining the NOx conversion value according to a loading amount of NH3, a process of detecting the reference control signal of the dosing module injecting the urea solution, and a process of calculating the SCR conversion efficiency based on the determined NOx conversion value and reference control signal of the dosing module.

摘要翻译： 提供了一种用于和处理的系统，用于通过将根据NH 3的吸收和释放模式的NH 3的吸收和释放模式分别控制尿素计量模块的参考控制信号分配到NOx转化值，根据由NH 3确定的NH 3的负载量 SCR效率图。 该系统和方法可以包括根据NH 3的负载量确定NOx转化值的过程，检测注入尿素溶液的给药模块的参考控制信号的过程以及基于 确定的NOx转化值和给料模块的参考控制信号。