公开(公告)号：US20050250304A1

公开(公告)日：2005-11-10

申请号：US10642092

申请日：2003-08-15

申请人： Harry Hedler ,  Roland Irsigler ,  Thorsten Meyer ,  Barbara Vasquez

发明人： Harry Hedler ,  Roland Irsigler ,  Thorsten Meyer ,  Barbara Vasquez

IPC分类号： H01L21/60 ,  H01L23/485 ,  H01L21/44

CPC分类号： H01L24/13 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05024 ,  H01L2224/05026 ,  H01L2224/05568 ,  H01L2224/05569 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2924/0001 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2224/05541 ,  H01L2224/05005 ,  H01L2224/05644 ,  H01L2924/00014 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166

摘要： A method for fabricating an integrated circuit connection region includes application of a dielectric to an integrated circuit with a connection region, application of a corrodible metalization layer to the dielectric, application of a protection device to the metalization layer, and removal of the protection device in a region around the connection region.

摘要翻译： 一种用于制造集成电路连接区域的方法包括将电介质施加到具有连接区域的集成电路，向电介质施加可腐蚀金属化层，向金属化层施加保护装置，以及将保护装置移除到 连接区域周围的区域。

公开(公告)号：US07087512B2

公开(公告)日：2006-08-08

申请号：US10642092

申请日：2003-08-15

申请人： Harry Hedler ,  Roland Irsigler ,  Thorsten Meyer ,  Barbara Vasquez

发明人： Harry Hedler ,  Roland Irsigler ,  Thorsten Meyer ,  Barbara Vasquez

IPC分类号： H01L21/44

CPC分类号： H01L24/13 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05024 ,  H01L2224/05026 ,  H01L2224/05568 ,  H01L2224/05569 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2924/0001 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2224/05541 ,  H01L2224/05005 ,  H01L2224/05644 ,  H01L2924/00014 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166

摘要： A method for fabricating an integrated circuit connection region includes application of a dielectric to an integrated circuit with a connection region, application of a corrodible metalization layer to the dielectric, application of a protection device to the metalization layer, and removal of the protection device in a region around the connection region.

公开(公告)号：US06714418B2

公开(公告)日：2004-03-30

申请号：US10285924

申请日：2002-11-01

申请人： Gerd Frankowsky ,  Harry Hedler ,  Roland Irsigler ,  Thorsten Meyer ,  Barbara Vasquez

发明人： Gerd Frankowsky ,  Harry Hedler ,  Roland Irsigler ,  Thorsten Meyer ,  Barbara Vasquez

IPC分类号： H05K702

CPC分类号： H01L25/50 ,  H01L21/568 ,  H01L24/24 ,  H01L24/82 ,  H01L24/96 ,  H01L25/0657 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/05573 ,  H01L2224/12105 ,  H01L2224/16145 ,  H01L2224/16237 ,  H01L2224/17181 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2225/1035 ,  H01L2225/1064 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/15331 ,  H01L2924/00

摘要： An electronic component has a plurality of chips which are stacked one above the other and contact-connected to one another. To form this component, a first planar chip arrangement is provided with the functional chips spaced apart from one another in a grid and with a filling material in the spaces between the chips to form an insulating holding frame that fixes the chips, the frame has chip-dedicated contact-connecting elements that serve for the electrical contact-connection to another chip of another chip arrangement and each chip has dedicated electrically conductive strips. At least one additional planar chip arrangement is formed by the same method as the first planar chip arrangement and is then stacked on the first planar chip arrangement so that the two chip arrangements lie one above the other and the respective contact-connecting elements of the two chip arrangements are connected to one another for electrical chip-to-chip contact-connection. Subsequently, each of the components, which comprise a stack of chips, is separated from the assembled stack of chip arrangements.

摘要翻译： 电子部件具有多个彼此叠置并彼此接触连接的芯片。 为了形成该部件，第一平面芯片布置设置有功能芯片，其格栅彼此间隔开，并且在芯片之间的空间中具有填充材料，以形成固定芯片的绝缘保持框架，框架具有芯片 用于与另一个芯片布置的另一芯片的电接触连接的每个芯片具有专用的导电条。 通过与第一平面芯片布置相同的方法形成至少一个附加的平面芯片布置，然后将其堆叠在第一平面芯片布置上，使得两个芯片布置在另一个之上并且两个相应的触点连接元件 芯片布置彼此连接以进行电芯片到芯片的接触连接。 随后，包括一堆芯片的每个部件与组装的芯片布置堆叠分离。

公开(公告)号：US07211451B2

公开(公告)日：2007-05-01

申请号：US10298772

申请日：2002-11-18

申请人： Thorsten Meyer ,  Gerd Frankowsky ,  Harry Hedler ,  Barbara Vasquez ,  Roland Irsigler

发明人： Thorsten Meyer ,  Gerd Frankowsky ,  Harry Hedler ,  Barbara Vasquez ,  Roland Irsigler

IPC分类号： H01L21/66 ,  H01L21/00 ,  H01L23/28 ,  H01L23/498

CPC分类号： H01L21/568 ,  H01L21/67121 ,  H01L21/67132 ,  H01L21/6835 ,  H01L22/20 ,  H01L23/3128 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/12105 ,  H01L2224/92 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2224/96 ,  H01L2224/82

摘要： A process for producing a component module comprising a module carrier and a plurality of components with which contact is made on the latter, comprising the following steps: arranging separated components on a surface-adhesive film at a predefined contact-specific spacing from one another, embedding the components in a flexible material in order to form a flexible holding frame which holds the components, pulling off the film, producing contact-making elements on the exposed side of the components, performing a functional test of the components and, if necessary, repair and/or replacement of components, and fixing and making contact with the components held in the holding frame on the module carrier.

摘要翻译： 一种用于制造组件模块的方法，所述组件模块包括模块载体和在其上形成接触的多个部件，包括以下步骤：以预定的接触特定间隔将表面粘合膜上的分离的组分布置在彼此之间， 将部件嵌入柔性材料中以形成保持部件的柔性保持框架，拉出膜，在部件的暴露侧上产生接触形成元件，执行部件的功能测试，并且如果需要， 修理和/或更换部件，以及固定和保持在模块架上的保持框架中保持的部件。

公开(公告)号：US20060244109A1

公开(公告)日：2006-11-02

申请号：US11383341

申请日：2006-05-15

申请人： Harry Hedler ,  Roland Irsigler ,  Thorsten Meyer ,  Barbara Vasquez

发明人： Harry Hedler ,  Roland Irsigler ,  Thorsten Meyer ,  Barbara Vasquez

IPC分类号： H01L23/495

CPC分类号： H01L24/13 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05024 ,  H01L2224/05026 ,  H01L2224/05568 ,  H01L2224/05569 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2924/0001 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2224/05541 ,  H01L2224/05005 ,  H01L2224/05644 ,  H01L2924/00014 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166

摘要： A method for fabricating an integrated circuit connection region includes application of a dielectric to an integrated circuit with a connection region, application of a corrodible metalization layer to the dielectric, application of a protection device to the metalization layer, and removal of the protection device in a region around the connection region.

摘要翻译： 一种用于制造集成电路连接区域的方法包括将电介质施加到具有连接区域的集成电路，向电介质施加可腐蚀金属化层，向金属化层施加保护装置，以及将保护装置移除到 连接区域周围的区域。

公开(公告)号：US06845554B2

公开(公告)日：2005-01-25

申请号：US10298837

申请日：2002-11-18

申请人： Gerd Frankowsky ,  Harry Hedler ,  Roland Irsigler ,  Thorsten Meyer ,  Barbara Vasquez

发明人： Gerd Frankowsky ,  Harry Hedler ,  Roland Irsigler ,  Thorsten Meyer ,  Barbara Vasquez

IPC分类号： H01L21/00 ,  H01L21/60 ,  H01L21/78 ,  H05K3/30

CPC分类号： H01L24/96 ,  H01L21/67144 ,  H01L21/78 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/16 ,  H01L2224/20 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/0102 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49133 ,  Y10T29/49135 ,  Y10T29/49155 ,  Y10T29/53178

摘要： The invention creates a method for connection of circuit units (101a-10n) which are arranged on a wafer (100), in which the wafer (100) is fitted to a first film (102a), the wafer (100) is sawn such that the circuit units (101a-101n) which are arranged on the wafer (100) are separated, the functional circuit units (101d) are picked up by means of a handling device (101) and are placed down on a second film (102b) by means of the handling device (103), so as to produce a separation distance which can be predetermined between connection contacts of the circuit units (101d).

摘要翻译： 本发明创造了一种用于连接电路单元（101a-10n）的方法，它们布置在晶片（100）上，其中晶片（100）装配到第一薄膜（102a）上，晶片（100）被锯切 布置在晶片（100）上的电路单元（101a-101n）被分离，功能电路单元（101d）通过处理装置（101）拾取并放置在第二薄膜（102b）上 ），以便产生可以在电路单元（101d）的连接触点之间预定的间隔距离。

公开(公告)号：US08598716B2

公开(公告)日：2013-12-03

申请号：US11210723

申请日：2005-08-24

申请人： Harry Hedler ,  Roland Irsigler ,  Thorsten Meyer

发明人： Harry Hedler ,  Roland Irsigler ,  Thorsten Meyer

IPC分类号： H01L23/48

CPC分类号： H01L25/0657 ,  H01L24/73 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2225/06513 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06586 ,  H01L2924/01078 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2924/00012

摘要： The present invention provides an apparatus having stacked semiconductor components. Two semiconductor components (21, 26) are arranged such that their contact regions (28, 22) are opposite one another. A contact-connection device (29) forms a short electrical connection between the two contact regions (28, 22). The contact regions (28, 22) are connected to external contact regions (36) of the apparatus via a rewiring (23).

摘要翻译： 本发明提供一种具有层叠半导体元件的装置。 两个半导体部件（21,26）被布置成使得它们的接触区域（28,22）彼此相对。 接触连接装置（29）在两个接触区域（28,22）之间形成短路电连接。 接触区域（28,22）经由重新布线（23）连接到设备的外部接触区域（36）。

公开(公告)号：US07247948B2

公开(公告)日：2007-07-24

申请号：US10836143

申请日：2004-04-30

申请人： Harry Hedler ,  Roland Irsigler ,  Thorsten Meyer

发明人： Harry Hedler ,  Roland Irsigler ,  Thorsten Meyer

IPC分类号： H01L21/82 ,  H01L23/48

CPC分类号： H01L25/0657 ,  H01L23/481 ,  H01L24/48 ,  H01L2224/16 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48471 ,  H01L2224/73265 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/85399 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/0401 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device has a semiconductor substrate, at least a first and second rewiring device on a first surface of the semiconductor substrate for the provision of an electrical contact-connection of the semiconductor substrate, and a tapering, continuous opening from a first surface to a second, opposite surface of the semiconductor substrate. At least a third and fourth rewiring device is disposed on the second surface of the semiconductor substrate and a patterned metallization on the side areas of the opening for the separate contact-connection of the first and at least the second rewiring device.

摘要翻译： 半导体器件具有半导体衬底，至少第一和第二重新布线装置在半导体衬底的第一表面上，用于提供半导体衬底的电接触连接，以及从第一表面到第二表面的渐缩连续的开口 第二，半导体衬底的相对表面。 至少第三和第四重新布线装置设置在半导体衬底的第二表面上，并且在开口的侧面区域上形成图案化金属化，用于第一和第二重新布线装置的单独接触连接。

公开(公告)号：US20060043561A1

公开(公告)日：2006-03-02

申请号：US11210723

申请日：2005-08-24

申请人： Harry Hedler ,  Roland Irsigler ,  Thorsten Meyer

发明人： Harry Hedler ,  Roland Irsigler ,  Thorsten Meyer

IPC分类号： H01L21/50 ,  H01L23/02

CPC分类号： H01L25/0657 ,  H01L24/73 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2225/06513 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06586 ,  H01L2924/01078 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2924/00012

摘要： The present invention provides an apparatus having stacked semiconductor components. Two semiconductor components (21, 26) are arranged such that their contact regions (28, 22) are opposite one another. A contact-connection device (29) forms a short electrical connection between the two contact regions (28, 22). The contact regions (28, 22) are connected to external contact regions (36) of the apparatus via a rewiring (23).

摘要翻译： 本发明提供一种具有层叠半导体元件的装置。 两个半导体部件（21,26）被布置成使得它们的接触区域（28,22）彼此相对。 接触连接装置（29）在两个接触区域（28,22）之间形成短路电连接。 接触区域（28,22）经由重新布线（23）连接到设备的外部接触区域（36）。

公开(公告)号：US20050282410A1

公开(公告)日：2005-12-22

申请号：US11137061

申请日：2005-05-25

申请人： Harry Hedler ,  Roland Irsigler ,  Thorsten Meyer ,  Andreas Wolter

发明人： Harry Hedler ,  Roland Irsigler ,  Thorsten Meyer ,  Andreas Wolter

IPC分类号： G01R1/067 ,  G01R1/073 ,  H01L21/58 ,  H01R12/00 ,  H05K3/32 ,  H05K3/40

CPC分类号： H05K3/4007 ,  G01R1/06711 ,  G01R1/07357 ,  H05K3/326 ,  H05K2201/0133 ,  H05K2201/0367

摘要： The present invention relates to an elastic contact-connecting device. An elastic elevation 3 is applied to a carrier area 2 of a carrier 1. The elastic elevation 3 has a first oblique area 4, a second ramp 5 and a roof area 6. The first oblique area 4 has a lesser inclination (30) with regard to the carrier area 2 than the second oblique area 5. A contact region 20 is applied to the roof area 6 of the elastic elevation. The contact region 20 is connected to other structures 12 on the carrier 1 via a conductor track 10. For this purpose, the conductor track 10 is guided over the first oblique area 4. If a mating contact is pressed onto the contact region 20, the elastic elevation yields, but presses against the mating contact on account of its elastic property and thus enables a reliable contact. In this case, essentially only the second oblique area 5 is deformed; the first oblique area 4 and the conductor track 10 applied thereto are not subjected to any mechanical stress.

摘要翻译： 本发明涉及弹性接触连接装置。 弹性高度3被施加到载体1的载体区域2。 弹性高度3具有第一倾斜区域4，第二斜坡5和屋顶区域6。 第一倾斜区域4相对于载体区域2具有比第二倾斜区域5更小的倾斜度（30）。 接触区域20被施加到弹性高度的屋顶区域6。 接触区域20经由导体轨道10连接到载体1上的其它结构12。 为此，导体轨道10被引导在第一倾斜区域4上。 如果配合接触件被按压到接触区域20上，则由于其弹性而使弹性高度屈服，而是压靠配合接触，因此能够进行可靠的接触。 在这种情况下，基本上仅第二倾斜区域5变形; 施加到其上的第一倾斜区域4和导体轨道10不会受到任何机械应力。