公开(公告)号：US20120091420A1

公开(公告)日：2012-04-19

申请号：US13052165

申请日：2011-03-21

申请人： Haruka KUSAI ,  Shosuke Fujii ,  Yasushi Nakasaki

发明人： Haruka KUSAI ,  Shosuke Fujii ,  Yasushi Nakasaki

IPC分类号： H01L45/00

CPC分类号： H01L45/085 ,  G11C11/5685 ,  G11C13/0007 ,  G11C2213/15 ,  G11C2213/33 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/148

摘要： According to one embodiment a first variable resistance layer which is arranged between a second electrode and a first electrode and in which a first conductive filament is capable of growing based on metal supplied from the second electrode, and an n-th variable resistance layer which is arranged between an n-th electrode and an (n+1)-th electrode and in which an n-th conductive filament whose growth rate is different from the first conductive filament is capable of growing based on metal supplied from the (n+1)-th electrode are included, a configuration in which a plurality of conductive filaments is electrically connected in series between the first electrode layer and the (n+1)-th electrode layer is included, and a resistance is changed in a stepwise manner.

摘要翻译： 根据一个实施例，布置在第二电极和第一电极之间并且第一导电细丝能够基于从第二电极提供的金属生长的第一可变电阻层，以及第n可变电阻层，其是第 布置在第n电极和第（n + 1）电极之间，并且其中生长速度不同于第一导电细丝的第n导电细丝能够基于从第（n + 1）个 ）电极，包括在第一电极层和第（n + 1）电极层之间串联电连接多根导电丝的结构，并且电阻以逐步的方式改变。

公开(公告)号：US08450709B2

公开(公告)日：2013-05-28

申请号：US13052165

申请日：2011-03-21

申请人： Haruka Kusai ,  Shosuke Fujii ,  Yasushi Nakasaki

发明人： Haruka Kusai ,  Shosuke Fujii ,  Yasushi Nakasaki

IPC分类号： H01L29/02

CPC分类号： H01L45/085 ,  G11C11/5685 ,  G11C13/0007 ,  G11C2213/15 ,  G11C2213/33 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/148

摘要： According to one embodiment a first variable resistance layer which is arranged between a second electrode and a first electrode and in which a first conductive filament is capable of growing based on metal supplied from the second electrode, and an n-th variable resistance layer which is arranged between an n-th electrode and an (n+1)-th electrode and in which an n-th conductive filament whose growth rate is different from the first conductive filament is capable of growing based on metal supplied from the (n+1)-th electrode are included, a configuration in which a plurality of conductive filaments is electrically connected in series between the first electrode layer and the (n+1)-th electrode layer is included, and a resistance is changed in a stepwise manner.

摘要翻译： 根据一个实施例，布置在第二电极和第一电极之间并且第一导电细丝能够基于从第二电极提供的金属生长的第一可变电阻层，以及第n可变电阻层，其是第 布置在第n电极和第（n + 1）电极之间，并且其中生长速度不同于第一导电细丝的第n导电细丝能够基于从第（n + 1）个 ）电极，包括在第一电极层和第（n + 1）电极层之间串联电连接多根导电丝的结构，并且电阻以逐步的方式改变。

公开(公告)号：US20130175490A1

公开(公告)日：2013-07-11

申请号：US13547645

申请日：2012-07-12

申请人： Haruka KUSAI ,  Kiwamu Sakuma ,  Shosuke Fujii ,  Masumi Saitoh ,  Masahiro Kiyotoshi

发明人： Haruka KUSAI ,  Kiwamu Sakuma ,  Shosuke Fujii ,  Masumi Saitoh ,  Masahiro Kiyotoshi

IPC分类号： H01L27/088 ,  H01L27/24 ,  H01L21/3205 ,  H01L21/768 ,  H01L21/265 ,  H01L21/02

CPC分类号： H01L27/088 ,  G11C16/04 ,  G11C16/10 ,  H01L21/02367 ,  H01L21/265 ,  H01L21/32051 ,  H01L21/76877 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11551 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11578 ,  H01L27/24 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/685 ,  H01L29/788 ,  H01L29/792 ,  H01L29/82

摘要： According to one embodiment, a nonvolatile semiconductor memory device includes a fin-type stacked layer structure having memory cells, and a beam connected to an end portion of the structure. Each of the structure and the beam includes semiconductor layers stacked in a perpendicular direction. The beam includes a contact portion provided at one end of the beam, and a low resistance portion provided between the contact portion and the end portion of the structure.

摘要翻译： 根据一个实施例，非易失性半导体存储器件包括具有存储单元的鳍式堆叠层结构和连接到该结构的端部的光束。 结构和梁中的每一个包括沿垂直方向堆叠的半导体层。 梁包括设置在梁的一端的接触部分和设置在接触部分和结构的端部之间的低电阻部分。

公开(公告)号：US09087715B2

公开(公告)日：2015-07-21

申请号：US13547645

申请日：2012-07-12

申请人： Haruka Kusai ,  Kiwamu Sakuma ,  Shosuke Fujii ,  Masumi Saitoh ,  Masahiro Kiyotoshi

发明人： Haruka Kusai ,  Kiwamu Sakuma ,  Shosuke Fujii ,  Masumi Saitoh ,  Masahiro Kiyotoshi

IPC分类号： H01L27/115 ,  H01L27/088 ,  H01L21/265 ,  H01L21/02 ,  H01L21/3205 ,  H01L21/768 ,  H01L27/24 ,  G11C16/04 ,  H01L29/66 ,  H01L29/68 ,  H01L29/788 ,  H01L29/792 ,  G11C16/10 ,  H01L29/82

CPC分类号： H01L27/088 ,  G11C16/04 ,  G11C16/10 ,  H01L21/02367 ,  H01L21/265 ,  H01L21/32051 ,  H01L21/76877 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11551 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11578 ,  H01L27/24 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/685 ,  H01L29/788 ,  H01L29/792 ,  H01L29/82

摘要： According to one embodiment, a nonvolatile semiconductor memory device includes a fin-type stacked layer structure having memory cells, and a beam connected to an end portion of the structure. Each of the structure and the beam includes semiconductor layers stacked in a perpendicular direction. The beam includes a contact portion provided at one end of the beam, and a low resistance portion provided between the contact portion and the end portion of the structure.

摘要翻译： 根据一个实施例，非易失性半导体存储器件包括具有存储单元的鳍式堆叠层结构和连接到该结构的端部的光束。 结构和梁中的每一个包括沿垂直方向堆叠的半导体层。 梁包括设置在梁的一端的接触部分和设置在接触部分和结构的端部之间的低电阻部分。

公开(公告)号：US08710580B2

公开(公告)日：2014-04-29

申请号：US13689026

申请日：2012-11-29

申请人： Kiwamu Sakuma ,  Haruka Kusai ,  Shosuke Fujii ,  Li Zhang ,  Masahiro Kiyotoshi ,  Masao Shingu

发明人： Kiwamu Sakuma ,  Haruka Kusai ,  Shosuke Fujii ,  Li Zhang ,  Masahiro Kiyotoshi ,  Masao Shingu

IPC分类号： H01L45/00 ,  H01L27/115 ,  H01L21/265

CPC分类号： H01L27/1157 ,  H01L21/265 ,  H01L21/845 ,  H01L27/11551 ,  H01L27/11578 ,  H01L27/1211 ,  H01L27/2436 ,  H01L27/2481 ,  H01L29/42332 ,  H01L29/7881 ,  H01L29/792 ,  H01L45/04

摘要： According to one embodiment, a semiconductor device includes first to n-th semiconductor layers (n is a natural number equal to or more than 2) being stacked in order from a surface of an insulating layer in a first direction perpendicular to the surface of the insulating layer, the first to n-th semiconductor layers extending in a second direction parallel to the surface of the insulating layer, the first to n-th semiconductor layers being insulated from each other, a common electrode connected to the first to n-th semiconductor layers in a first end of the second direction thereof, and a layer select transistor which uses the first to n-th semiconductor layers as channels and which selects one of the first to n-th semiconductor layers.

摘要翻译： 根据一个实施例，半导体器件包括第一至第n半导体层（n为等于或大于2的自然数），从绝缘层的表面依次堆叠在与第 绝缘层，所述第一至第n半导体层在与所述绝缘层的表面平行的第二方向上延伸，所述第一至第n半导体层彼此绝缘，公共电极连接到所述第一至第n 半导体层，其第二方向的第一端，以及使用第一至第n半导体层作为沟道并选择第一至第n半导体层之一的层选择晶体管。

公开(公告)号：US08569823B2

公开(公告)日：2013-10-29

申请号：US13235970

申请日：2011-09-19

申请人： Tsunehiro Ino ,  Masao Shingu ,  Shosuke Fujii ,  Akira Takashima ,  Daisuke Matsushita ,  Jun Fujiki ,  Naoki Yasuda ,  Yasushi Nakasaki ,  Koichi Muraoka

发明人： Tsunehiro Ino ,  Masao Shingu ,  Shosuke Fujii ,  Akira Takashima ,  Daisuke Matsushita ,  Jun Fujiki ,  Naoki Yasuda ,  Yasushi Nakasaki ,  Koichi Muraoka

IPC分类号： H01L29/788

CPC分类号： H01L29/513 ,  H01L21/28282 ,  H01L27/11568 ,  H01L29/517 ,  H01L29/66833 ,  H01L29/792

摘要： According to one embodiment, a semiconductor device includes a semiconductor region, a tunnel insulating film provided on the semiconductor region, a charge storage insulating film provided on the tunnel insulating film and having a hafnium oxide including a cubic region, a block insulating film provided on the charge storage insulating film, and a control gate electrode provided on the block insulating film.

摘要翻译： 根据一个实施例，半导体器件包括半导体区域，设置在半导体区域上的隧道绝缘膜，设置在隧道绝缘膜上并具有包含立方体区域的氧化铪的电荷存储绝缘膜，设置在 电荷存储绝缘膜和设置在块绝缘膜上的控制栅电极。

公开(公告)号：US20120068250A1

公开(公告)日：2012-03-22

申请号：US13235970

申请日：2011-09-19

申请人： Tsunehiro Ino ,  Masao Shingu ,  Shosuke Fujii ,  Akira Takashima ,  Daisuke Matsushita ,  Jun Fujiki ,  Naoki Yasuda ,  Yasushi Nakasaki ,  Koichi Muraoka

发明人： Tsunehiro Ino ,  Masao Shingu ,  Shosuke Fujii ,  Akira Takashima ,  Daisuke Matsushita ,  Jun Fujiki ,  Naoki Yasuda ,  Yasushi Nakasaki ,  Koichi Muraoka

IPC分类号： H01L29/788 ,  H01L21/28

CPC分类号： H01L29/513 ,  H01L21/28282 ,  H01L27/11568 ,  H01L29/517 ,  H01L29/66833 ,  H01L29/792

摘要： According to one embodiment, a semiconductor device includes a semiconductor region, a tunnel insulating film provided on the semiconductor region, a charge storage insulating film provided on the tunnel insulating film and having a hafnium oxide including a cubic region, a block insulating film provided on the charge storage insulating film, and a control gate electrode provided on the block insulating film.

摘要翻译： 根据一个实施例，半导体器件包括半导体区域，设置在半导体区域上的隧道绝缘膜，设置在隧道绝缘膜上并具有包含立方体区域的氧化铪的电荷存储绝缘膜，设置在 电荷存储绝缘膜和设置在块绝缘膜上的控制栅电极。

公开(公告)号：US08698277B2

公开(公告)日：2014-04-15

申请号：US13233623

申请日：2011-09-15

申请人： Takashi Yamauchi ,  Shosuke Fujii ,  Reika Ichihara

发明人： Takashi Yamauchi ,  Shosuke Fujii ,  Reika Ichihara

IPC分类号： H01L23/52 ,  H01L29/00 ,  H01L47/00 ,  H01L29/02 ,  H01L29/04 ,  H01L29/06 ,  G11C11/00

CPC分类号： H01L45/1253 ,  H01L27/2436 ,  H01L27/2463 ,  H01L45/085 ,  H01L45/148 ,  H01L45/1616 ,  H01L45/1641

摘要： According to one embodiment, a nonvolatile variable resistance device includes a first electrode, a second electrode, a first layer, and a second layer. The second electrode includes a metal element. The first layer is arranged between the first electrode and the second electrode and includes a semiconductor element. The second layer is inserted between the second electrode and the first layer and includes the semiconductor element. The percentage of the semiconductor element being unterminated is higher in the second layer than in the first layer.

摘要翻译： 根据一个实施例，非易失性可变电阻器件包括第一电极，第二电极，第一层和第二层。 第二电极包括金属元件。 第一层布置在第一电极和第二电极之间，并且包括半导体元件。 第二层插入在第二电极和第一层之间并且包括半导体元件。 未终止的半导体元件的百分比在第二层比在第一层中高。

公开(公告)号：US08664632B2

公开(公告)日：2014-03-04

申请号：US13599504

申请日：2012-08-30

申请人： Daisuke Matsushita ,  Shosuke Fujii ,  Yoshifumi Nishi ,  Akira Takashima ,  Takayuki Ishikawa ,  Hidenori Miyagawa ,  Takashi Haimoto ,  Yusuke Arayashiki ,  Hideki Inokuma

发明人： Daisuke Matsushita ,  Shosuke Fujii ,  Yoshifumi Nishi ,  Akira Takashima ,  Takayuki Ishikawa ,  Hidenori Miyagawa ,  Takashi Haimoto ,  Yusuke Arayashiki ,  Hideki Inokuma

IPC分类号： H01L47/00 ,  G11C11/00

CPC分类号： H01L45/1253 ,  H01L27/2481 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/142 ,  H01L45/143 ,  H01L45/144 ,  H01L45/146 ,  H01L45/148

摘要： According to one embodiment, a memory device includes a first electrode, a second electrode, and a variable resistance film. The variable resistance film is connected between the first electrode and the second electrode. The first electrode includes a metal contained in a matrix made of a conductive material. A cohesive energy of the metal is lower than a cohesive energy of the conductive material. A concentration of the metal at a central portion of the first electrode in a width direction thereof is higher than concentrations of the metal in two end portions of the first electrode in the width direction.

摘要翻译： 根据一个实施例，存储器件包括第一电极，第二电极和可变电阻膜。 可变电阻膜连接在第一电极和第二电极之间。 第一电极包括由导电材料制成的基体中所含的金属。 金属的内聚能低于导电材料的内聚能。 第一电极的宽度方向的中央部的金属浓度高于第一电极的宽度方向的两端部的金属的浓度。

公开(公告)号：US20130015519A1

公开(公告)日：2013-01-17

申请号：US13622612

申请日：2012-09-19

申请人： Shosuke Fujii ,  Kiwamu Sakuma ,  Jun Fujiki ,  Atsuhiro Kinoshita

发明人： Shosuke Fujii ,  Kiwamu Sakuma ,  Jun Fujiki ,  Atsuhiro Kinoshita

IPC分类号： H01L29/792 ,  H01L21/28

CPC分类号： H01L27/11551 ,  H01L27/11519 ,  H01L27/11521 ,  H01L27/11565 ,  H01L27/11578

摘要： According to one embodiment, a nonvolatile semiconductor memory device includes first to n-th semiconductor layers which are stacked in a first direction perpendicular to a surface of a semiconductor substrate and which extend in a second direction parallel to the surface of the semiconductor substrate, an electrode which extends in the first direction along side surfaces of the first to n-th semiconductor layers, the side surfaces of the first to n-th semiconductor layers exposing in a third direction perpendicular to the first and second directions, and first to n-th charge storage layers located between the first to n-th semiconductor layers and the electrode respectively. The first to n-th charge storage layers are separated from each other in areas between the first to n-th semiconductor layers.

摘要翻译： 根据一个实施例，非易失性半导体存储器件包括第一至第n半导体层，它们沿垂直于半导体衬底的表面的第一方向堆叠并且沿与半导体衬底的表面平行的第二方向延伸， 电极，其沿第一方向沿着第一至第n半导体层的侧表面延伸，第一至第n半导体层的侧表面在垂直于第一和第二方向的第三方向上暴露，以及第一至第n- 分别位于第一至第n半导体层之间的电荷存储层和电极。 第一至第n电荷存储层在第一至第n半导体层之间的区域中彼此分离。