公开(公告)号：US20150228627A1

公开(公告)日：2015-08-13

申请号：US14693352

申请日：2015-04-22

申请人： Heung-Kyu KWON ,  Min-Ok NA ,  Sungwoo PARK ,  Ji-hyun PARK ,  Su-min PARK

发明人： Heung-Kyu KWON ,  Min-Ok NA ,  Sungwoo PARK ,  Ji-hyun PARK ,  Su-min PARK

IPC分类号： H01L25/065 ,  H01L23/31 ,  H01L23/48 ,  H01L23/00

CPC分类号： H01L25/0657 ,  H01L21/561 ,  H01L21/565 ,  H01L21/566 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/3142 ,  H01L23/481 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/552 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L25/105 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05552 ,  H01L2224/0557 ,  H01L2224/13099 ,  H01L2224/14181 ,  H01L2224/16112 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/1703 ,  H01L2224/17051 ,  H01L2224/17181 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/49 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/81192 ,  H01L2224/85 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01064 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： An apparatus includes a first substrate having a first land and a second substrate having a second land. A first molding compound is disposed between the first substrate and the second substrate. A first semiconductor chip is disposed on the first substrate and in contact with the first molding portion. A first connector contacts the first land and a second connector contacts the second land. The second connector is disposed on the first connector. A volume of the second connector is greater than a volume of the first connector. A surface of the first semiconductor chip is exposed. The first molding compound is in contact with the second connector, and at least a portion of the second connector is surrounded by the first molding compound.

摘要翻译： 一种装置包括具有第一焊盘的第一衬底和具有第二焊盘的第二衬底。 第一模塑料置于第一基材和第二基材之间。 第一半导体芯片设置在第一基板上并与第一模制部分接触。 第一连接器接触第一焊盘，第二连接器接触第二焊盘。 第二连接器设置在第一连接器上。 第二连接器的体积大于第一连接器的体积。 露出第一半导体芯片的表面。 第一模塑料与第二连接器相接触，第二连接器的至少一部分由第一模塑料包围。

公开(公告)号：US20130292828A1

公开(公告)日：2013-11-07

申请号：US13934942

申请日：2013-07-03

申请人： Heung-Kyu KWON ,  Min-Ok NA ,  Sung-Woo PARK ,  Ji-Hyun PARK ,  Su-Min PARK

发明人： Heung-Kyu KWON ,  Min-Ok NA ,  Sung-Woo PARK ,  Ji-Hyun PARK ,  Su-Min PARK

IPC分类号： H01L23/498

CPC分类号： H01L25/0657 ,  H01L21/561 ,  H01L21/565 ,  H01L21/566 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/3142 ,  H01L23/481 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/552 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L25/105 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/13099 ,  H01L2224/14181 ,  H01L2224/16112 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/1703 ,  H01L2224/17051 ,  H01L2224/17181 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/49 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/81192 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01064 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： An apparatus includes a first substrate having a first land and a second substrate having a second land. A first molding compound is disposed between the first substrate and the second substrate. A first semiconductor chip is disposed on the first substrate and in contact with the first molding portion. A first connector contacts the first land and a second connector contacts the second land. The second connector is disposed on the first connector. A volume of the second connector is greater than a volume of the first connector. A surface of the first semiconductor chip is exposed. The first molding compound is in contact with the second connector, and at least a portion of the second connector is surrounded by the first molding compound.

摘要翻译： 一种装置包括具有第一焊盘的第一衬底和具有第二焊盘的第二衬底。 第一模塑料置于第一基材和第二基材之间。 第一半导体芯片设置在第一基板上并与第一模制部分接触。 第一连接器接触第一焊盘，第二连接器接触第二焊盘。 第二连接器设置在第一连接器上。 第二连接器的体积大于第一连接器的体积。 露出第一半导体芯片的表面。 第一模塑料与第二连接器相接触，第二连接器的至少一部分由第一模塑料包围。

公开(公告)号：US20130203219A1

公开(公告)日：2013-08-08

申请号：US13835683

申请日：2013-03-15

申请人： Ji-hyun PARK ,  Heungkyu KWON ,  Min-Ok NA ,  Taehwan KIM

发明人： Ji-hyun PARK ,  Heungkyu KWON ,  Min-Ok NA ,  Taehwan KIM

IPC分类号： H01L21/56

CPC分类号： H01L21/56 ,  H01L21/563 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/3142 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/26175 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83051 ,  H01L2224/83385 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/01078 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/00

摘要： A semiconductor package includes a substrate having an insulation layer. The insulation layer has a first region having a first surface roughness and a second region having a second surface roughness. A semiconductor chip is mounted in the first region, and an underfill resin solution is filled into the space between the semiconductor chip and the insulation layer. The roughness of the second region prevents the underfill resin from flowing out from the semiconductor chip to thereby reduce a size of the semiconductor package.

摘要翻译： 半导体封装包括具有绝缘层的衬底。 绝缘层具有第一表面粗糙度的第一区域和具有第二表面粗糙度的第二区域。 半导体芯片安装在第一区域中，底部填充树脂溶液填充到半导体芯片和绝缘层之间的空间中。 第二区域的粗糙度防止底部填充树脂从半导体芯片流出，从而减小半导体封装的尺寸。

公开(公告)号：US20160190035A1

公开(公告)日：2016-06-30

申请号：US14910280

申请日：2013-08-12

申请人： Min-Ok NA ,  JongKook KIM ,  Hyo-Chang RYU ,  Jin-woo PARK ,  BongJin SON ,  Jang Woo LEE

发明人： Min-Ok NA ,  Jongkook KIM ,  Hyo-Chang RYU ,  Jin-woo PARK ,  BongJin SON ,  Jangwoo LEE

IPC分类号： H01L23/373 ,  H01L25/065 ,  H01L23/367

CPC分类号： H01L23/373 ,  H01L21/563 ,  H01L23/367 ,  H01L23/49827 ,  H01L23/50 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/92 ,  H01L25/065 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/92225 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2225/1094 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/207

摘要： Provided are a thermal interface material layer and a package-on-package device including the same. The package-on-package device may include a thermal interface material layer interposed between lower and upper semiconductor packages and configured to have a specific physical property. Accordingly, it is possible to prevent a crack from occurring in a lower semiconductor chip, when a solder ball joint process is performed to mount the upper semiconductor package on the lower semiconductor package.

摘要翻译： 提供了热界面材料层和包括该封装的封装装置。 封装封装器件可以包括插入在下半导体封装件和上半导体封装件之间并被配置为具有特定物理特性的热界面材料层。 因此，当执行焊球接合处理以将上半导体封装安装在下半导体封装上时，可以防止在下半导体芯片中发生裂纹。

公开(公告)号：US20080160724A1

公开(公告)日：2008-07-03

申请号：US11945896

申请日：2007-11-27

申请人： Hyun-Jung SONG ,  Hak-Kyoon BYUN ,  Jong-Bo SHIM ,  Min-Ok NA

发明人： Hyun-Jung SONG ,  Hak-Kyoon BYUN ,  Jong-Bo SHIM ,  Min-Ok NA

IPC分类号： H01L21/304

CPC分类号： H01L21/6836 ,  B23K26/042 ,  B23K26/18 ,  B23K26/40 ,  B23K2103/50 ,  H01L21/02035 ,  H01L21/78 ,  H01L2221/68327

摘要： Provided is a method of dicing a wafer where a plurality of semiconductor device regions is formed on a front side of the wafer, the semiconductor device regions being separated by scribe lanes, the method comprising dicing the wafer by irradiating a laser beam on a backside of the wafer along the scribe lanes. A laser beam is irradiated from an opposite side of the semiconductor device regions of the wafer so that thermal influence on the semiconductor device regions is minimized to improve the strength of a semiconductor chip. Furthermore, a third tape is used to maintain an arrangement of the semiconductor chips so as to minimize adherence problems caused by the laser beam.

摘要翻译： 本发明提供一种切割晶片的方法，其中在晶片的正面形成有多个半导体器件区域，半导体器件区域被划线分隔开，该方法包括通过在背面侧照射激光束来对晶片进行切割 沿着划线的晶圆。 从晶片的半导体器件区域的相对侧照射激光束，使得对半导体器件区域的热影响最小化，以提高半导体芯片的强度。 此外，使用第三带来保持半导体芯片的布置，以便最小化由激光束引起的粘附问题。