公开(公告)号：US20130052816A1

公开(公告)日：2013-02-28

申请号：US13582239

申请日：2011-03-02

申请人： Hiroshi Kambayashi ,  Akinobu Teramoto ,  Tadahiro Ohmi

发明人： Hiroshi Kambayashi ,  Akinobu Teramoto ,  Tadahiro Ohmi

IPC分类号： H01L21/28

CPC分类号： H01L21/28575 ,  H01L21/28264 ,  H01L29/2003 ,  H01L29/452 ,  H01L29/66522

摘要： A method of producing a semiconductor transistor involving formation of an ohmic electrode on an active layer composed of a GaN-based semiconductor includes a process of forming a first layer 11 composed of tantalum nitride on an active layer 3 and a second layer 12 composed of Al layered on the first layer 11 and a process of forming ohmic electrodes 9s and 9d in ohmic contact with the active layer 3 by heat treating the first layer 11 and the second layer 12 at a temperature of from 520° C. to 600° C.

摘要翻译： 涉及在由GaN基半导体构成的有源层上形成欧姆电极的半导体晶体管的制造方法包括在有源层3上形成由氮化钽构成的第一层11和由Al构成的第二层12的工序 层叠在第一层11上，并且通过在520℃至600℃的温度下热处理第一层11和第二层12，形成欧姆电极9s和9d与有源层3欧姆接触的工艺。

公开(公告)号：US20130292700A1

公开(公告)日：2013-11-07

申请号：US13981048

申请日：2012-01-23

申请人： Akinobu Teramoto ,  Hiroshi Kambayashi ,  Hirokazu Ueda ,  Yuichiro Morozumi ,  Katsushige Harada ,  Kazuhide Hasebe ,  Tadahiro Ohmi

发明人： Akinobu Teramoto ,  Hiroshi Kambayashi ,  Hirokazu Ueda ,  Yuichiro Morozumi ,  Katsushige Harada ,  Kazuhide Hasebe ,  Tadahiro Ohmi

IPC分类号： H01L29/20 ,  H01L21/02

CPC分类号： H01L21/02274 ,  H01L21/02164 ,  H01L21/02178 ,  H01L21/022 ,  H01L21/0228 ,  H01L21/0254 ,  H01L21/28264 ,  H01L23/564 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/42364 ,  H01L29/51 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66462 ,  H01L29/778 ,  H01L29/7787 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for fabricating a semiconductor device including GaN (gallium nitride) that composes a semiconductor layer and includes forming a gate insulating film, in which at least one film selected from the group of a SiO2 film and an Al2O3 film is formed on a nitride layer containing GaN by using microwave plasma and the formed film is used as at least a part of the gate insulating film.

摘要翻译： 一种制造半导体器件的方法，该半导体器件包括构成半导体层并包括形成栅极绝缘膜的GaN（氮化镓），其中在氮化物层上形成选自SiO 2膜和Al 2 O 3膜中的至少一种膜 通过使用微波等离子体形成含GaN的GaN，并且将形成的膜用作栅极绝缘膜的至少一部分。

公开(公告)号：US20130032819A1

公开(公告)日：2013-02-07

申请号：US13582229

申请日：2011-03-02

申请人： Hiroshi Kambayashi ,  Katsunori Ueno ,  Takehiko Nomura ,  Yoshihiro Sato ,  Akinobu Teramoto ,  Tadahiro Ohmi

发明人： Hiroshi Kambayashi ,  Katsunori Ueno ,  Takehiko Nomura ,  Yoshihiro Sato ,  Akinobu Teramoto ,  Tadahiro Ohmi

IPC分类号： H01L29/51

CPC分类号： H01L21/28264 ,  C23C16/403 ,  C23C16/4488 ,  H01L21/02178 ,  H01L21/02277 ,  H01L29/2003 ,  H01L29/513 ,  H01L29/517 ,  H01L29/78

摘要： The semiconductor transistor according the present invention includes an active layer composed of a GaN-based semiconductor and a gate insulating film formed on the active layer. The gate insulating film has a first insulating film including one or more compounds selected from the group consisting of Al2O3, HfO2, ZrO2, La2O3, and Y2O3 formed on the active layer, and a second insulating film composed of SiO2 formed on the first insulating film.

摘要翻译： 根据本发明的半导体晶体管包括由有源层形成的GaN基半导体和栅极绝缘膜构成的有源层。 栅极绝缘膜具有包含一种或多种选自Al 2 O 3，HfO 2，ZrO 2，La 2 O 3和Y 2 O 3的化合物的第一绝缘膜和形成在第一绝缘膜上的由SiO 2构成的第二绝缘膜 。

公开(公告)号：US09230799B2

公开(公告)日：2016-01-05

申请号：US13981048

申请日：2012-01-23

申请人： Akinobu Teramoto ,  Hiroshi Kambayashi ,  Hirokazu Ueda ,  Yuichiro Morozumi ,  Katsushige Harada ,  Kazuhide Hasebe ,  Tadahiro Ohmi

发明人： Akinobu Teramoto ,  Hiroshi Kambayashi ,  Hirokazu Ueda ,  Yuichiro Morozumi ,  Katsushige Harada ,  Kazuhide Hasebe ,  Tadahiro Ohmi

IPC分类号： H01L29/20 ,  H01L21/02 ,  H01L21/28 ,  H01L29/66 ,  H01L29/778 ,  H01L29/423 ,  H01L23/00 ,  H01L29/205 ,  H01L29/51

CPC分类号： H01L21/02274 ,  H01L21/02164 ,  H01L21/02178 ,  H01L21/022 ,  H01L21/0228 ,  H01L21/0254 ,  H01L21/28264 ,  H01L23/564 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/42364 ,  H01L29/51 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66462 ,  H01L29/778 ,  H01L29/7787 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for fabricating a semiconductor device including GaN (gallium nitride) that composes a semiconductor layer and includes forming a gate insulating film, in which at least one film selected from the group of a SiO2 film and an Al2O3 film is formed on a nitride layer containing GaN by using microwave plasma and the formed film is used as at least a part of the gate insulating film.

摘要翻译： 一种制造半导体器件的方法，该半导体器件包括构成半导体层并包括形成栅极绝缘膜的GaN（氮化镓），其中在氮化物层上形成选自SiO 2膜和Al 2 O 3膜中的至少一种膜 通过使用微波等离子体形成含GaN的GaN，并且将形成的膜用作栅极绝缘膜的至少一部分。

公开(公告)号：US09875899B2

公开(公告)日：2018-01-23

申请号：US13582229

申请日：2011-03-02

申请人： Hiroshi Kambayashi ,  Katsunori Ueno ,  Takehiko Nomura ,  Yoshihiro Sato ,  Akinobu Teramoto ,  Tadahiro Ohmi

发明人： Hiroshi Kambayashi ,  Katsunori Ueno ,  Takehiko Nomura ,  Yoshihiro Sato ,  Akinobu Teramoto ,  Tadahiro Ohmi

IPC分类号： H01L21/28 ,  H01L29/51 ,  H01L29/78 ,  H01L21/02 ,  C23C16/40 ,  C23C16/448 ,  H01L29/20

CPC分类号： H01L21/28264 ,  C23C16/403 ,  C23C16/4488 ,  H01L21/02178 ,  H01L21/02277 ,  H01L29/2003 ,  H01L29/513 ,  H01L29/517 ,  H01L29/78

摘要： The semiconductor transistor according the present invention includes an active layer composed of a GaN-based semiconductor and a gate insulating film formed on the active layer. The gate insulating film has a first insulating film including one or more compounds selected from the group consisting of Al2O3, HfO2, ZrO2, La2O3, and Y2O3 formed on the active layer, and a second insulating film composed of SiO2 formed on the first insulating film.

公开(公告)号：US08906796B2

公开(公告)日：2014-12-09

申请号：US13582239

申请日：2011-03-02

申请人： Hiroshi Kambayashi ,  Akinobu Teramoto ,  Tadahiro Ohmi

发明人： Hiroshi Kambayashi ,  Akinobu Teramoto ,  Tadahiro Ohmi

IPC分类号： H01L21/3205 ,  H01L29/45 ,  H01L21/285 ,  H01L29/66 ,  H01L21/28 ,  H01L29/20

CPC分类号： H01L21/28575 ,  H01L21/28264 ,  H01L29/2003 ,  H01L29/452 ,  H01L29/66522

摘要： A method of producing a semiconductor transistor involving formation of an ohmic electrode on an active layer composed of a GaN-based semiconductor includes a process of forming a first layer 11 composed of tantalum nitride on an active layer 3 and a second layer 12 composed of Al layered on the first layer 11 and a process of forming ohmic electrodes 9s and 9d in ohmic contact with the active layer 3 by heat treating the first layer 11 and the second layer 12 at a temperature of from 520° C. to 600° C.

摘要翻译： 涉及在由GaN基半导体构成的有源层上形成欧姆电极的半导体晶体管的制造方法包括在有源层3上形成由氮化钽构成的第一层11和由Al构成的第二层12的工序 层叠在第一层11上，并且通过在520℃至600℃的温度下热处理第一层11和第二层12，形成欧姆电极9s和9d与有源层3欧姆接触的工艺。

公开(公告)号：US08492879B2

公开(公告)日：2013-07-23

申请号：US12681576

申请日：2008-10-06

申请人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Tomoyuki Suwa ,  Rihito Kuroda ,  Hideo Kudo ,  Yoshinori Hayamizu

发明人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Tomoyuki Suwa ,  Rihito Kuroda ,  Hideo Kudo ,  Yoshinori Hayamizu

IPC分类号： H01L29/04

CPC分类号： H01L29/045 ,  H01L21/02381 ,  H01L21/02433 ,  H01L29/78

摘要： On a surface of a semiconductor substrate, a plurality of terraces formed stepwise by an atomic step are formed in the substantially same direction. Using the semiconductor substrate, a MOS transistor is formed so that no step exists in a carrier traveling direction (source-drain direction).

摘要翻译： 在半导体基板的表面上，以大致相同的方向形成有以原子台阶逐步形成的多个台阶。 使用半导体衬底，形成MOS晶体管，使得在载流子行进方向（源 - 漏方向）上不存在台阶。

公开(公告)号：US08362567B2

公开(公告)日：2013-01-29

申请号：US12309245

申请日：2007-07-12

申请人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Rihito Kuroda

发明人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Rihito Kuroda

IPC分类号： H01L21/70

CPC分类号： H01L29/045 ,  H01L21/02057 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/823807 ,  H01L21/823835 ,  H01L21/82385 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/41766 ,  H01L29/456 ,  H01L29/518 ,  H01L29/785 ,  H01L2029/7857

摘要： In a semiconductor device, the degree of flatness of 0.3 nm or less in terms of a peak-to-valley (P-V) value is realized by rinsing a silicon surface with hydrogen-added ultrapure water in a light-screened state and in a nitrogen atmosphere and a contact resistance of 10−11 Ωcm2 or less is realized by setting a work function difference of 0.2 eV or less between an electrode and the silicon. Thus, the semiconductor device can operate on a frequency of 10 GHz or higher.

摘要翻译： 在半导体装置中，以峰 - 谷（PV）值为单位，平坦度为0.3nm以下的程度是通过在加有荧光的状态下加氢的超纯水冲洗硅表面而实现的 通过在电极和硅之间设定0.2eV以下的功函数差来实现10-11＆OHgr·cm 2以下的接触电阻。 因此，半导体器件可以在10GHz或更高的频率上工作。

公开(公告)号：US20120234491A1

公开(公告)日：2012-09-20

申请号：US13469851

申请日：2012-05-11

申请人： Tadahiro OHMI ,  Akinobu Teramoto

发明人： Tadahiro OHMI ,  Akinobu Teramoto

IPC分类号： B05B1/18 ,  C23C16/511 ,  C23C16/50

CPC分类号： H01L21/3065 ,  C23C16/402 ,  C23C16/511 ,  H01J37/32192 ,  H01J37/3244 ,  H01J37/32449

摘要： A plasma processing apparatus in which consumption of expensive krypton and xenon gases is suppressed as much as possible while reducing damage on a workpiece during plasma processing. In plasma processing of a substrate using a rare gas, two or more kinds of different rare gases are employed, and an inexpensive argon gas is used as one rare gas and any one or both of krypton and xenon gases having a larger collision cross-sectional area against electron than that of the argon gas is used as the other gas. Consequently, consumption of expensive krypton and xenon gases is suppressed as much as possible and damage on a workpiece is reduced during plasma processing.

摘要翻译： 一种等离子体处理装置，其中尽可能地抑制昂贵的氪气和氙气的消耗，同时减少等离子体处理期间对工件的损坏。 在使用稀有气体的基板的等离子体处理中，使用两种以上的不同种类的稀有气体，廉价的氩气用作一种稀有气体，氪气和氙气气体中的任何一种或两者具有较大的碰撞横截面 作为其他气体，使用与氩气相比的电子区域。 因此，尽可能地抑制昂贵的氪气和氙气的消耗，并且在等离子体处理期间减少了工件上的损坏。

公开(公告)号：US20120146102A1

公开(公告)日：2012-06-14

申请号：US13372159

申请日：2012-02-13

申请人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Rihito Kuroda

发明人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Rihito Kuroda

IPC分类号： H01L29/04 ,  H01L29/786

CPC分类号： H01L27/1203 ,  H01L21/28202 ,  H01L29/518 ,  H01L29/78654 ,  H01L29/78696

摘要： An accumulation mode transistor has an impurity concentration of a semiconductor layer in a channel region at a value higher than 2×1017 cm−3 to achieve a large gate voltage swing.

摘要翻译： 累积模式晶体管的沟道区域中的半导体层的杂质浓度高于2×1017cm-3，以实现大的栅极电压摆动。