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    Cobalt silicide metallization for semiconductor integrated circuits
    3.
    发明授权
    Cobalt silicide metallization for semiconductor integrated circuits 失效
    半导体集成电路用硅化钴金属化

    公开(公告)号：US4378628A

    公开(公告)日：1983-04-05

    申请号：US296914

    申请日：1981-08-27

    申请人： Hyman J. Levinstein ,  Shyam P. Murarka ,  Ashok K. Sinha

    发明人： Hyman J. Levinstein ,  Shyam P. Murarka ,  Ashok K. Sinha

    IPC分类号： H01L29/78 ,  H01L21/28 ,  H01L21/285 ,  H01L21/336

    CPC分类号： H01L29/66575 ,  H01L21/28097 ,  H01L21/28518

    摘要： In order to form MOSFET structures, a cobalt layer (16) is deposited and sintered, at about 400.degree. C. to 500.degree. C., on a patterned semiconductor wafer having exposed polycrystalline (14) or monocrystalline (11) silicon portions, as well as exposed oxide (15 or 25) portions. The cobalt reacts with exposed surfaces of the silicon portions and forms thereat such compounds as cobalt monosilicide (CoSi) or di-cobalt silicide (C0.sub.2 Si), or a mixture of both. The unreacted cobalt is selectively removed, as by selective etching in a suitable acid bath. A heat treatment at about 700.degree. C. or more, preferably in an oxidizing ambient which contains typically about 2 percent oxygen, converts the cobalt compound(s) into relatively stable cobalt disilicide (CoSi.sub.2). Subsequently, deposition of an in situ doped layer (33) of polycrystalline silicon (polysilicon) on the cobalt disilicide contacting the monocrystalline silicon portions--followed by gettering, deposition of a layer (34) of aluminum, and standard etch-patterning of the aluminum and polysilicon layers--completes the metallization of the desired MOSFET structures on the silicon wafer.

    摘要翻译： 为了形成MOSFET结构，在具有暴露的多晶（14）或单晶（11）硅部分的图案化半导体晶片上，在约400℃至500℃下沉积并烧结钴层（16），如 以及暴露的氧化物（15或25）部分。 钴与硅部分的暴露表面反应并在其上形成诸如一硅化钴（CoSi）或二钴硅化物（CO 2 Si）或两者的混合物的化合物。 选择性地除去未反应的钴，如通过在合适的酸浴中的选择性蚀刻。 约700℃或更高，优选氧化环境中通常含有约2％氧气的热处理将钴化合物转化成相对稳定的二硅化钴（CoSi 2）。 随后，将多晶硅（多晶硅）的原位掺杂层（33）沉积在与单晶硅部分接触的二硅化钴上，然后吸杂，沉积铝层（34），并且对铝进行标准蚀刻图案化 和多晶硅层 - 完成硅晶片上期望的MOSFET结构的金属化。

    Monitoring dimensions of features at different locations in the processing of substrates
    10.
    发明授权
    Monitoring dimensions of features at different locations in the processing of substrates 失效
    监测基板加工中不同位置特征的尺寸

    公开(公告)号：US06829056B1

    公开(公告)日：2004-12-07

    申请号：US10646943

    申请日：2003-08-21

    申请人： Michael Barnes ,  John Holland ,  Hongqing Shan ,  Bryan Y. Pu ,  Mohit Jain ,  Zhifeng Sui ,  Michael D. Armacost ,  Neil E. Hanson ,  Diana Xiaobing Ma ,  Ashok K. Sinha ,  Dan Maydan

    发明人： Michael Barnes ,  John Holland ,  Hongqing Shan ,  Bryan Y. Pu ,  Mohit Jain ,  Zhifeng Sui ,  Michael D. Armacost ,  Neil E. Hanson ,  Diana Xiaobing Ma ,  Ashok K. Sinha ,  Dan Maydan

    IPC分类号： G01B1114

    CPC分类号： H01L21/67253 ,  H01J37/32935 ,  H01L21/67069

    摘要： A substrate processing apparatus has a chamber having a substrate support, gas distributor, gas energizer, and gas exhaust port. A process monitor is provided to monitor features in a first region of the substrate and generate a corresponding first signal, and to monitor features in a second region of the substrate and generate a second signal. A chamber controller receives and evaluates the first and second signals, and operates the chamber in relation to the signals. For example, the chamber controller can select a process recipe depending upon the signal values. The chamber controller can also set a process parameter at a first level in a first processing sector and at a second level in a second processing sector. The apparatus provides a closed control loop to independently monitor and control processing of features at different regions of the substrate.

    摘要翻译： 基板处理装置具有具有基板支撑件，气体分配器，气体激励器和排气口的腔室。 提供过程监视器以​​监测衬底的第一区域中的特征并产生相应的第一信号，并且监测衬底的第二区域中的特征并产生第二信号。 室控制器接收并评估第一和第二信号，并相对于信号操作室。 例如，腔室控​​制器可以根据信号值选择工艺配方。 腔室控制器还可以在第一处理扇区中将处理参数设置在第一电平处，并在第二处理扇区中将第二电平设置为第二电平。 该装置提供一个闭合的控制回路以独立地监测和控制基板的不同区域处的特征的处理。