-
公开(公告)号：US08044757B2
公开(公告)日：2011-10-25
申请号：US12648117
申请日：2009-12-28
申请人： Hyun-Cheol Bae , Kwang-Seong Choi , Yong Sung Eom , Jong Tae Moon , Moo Jung Chu , Jong-Hyun Lee
发明人： Hyun-Cheol Bae , Kwang-Seong Choi , Yong Sung Eom , Jong Tae Moon , Moo Jung Chu , Jong-Hyun Lee
CPC分类号： H01F17/0013 , H01F2017/002 , H01L2224/48091 , H01L2224/73257 , H01L2924/19107 , H01L2924/00014
摘要： Provided is an electronic device that includes an LTCC inductor including a first sheet disposed on a substrate and including a first conductive pattern, a second sheet disposed on the first sheet and including a second conductive pattern, and a via electrically connecting the first conductive pattern to the second conductive pattern, and a spacer disposed on a lower surface of the first sheet to provide an air gap between the substrate and the first sheet, wherein the first conductive pattern is exposed out of the lower surface of the first sheet.
摘要翻译： 提供一种电子设备，其包括LTCC电感器，其包括设置在基板上的第一片，并且包括第一导电图案，设置在第一片上并包括第二导电图案的第二片，以及将第一导电图案电连接到 第二导电图案和设置在第一片的下表面上的间隔件，以在基片和第一片之间提供气隙，其中第一导电图案从第一片的下表面露出。
-
2.发明申请METHOD FOR FABRICATING SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR PACKAGE USING THE SAME 有权用于制造半导体封装的方法和使用该半导体封装的半导体封装公开(公告)号：US20100320596A1
公开(公告)日：2010-12-23
申请号：US12565171
申请日：2009-09-23
IPC分类号： H01L23/488 , H01L21/60
CPC分类号： H01L24/81 , H01L21/486 , H01L21/563 , H01L23/29 , H01L23/293 , H01L23/49816 , H01L23/49827 , H01L24/16 , H01L24/29 , H01L24/32 , H01L2224/0554 , H01L2224/05568 , H01L2224/05573 , H01L2224/05644 , H01L2224/05655 , H01L2224/05666 , H01L2224/05669 , H01L2224/1134 , H01L2224/1152 , H01L2224/73104 , H01L2224/73203 , H01L2224/81192 , H01L2224/818 , H01L2224/81801 , H01L2224/83194 , H01L2924/00013 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/15787 , H01L2224/13099 , H01L2924/00 , H01L2924/00012 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： Provided is a method for fabricating semiconductor package and a semiconductor package fabricated using the same. The method for fabricating semiconductor package dopes a mixture including the polymer material and the solder particle on the substrate in which the terminal is formed and applies heat, and thus the solder particle flows (or diffuses) toward the terminal in the heated polymer resin to adhere to the exposed surface of the terminal, i.e., the side surface and upper surface of the terminal, thereby forming the solder layer. The solder layer improves the adhesive strength between the terminal of the semiconductor chip and the terminal of the substrate in the subsequent flip chip bonding process.
摘要翻译： 提供一种制造半导体封装的方法和使用其制造的半导体封装。 制造半导体封装的方法在形成端子的基板上涂覆包括聚合物材料和焊料颗粒的混合物，并施加热量，从而焊料颗粒向加热的聚合物树脂中的端子流动（或扩散）以粘附 到端子的暴露表面，即端子的侧表面和上表面，从而形成焊料层。 焊料层在随后的倒装芯片接合工艺中提高了半导体芯片的端子和衬底的端子之间的粘合强度。
-
公开(公告)号：US08030200B2
公开(公告)日：2011-10-04
申请号：US12565171
申请日：2009-09-23
IPC分类号： H01L21/44
CPC分类号： H01L24/81 , H01L21/486 , H01L21/563 , H01L23/29 , H01L23/293 , H01L23/49816 , H01L23/49827 , H01L24/16 , H01L24/29 , H01L24/32 , H01L2224/0554 , H01L2224/05568 , H01L2224/05573 , H01L2224/05644 , H01L2224/05655 , H01L2224/05666 , H01L2224/05669 , H01L2224/1134 , H01L2224/1152 , H01L2224/73104 , H01L2224/73203 , H01L2224/81192 , H01L2224/818 , H01L2224/81801 , H01L2224/83194 , H01L2924/00013 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/15787 , H01L2224/13099 , H01L2924/00 , H01L2924/00012 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A method for fabricating a semiconductor package, includes the steps of forming a first terminal at a first substrate; mixing a polymer resin and solder particles to provide a mixture; covering at least one of an upper surface and side surfaces of the first terminal with the mixture; and heating the first substrate at a temperature higher than a melting point of the solder particles of the mixture to form a solder layer that covers the at least one of an upper surface and a side surface of the first terminal. The solder particles flow or diffuse toward the terminal in the heated polymer resin to adhere to at least some of the exposed surfaces of the terminal thereby forming the solder layer. The solder layer improves the adhesive strength between the terminals of the semiconductor chip and the substrate in the subsequent flip chip bonding process.
摘要翻译： 一种半导体封装的制造方法，包括在第一基板上形成第一端子的工序; 混合聚合物树脂和焊料颗粒以提供混合物; 用所述混合物覆盖所述第一端子的上表面和侧表面中的至少一个; 以及在高于混合物的焊料颗粒的熔点的温度下加热第一衬底，以形成覆盖第一端子的上表面和侧表面中的至少一个的焊料层。 焊料颗粒朝向加热的聚合物树脂中的端子流动或扩散以粘附到端子的至少一些暴露表面，从而形成焊料层。 焊料层在随后的倒装芯片接合工艺中提高了半导体芯片的端子与衬底之间的粘合强度。
-
4.发明申请VACUUM WAFER LEVEL PACKAGING METHOD FOR MICRO ELECTRO MECHANICAL SYSTEM DEVICE 有权用于微电子机械系统装置的真空水平包装方法公开(公告)号：US20120164787A1
公开(公告)日：2012-06-28
申请号：US13309582
申请日：2011-12-02
申请人： Jong Tae Moon , Yong Sung Eom , Hyun-Cheol Bae
发明人： Jong Tae Moon , Yong Sung Eom , Hyun-Cheol Bae
IPC分类号： H01L21/60
CPC分类号： B81C1/00293 , B81C2203/0145 , B81C2203/035 , H01L21/50 , H01L23/10 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/81 , H01L24/83 , H01L24/94 , H01L2224/0401 , H01L2224/05568 , H01L2224/131 , H01L2224/16238 , H01L2224/291 , H01L2224/81815 , H01L2224/83815 , H01L2224/94 , H01L2924/00014 , H01L2924/1461 , H01L2924/014 , H01L2224/81 , H01L2224/83 , H01L2924/00 , H01L2224/05552
摘要： Disclosed is a vacuum wafer level packaging method for a micro electro mechanical system device, including: forming a plurality of via holes on an upper wafer for protecting a micro electro mechanical system (MEMS) wafer; forming at least one metal layer on inner walls of the plurality of via holes and regions extended from the plurality of via holes; arranging and bonding the upper wafer and the MEMS wafer at atmospheric pressure; applying solder paste to the regions extended from the plurality of via holes; filling a solder in the plurality of via holes by increasing the temperature of a high-vacuum chamber to melt the solder paste; and changing the solder in the plurality of via holes to a solid state by lowering the temperature of the high-vacuum chamber.
摘要翻译： 公开了一种用于微机电系统装置的真空晶片级封装方法，包括：在上晶片上形成多个通孔，用于保护微机电系统（MEMS）晶片; 在所述多个通孔的内壁和从所述多个通孔延伸的区域中形成至少一个金属层; 在大气压下布置和粘合上晶片和MEMS晶片; 将焊膏施加到从所述多个通孔延伸的区域; 通过增加高真空室的温度来熔化焊膏，在多个通孔中填充焊料; 并且通过降低高真空室的温度将多个通孔中的焊料改变为固态。
-
5.发明授权Vacuum wafer level packaging method for micro electro mechanical system device 有权微电子机械系统装置的真空晶片级封装方法公开(公告)号：US08524571B2
公开(公告)日：2013-09-03
申请号：US13309582
申请日：2011-12-02
申请人： Jong Tae Moon , Yong Sung Eom , Hyun-Cheol Bae
发明人： Jong Tae Moon , Yong Sung Eom , Hyun-Cheol Bae
CPC分类号： B81C1/00293 , B81C2203/0145 , B81C2203/035 , H01L21/50 , H01L23/10 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/81 , H01L24/83 , H01L24/94 , H01L2224/0401 , H01L2224/05568 , H01L2224/131 , H01L2224/16238 , H01L2224/291 , H01L2224/81815 , H01L2224/83815 , H01L2224/94 , H01L2924/00014 , H01L2924/1461 , H01L2924/014 , H01L2224/81 , H01L2224/83 , H01L2924/00 , H01L2224/05552
摘要： Disclosed is a vacuum wafer level packaging method for a micro electro mechanical system device, including: forming a plurality of via holes on an upper wafer for protecting a micro electro mechanical system (MEMS) wafer; forming at least one metal layer on inner walls of the plurality of via holes and regions extended from the plurality of via holes; arranging and bonding the upper wafer and the MEMS wafer at atmospheric pressure; applying solder paste to the regions extended from the plurality of via holes; filling a solder in the plurality of via holes by increasing the temperature of a high-vacuum chamber to melt the solder paste; and changing the solder in the plurality of via holes to a solid state by lowering the temperature of the high-vacuum chamber.
摘要翻译： 公开了一种用于微机电系统装置的真空晶片级封装方法，包括：在上晶片上形成多个通孔，用于保护微机电系统（MEMS）晶片; 在所述多个通孔的内壁和从所述多个通孔延伸的区域中形成至少一个金属层; 在大气压下布置和粘合上晶片和MEMS晶片; 将焊膏施加到从所述多个通孔延伸的区域; 通过增加高真空室的温度来熔化焊膏，在多个通孔中填充焊料; 并且通过降低高真空室的温度将多个通孔中的焊料改变为固态。
-
公开(公告)号：US08723292B2
公开(公告)日：2014-05-13
申请号：US13493458
申请日：2012-06-11
IPC分类号： H01L27/08
CPC分类号： H01L27/08 , H01L23/147 , H01L23/481 , H01L23/49822 , H01L23/49827 , H01L23/5227 , H01L27/0694 , H01L2924/0002 , H01L2924/19042 , H01L2924/00
摘要： Disclosed is a silicon interposer that can reduce the entire area of a semiconductor package and increase the degree of integration by forming inductors at a lower part in addition to an upper part of a silicon substrate. The silicon interposer includes a silicon substrate, an upper inductor layer formed at the upper part of the silicon substrate and a lower inductor layer formed at the lower part of the silicon substrate.
摘要翻译： 公开了一种硅插入器，其可以减少半导体封装的整个面积，并且除了硅衬底的上部之外，通过在下部形成电感器来增加集成度。 硅插入器包括硅衬底，形成在硅衬底的上部的上电感器层和形成在硅衬底的下部的下电感层。
-
7.发明申请BURIED CAPACITOR, METHOD OF MANUFACTURING THE SAME, AND METHOD OF CHANGING CAPACITANCE THEREOF 审中-公开烧结电容器，其制造方法及其电容变化方法公开(公告)号：US20100142115A1
公开(公告)日：2010-06-10
申请号：US12499762
申请日：2009-07-08
申请人： Hyun-Cheol Bae , Kwang-Seong Choi , Ju Yeon Hong , Jong Tae Moon , Yong il Jun
发明人： Hyun-Cheol Bae , Kwang-Seong Choi , Ju Yeon Hong , Jong Tae Moon , Yong il Jun
CPC分类号： H01G4/30 , H01G4/232 , H01G4/38 , H01G4/40 , H05K1/0206 , H05K1/0306 , H05K1/162 , H05K3/4629 , H05K2201/0187 , H05K2201/09672 , H05K2201/0969 , H05K2203/171 , Y10T29/43 , Y10T156/1056
摘要： Provided are a buried capacitor, a method of manufacturing the same, and a method of changing a capacitance thereof. The buried capacitor includes an upper electrode including at least one first hole, a lower electrode including at least one second hole, and a dielectric interposed between the upper electrode and the lower electrode.
摘要翻译： 提供一种埋电容器，其制造方法和改变其电容的方法。 掩埋电容器包括上电极，其包括至少一个第一孔，包括至少一个第二孔的下电极和介于上电极和下电极之间的电介质。
-
公开(公告)号：US20120154072A1
公开(公告)日：2012-06-21
申请号：US13294204
申请日：2011-11-11
申请人： Hyun-Cheol Bae , Jong Tae Moon
发明人： Hyun-Cheol Bae , Jong Tae Moon
CPC分类号： H03H9/706 , H03H9/0557 , H03H9/0561 , H03H9/0571 , Y10T29/4902
摘要： Disclosed is a fabrication method for miniaturizing a film bulk acoustic wave resonator (FBAR) duplexer module including two FBAR filters, a tuning inductor, and a phase shifter. An exemplary embodiment of the present disclosure provides a method of miniaturizing a FBAR duplexer module, including forming a tuning inductor in a multilayer printed circuit board (PCB), forming a phase shifter in the multilayer PCB, and forming at least one of a transmitting FBAR filter and a receiving FBAR filter in the multilayer PCB.
摘要翻译： 公开了一种用于使包括两个FBAR滤波器，调谐电感器和移相器的薄膜压电谐振器（FBAR）双工器模块小型化的制造方法。 本公开的示例性实施例提供了一种使FBAR双工器模块小型化的方法，包括在多层印刷电路板（PCB）中形成调谐电感器，在多层PCB中形成移相器，以及形成传输FBAR 过滤器和多层PCB中的接收FBAR滤波器。
-
公开(公告)号：US06652289B2
公开(公告)日：2003-11-25
申请号：US10325816
申请日：2002-12-18
申请人： Hyun-Cheol Bae
发明人： Hyun-Cheol Bae
IPC分类号： H01R3300
CPC分类号： H01R13/623 , H01R13/4361 , H01R13/64 , H01R13/74
摘要： A vehicle door connector structure, in which the connector structure is easily and firmly coupled to a vehicle body to secure a tight sealing and prevent water leakage between the vehicle body and the connector structure. The connector structure also prevents vibration and noise, improves assembly efficiency and maintenance of associated components. Furthermore, the connector structure reduces the possibility of door wires being exposed to any sharp structural objects causing a short circuit.
摘要翻译： 一种车门连接器结构，其中连接器结构容易且牢固地联接到车体以确保紧密密封并防止车身和连接器结构之间的水泄漏。 连接器结构还防止振动和噪音，提高组装效率和维护相关部件。 此外，连接器结构减少了门线暴露于导致短路的任何尖锐结构物体的可能性。
-
-
-
-
-
-
-
-
搜索结果
9 条记录 (耗时 0.038 秒)
