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12 条记录 (耗时 0.012 秒)

    NOVEL CONNECTOR DESIGNS FOR PHOTONICS PACKAGING INTEGRATION
    1.
    发明申请
    NOVEL CONNECTOR DESIGNS FOR PHOTONICS PACKAGING INTEGRATION 有权

    公开(公告)号：US20220196935A1

    公开(公告)日：2022-06-23

    申请号：US17131682

    申请日：2020-12-22

    申请人： Intel Corporation

    发明人： Xiaoqian LI ,  Nitin DESHPANDE ,  Omkar KARHADE ,  Asako TODA ,  Divya PRATAP ,  Zhichao ZHANG

    IPC分类号： G02B6/42

    摘要： Embodiments disclosed herein include photonics packages. In an embodiment, a photonics package comprises a package substrate, and a compute die over the package substrate. In an embodiment, a photonics die is also over the package substrate, and the photonics die overhangs an edge of the package substrate. In an embodiment, an integrated heat spreader (IHS) is over the compute die and the photonics die, and a fiber connector is coupled to the photonics die. In an embodiment, the fiber connector is attached to the IHS

    MICRO-LENS ARRAY OPTICALLY COUPLED WITH A PHOTONICS DIE
    2.
    发明申请
    MICRO-LENS ARRAY OPTICALLY COUPLED WITH A PHOTONICS DIE 有权

    公开(公告)号：US20220196931A1

    公开(公告)日：2022-06-23

    申请号：US17131597

    申请日：2020-12-22

    申请人： Intel Corporation

    发明人： Xiaoqian LI ,  Nitin DESHPANDE ,  Omkar KARHADE

    IPC分类号： G02B6/42

    摘要： Embodiments described herein may be related to apparatuses, processes, and techniques for coupling a micro-lens array to a photonics die. In embodiments, this coupling may be performed as an attach at a wafer level. In embodiments, wafer level optical testing of the photonics die with the attached micro-lens array may be tested electrically and optically before the photonics die is assembled into a package, in various configurations. Other embodiments may be described and/or claimed.

    OPTICAL FIBER CONNECTOR ATTACH TO DIE IN WAFER OR PANEL LEVEL TO ENABLE KNOWN GOOD DIE
    3.
    发明申请
    OPTICAL FIBER CONNECTOR ATTACH TO DIE IN WAFER OR PANEL LEVEL TO ENABLE KNOWN GOOD DIE 有权

    公开(公告)号：US20210405311A1

    公开(公告)日：2021-12-30

    申请号：US16911764

    申请日：2020-06-25

    申请人： Intel Corporation

    发明人： Xiaoqian LI ,  Nitin DESHPANDE ,  Omkar KARHADE

    IPC分类号： G02B6/42 ,  G02B6/43

    摘要： Embodiments disclosed herein include electronic packages with photonics modules. In an embodiment, a photonics module comprises a carrier substrate and a photonics die over the carrier substrate. In an embodiment, the photonics die has a first surface facing away from the carrier substrate and a second surface facing the carrier substrate, and a plurality of V-grooves are disposed on the first surface proximate to an edge of the photonics die. In an embodiment, the photonics module further comprises a fiber connector attached to the photonics die, where the fiber connector couples a plurality of optical fibers to the photonics die. In an embodiment, individual ones of the plurality of optical fibers are positioned in the V-grooves.

    PATCH ON INTERPOSER ARCHITECTURE FOR LOW COST OPTICAL CO-PACKAGING
    5.
    发明申请
    PATCH ON INTERPOSER ARCHITECTURE FOR LOW COST OPTICAL CO-PACKAGING 有权

    公开(公告)号：US20220196943A1

    公开(公告)日：2022-06-23

    申请号：US17131621

    申请日：2020-12-22

    申请人： Intel Corporation

    发明人： Xiaoqian LI ,  Nitin DESHPANDE ,  Omkar KARHADE ,  Ravindranath V. MAHAJAN

    IPC分类号： G02B6/42 ,  H01L25/16 ,  H01L23/00 ,  H01L23/367

    摘要： A semiconductor package comprises an interposer and a photonics die. The photonics die has a front side with an on-chip fiber connector and solder bumps, the photonics die over the interposer with the on-chip fiber connector and the solder bumps facing away from the interposer. A patch substrate is mounted on the interposer adjacent to the photonics die. A logic die is mounted on the patch substrate with an overhang past an edge of the patch substrate and the overhang is attached to the solder bumps of the photonics die. An integrated heat spreader (IHS) is over the logic die such that the photonics die does not directly contact the IHS.

    OPEN CAVITY BRIDGE CO-PLANAR PLACEMENT ARCHITECTURES AND PROCESSES
    6.
    发明申请
    OPEN CAVITY BRIDGE CO-PLANAR PLACEMENT ARCHITECTURES AND PROCESSES 有权

    公开(公告)号：US20210305132A1

    公开(公告)日：2021-09-30

    申请号：US16828405

    申请日：2020-03-24

    申请人： Intel Corporation

    发明人： Omkar KARHADE ,  Digvijay RAORANE ,  Sairam AGRAHARAM ,  Nitin DESHPANDE ,  Mitul MODI ,  Manish DUBEY ,  Edvin CETEGEN

    IPC分类号： H01L23/482 ,  H01L23/538 ,  H01L23/495

    摘要： Embodiments disclosed herein include multi-die packages with open cavity bridges. In an example, an electronic apparatus includes a package substrate having alternating metallization layers and dielectric layers. The package substrate includes a first plurality of substrate pads and a second plurality of substrate pads. The package substrate also includes an open cavity between the first plurality of substrate pads and the second plurality of substrate pads, the open cavity having a bottom and sides. The electronic apparatus also includes a bridge die in the open cavity, the bridge die including a first plurality of bridge pads, a second plurality of bridge pads, and conductive traces. An adhesive layer couples the bridge die to the bottom of the open cavity. A gap is laterally between the bridge die and the sides of the open cavity, the gap surrounding the bridge die.

    ENABLING PASSIVE ALIGNMENT FOR LENS ATTACH
    8.
    发明申请
    ENABLING PASSIVE ALIGNMENT FOR LENS ATTACH 有权

    公开(公告)号：US20220308293A1

    公开(公告)日：2022-09-29

    申请号：US17213131

    申请日：2021-03-25

    申请人： Intel Corporation

    发明人： Xiaoqian LI ,  Wesley MORGAN ,  Nitin DESHPANDE ,  Divya PRATAP

    IPC分类号： G02B6/42

    摘要： Embodiments disclosed herein include photonics packages. In an embodiment, a photonics package comprises a photonics die and a plurality of v-grooves on the photonics die. In an embodiment, a lens array is optically coupled to a spot size converter on the photonics die. In an embodiment, the lens array comprises a main body and a plurality of lenses extending out from the main body.