公开(公告)号：US20160358897A1

公开(公告)日：2016-12-08

申请号：US14778036

申请日：2014-12-09

Applicant: INTEL CORPORATION

Inventor： Sven ALBERS ,  Andreas WOLTER ,  Klaus REINGRUBER ,  Thorsten MEYER

IPC: H01L25/16 ,  H01L23/31 ,  H01L21/56 ,  H01L23/498 ,  H01L49/02 ,  H01L21/683

CPC classification number: H01L25/16 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/48 ,  H01L23/49816 ,  H01L23/552 ,  H01L23/66 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/32 ,  H01L24/73 ,  H01L24/92 ,  H01L24/96 ,  H01L25/065 ,  H01L25/0655 ,  H01L25/07 ,  H01L25/50 ,  H01L28/00 ,  H01L2221/68359 ,  H01L2223/6677 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81201 ,  H01L2224/81815 ,  H01L2224/92125 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/3025 ,  H01L2924/014 ,  H01L2924/00014

Abstract: A method including forming at least one passive structure on a substrate by a build-up process; introducing one or more integrated circuit chips on the substrate; and introducing a molding compound on the at least one passive structure and the one or more integrated circuit chips. A method including forming at least one passive structure on a substrate by a three-dimensional printing process; introducing one or more integrated circuit chips on the substrate; and embedding the at least one passive structure and the one or more integrated circuit chips in a molding compound. An apparatus including a package substrate including at least one three-dimensional printed passive structure and one or more integrated circuit chips embedded in a molding material.

Abstract translation: 一种方法，包括通过积聚过程在衬底上形成至少一个被动结构; 在衬底上引入一个或多个集成电路芯片; 以及在所述至少一个无源结构和所述一个或多个集成电路芯片上引入模塑料。 一种方法，包括通过三维印刷方法在基板上形成至少一个被动结构; 在衬底上引入一个或多个集成电路芯片; 以及将所述至少一个被动结构和所述一个或多个集成电路芯片嵌入到模塑料中。 一种包括包括至少一个三维印刷无源结构和嵌入在成型材料中的一个或多个集成电路芯片的封装基板的装置。

公开(公告)号：US20180286799A1

公开(公告)日：2018-10-04

申请号：US15997555

申请日：2018-06-04

Applicant: Intel Corporation

Inventor： Thorsten MEYER ,  Gerald OFNER ,  Andreas WOLTER ,  Georg SEIDEMANN ,  Sven ALBERS ,  Christian GEISSLER

IPC: H01L23/498 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L23/49838 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/565 ,  H01L23/13 ,  H01L23/3114 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/50 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/96 ,  H01L25/16 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16227 ,  H01L2224/24195 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2924/15151 ,  H01L2924/15159 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105

Abstract: A microelectronic package including a passive microelectronic device disposed within a package body, wherein the package body is the portion of the microelectronic package which provides support and/or rigidity to the microelectronic package. In a flip-chip type microelectronic package, the package body may comprise a microelectronic substrate to which an active microelectronic device is electrically attached. In an embedded device type microelectronic package, the package body may comprise the material in which the active microelectronic device is embedded.

公开(公告)号：US20240213225A1

公开(公告)日：2024-06-27

申请号：US18601774

申请日：2024-03-11

Applicant: Intel Corporation

Inventor： Georg SEIDEMANN ,  Klaus REINGRUBER ,  Christian GEISSLER ,  Sven ALBERS ,  Andreas WOLTER ,  Marc DITTES ,  Richard PATTEN

IPC: H01L25/065 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/48 ,  H01L23/498 ,  H01L23/538 ,  H01L25/00

CPC classification number: H01L25/0657 ,  H01L21/486 ,  H01L23/3107 ,  H01L23/48 ,  H01L23/49827 ,  H01L23/5384 ,  H01L24/19 ,  H01L24/20 ,  H01L24/25 ,  H01L24/81 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/50 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3135 ,  H01L23/49816 ,  H01L23/5389 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2224/2518 ,  H01L2224/73259 ,  H01L2224/81005 ,  H01L2224/92224 ,  H01L2224/97 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2924/15311 ,  H01L2924/18161 ,  H01L2924/3511

Abstract: Embodiments are generally directed to package stacking using chip to wafer bonding. An embodiment of a device includes a first stacked layer including one or more semiconductor dies, components or both, the first stacked layer further including a first dielectric layer, the first stacked layer being thinned to a first thickness; and a second stacked layer of one or more semiconductor dies, components, or both, the second stacked layer further including a second dielectric layer, the second stacked layer being fabricated on the first stacked layer.

公开(公告)号：US20220108976A1

公开(公告)日：2022-04-07

申请号：US17553679

申请日：2021-12-16

Applicant: Intel Corporation

Inventor： Georg SEIDEMANN ,  Klaus REINGRUBER ,  Christian GEISSLER ,  Sven ALBERS ,  Andreas WOLTER ,  Marc DITTES ,  Richard PATTEN

IPC: H01L25/065 ,  H01L23/48 ,  H01L23/00 ,  H01L25/00 ,  H01L23/498 ,  H01L21/48 ,  H01L23/31 ,  H01L23/538

Abstract: Embodiments are generally directed to package stacking using chip to wafer bonding. An embodiment of a device includes a first stacked layer including one or more semiconductor dies, components or both, the first stacked layer further including a first dielectric layer, the first stacked layer being thinned to a first thickness; and a second stacked layer of one or more semiconductor dies, components, or both, the second stacked layer further including a second dielectric layer, the second stacked layer being fabricated on the first stacked layer.

公开(公告)号：US20160224148A1

公开(公告)日：2016-08-04

申请号：US14778142

申请日：2014-12-16

Applicant: Intel Corporation

Inventor： Sven ALBERS ,  Klaus Reingruber ,  Teodora Ossiander ,  Andreas Wolter ,  Sonja Koller ,  Georg Seidemann ,  Jan Proschwitz ,  Hans-Joachim Barth ,  Bastiaan Elshof

IPC: G06F3/044 ,  H04B1/3827

CPC classification number: G06F3/044 ,  G01L1/24 ,  G06F1/163 ,  G06F3/03547 ,  G06F3/038 ,  G06F3/042 ,  G06F3/045 ,  G06F2203/04102 ,  G06F2203/04109 ,  H04B1/385

Abstract: Some forms relate to wearable computing devices that include a “touch pad” like interface. In some forms, the example wearable computing devices may be integrated with (or attached to) textiles (i.e. clothing). In other forms, the example wearable computing devices may be attached directly to the skin of someone (i.e., similar to a bandage) that utilizes any of the example wearable computing devices. The example wearable computing devices include a flexible touch pad that may allow a user of the wearable computing device to more easily operate the wearable computing device. The example wearable computing devices described herein may include a variety of electronics. Some examples include a power supply and/or a communication device among other types of electronics.

Abstract translation: 一些形式涉及包括诸如接口的“触摸板”的可穿戴计算设备。 在一些形式中，可穿戴式计算设备的示例可以与（或附着）纺织品（即服装）集成。 在其他形式中，可穿戴式计算设备的示例可以直接附接到使用任何示例性可穿戴计算设备的某人的皮肤（即类似于绷带）。 示例性可穿戴计算设备包括柔性触摸板，其可以允许可穿戴计算设备的用户更容易地操作可穿戴式计算设备。 本文所述的示例性可穿戴计算设备可以包括各种电子设备。 一些示例包括电源和/或其他类型的电子设备中的通信设备。