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    Semiconductor device
    1.
    发明授权
    Semiconductor device 失效
    半导体器件

    公开(公告)号：US4758870A

    公开(公告)日：1988-07-19

    申请号：US713636

    申请日：1985-03-19

    申请人： Ichiro Hase ,  Hiroji Kawai ,  Shunji Imanaga ,  Kunio Kaneko

    发明人： Ichiro Hase ,  Hiroji Kawai ,  Shunji Imanaga ,  Kunio Kaneko

    IPC分类号： H01L29/20 ,  H01L29/205 ,  H01L29/68 ,  H01L29/76 ,  H01L29/72

    CPC分类号： H01L29/205 ,  H01L29/7606

    摘要： A III-V semiconductor device is disclosed, which includes an emitter region, an emitter barrier region having such a barrier height as to substantially restrict a thermionic emission current as compared with a tunneling current and such a barrier width as to permit the tunneling current, a base region containing indium and having higher electron affinity than said emitter region and a collector barrier region having such a barrier height as to substantially prohibit a thermally distributed electron from overflowing and such a barrier width as to substantially prohibit the tunneling current.

    摘要翻译： 公开了一种III-V半导体器件，其包括发射极区域，具有这样的势垒高度的发射极阻挡区域，其与隧道电流相比基本上限制热离子发​​射电流，并且具有允许隧穿电流的这种势垒宽度， 包含铟并且具有比所述发射极区域更高的电子亲和力的基极区域和具有这样的势垒高度的集电极势垒区域，以便基本上禁止热分布电子溢出，并且这种势垒宽度基本上禁止隧穿电流。

    Method and apparatus for vapor deposition
    2.
    发明授权
    Method and apparatus for vapor deposition 失效
    气相沉积的方法和装置

    公开(公告)号：US5200021A

    公开(公告)日：1993-04-06

    申请号：US267635

    申请日：1988-10-31

    申请人： Hiroji Kawai ,  Syunji Imanaga ,  Ichiro Hase ,  Kunio Kaneko ,  Naozo Watanabe

    发明人： Hiroji Kawai ,  Syunji Imanaga ,  Ichiro Hase ,  Kunio Kaneko ,  Naozo Watanabe

    IPC分类号： C23C16/52

    CPC分类号： C23C16/52

    摘要： A method for vapor deposition includes monitoring of growth of a semiconductor layer by way of in-situ monitoring. According to the invention, in-situ monitoring is performed by irradiating a light beam onto the surface of the growing layer in a direction nearly perpendicular to the surface. Growth parameters of the layer are detected by monitoring variation of the light reflected by the surface of the layer. A growth condition in a vapor deposition chamber is feedback controlled based on the detected growth parameter.

    摘要翻译： 一种用于气相沉积的方法包括通过原位监测来监测半导体层的生长。 根据本发明，通过在近似垂直于表面的方向上将光束照射到生长层的表面上来进行原位监测。 通过监测由该层的表面反射的光的变化来检测该层的生长参数。 基于检测到的生长参数反馈控制气相沉积室中的生长条件。

    Heterojunction field effect transistor
    3.
    发明授权
    Heterojunction field effect transistor 失效
    异质结场效应晶体管

    公开(公告)号：US6064082A

    公开(公告)日：2000-05-16

    申请号：US86988

    申请日：1998-05-29

    申请人： Hiroji Kawai ,  Shunji Imanaga ,  Toshimasa Kobayashi

    发明人： Hiroji Kawai ,  Shunji Imanaga ,  Toshimasa Kobayashi

    IPC分类号： H01L29/812 ,  H01L21/338 ,  H01L29/20 ,  H01L29/778 ,  H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109 ,  H01L35/26

    CPC分类号： H01L29/7783 ,  H01L29/2003

    摘要： A heterojunction field effect transistor realizing a high performance by a significant decrease. in source resistance while maintaining a sufficiently high gate resistivity to voltage is provided. Sequentially stacked on a c-face sapphire substrate via a buffer layer are an undoped GaN layer, undoped Al.sub.0.3 Ga.sub.07 N layer, undoped GaN channel layer, undoped Al.sub.0.15 Ga.sub.0.85 N spacer layer, n-type Al.sub.0.15 Ga.sub.0.85 N electron supply layer, graded undoped Al.sub.z Ga.sub.1-z N barrier layer and n-type Al.sub.0.06 Ga.sub.0.94 N contact layer, and a gate electrode, source electrode and drain electrode are formed on the n-type Al.sub.0.06 Ga.sub.0.94 N contact layer to form a AlGaN/GaN HEMT. The Al composition z in the graded undoped Al.sub.z Ga.sub.1-z N barrier layer continuously decreases from 0.15 to 0.06, for example, from the n-type Al.sub.0.15 Ga.sub.0.85 N electron supply layer toward the n-type Al.sub.0.06 Ga.sub.0.94 N contact layer. An n.sup.++ -type GaN contact layer may be formed on the n-type Al.sub.0.06 Ga.sub.0.94 N contact layer in the region for the source electrode and the drain electrode, and the source electrode and the drain may be formed on it.

    摘要翻译： 异质结场效应晶体管通过显着降低实现高性能。 提供了源电阻，同时保持足够高的栅极电阻率对电压。 经缓冲层顺序堆叠在c面蓝宝石衬底上的是未掺杂的GaN层，未掺杂的Al0.3Ga07N层，未掺杂的GaN沟道层，未掺杂的Al 0.15 Ga 0.85嵌入层，n型Al 0.15 Ga 0.85纳米电子供体层 渐变未掺杂的AlzGa1-zN势垒层和n型Al0.06Ga0.94N接触层，在n型Al0.06Ga0.94N接触层上形成栅电极，源电极和漏电极，形成AlGaN / GaN HEMT。 渐变非掺杂AlzGa1-zN阻挡层中的Al组分z例如从n型Al 0.15 Ga 0.85 N电子供给层向n型Al0.06Ga0.94N接触层连续地从0.15减少到0.06。 可以在用于源电极和漏电极的区域中的n型Al0.06Ga0.94N接触层上形成n ++型GaN接触层，并且可以在其上形成源电极和漏极。

    Method for manufacturing field effect transistor
    4.
    发明授权
    Method for manufacturing field effect transistor 有权
    场效应晶体管的制造方法

    公开(公告)号：US6140169A

    公开(公告)日：2000-10-31

    申请号：US283696

    申请日：1999-04-01

    申请人： Hiroji Kawai ,  Shunji Imanaga

    发明人： Hiroji Kawai ,  Shunji Imanaga

    IPC分类号： H01L21/28 ,  H01L21/285 ,  H01L21/335 ,  H01L21/336 ,  H01L29/20 ,  H01L29/51 ,  H01L29/778 ,  H01L29/78

    CPC分类号： H01L29/518 ,  H01L21/28194 ,  H01L21/28587 ,  H01L29/66462 ,  H01L29/66522 ,  H01L29/7786 ,  H01L29/78 ,  H01L29/2003

    摘要： A GaN-type field effect transistor exhibits a large input amplitude by using a gate insulating film. A channel layer and a gate insulating film are sequentially laminated on a substrate with a buffer layer therebetween. A gate electrode is formed on the gate insulating film. A source electrode and a drain electrode are disposed at the both sides of the gate electrode and are electrically connected to the channel layer via openings. The channel layer is formed from n-type GaN. The gate insulating film is made from AlN, which exhibits excellent insulation characteristics, thus increasing the Schottky barrier and achieving a large input amplitude. If the FET is operated in the enhancement mode, it is operable in a manner similar to a Si-MOS-type FET, resulting in the formation of an inversion layer.

    摘要翻译： 通过使用栅极绝缘膜，GaN型场效应晶体管呈现大的输入振幅。 沟道层和栅极绝缘膜依次层压在其间具有缓冲层的基板上。 在栅极绝缘膜上形成栅电极。 源电极和漏极设置在栅电极的两侧，并且经由开口电连接到沟道层。 沟道层由n型GaN形成。 栅绝缘膜由AlN制成，其表现出优异的绝缘特性，从而增加肖特基势垒并实现大的输入幅度。 如果FET在增强模式下工作，则其可以以类似于Si-MOS型FET的方式工作，导致反型层的形成。

    Field effect transistor with nitride compound
    5.
    发明授权
    Field effect transistor with nitride compound 失效
    具有氮化物的场效应晶体管

    公开(公告)号：US5929467A

    公开(公告)日：1999-07-27

    申请号：US984635

    申请日：1997-12-03

    申请人： Hiroji Kawai ,  Shunji Imanaga

    发明人： Hiroji Kawai ,  Shunji Imanaga

    IPC分类号： H01L21/28 ,  H01L21/285 ,  H01L21/335 ,  H01L21/336 ,  H01L29/20 ,  H01L29/51 ,  H01L29/778 ,  H01L29/78 ,  H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109

    CPC分类号： H01L29/518 ,  H01L21/28194 ,  H01L21/28587 ,  H01L29/66462 ,  H01L29/66522 ,  H01L29/7786 ,  H01L29/78 ,  H01L29/2003

    摘要： A GaN-type field effect transistor exhibits a large input amplitude by using a gate insulating film. A channel layer and a gate insulating film are sequentially laminated on a substrate with a buffer layer therebetween. A gate electrode is formed on the gate insulating film. A source electrode and a drain electrode are disposed at the both sides of the gate electrode and are electrically connected to the channel layer via openings. The channel layer is formed from n-type GaN. The gate insulating film is made from AlN, which exhibits excellent insulation characteristics, thus increasing the Schottky barrier and achieving a large input amplitude. If the FET is operated in the enhancement mode, it is operable in a manner similar to a Si-MOS-type FET, resulting in the formation of an inversion layer.

    摘要翻译： 通过使用栅极绝缘膜，GaN型场效应晶体管呈现大的输入振幅。 沟道层和栅极绝缘膜依次层压在其间具有缓冲层的基板上。 在栅极绝缘膜上形成栅电极。 源电极和漏极设置在栅电极的两侧，并且经由开口电连接到沟道层。 沟道层由n型GaN形成。 栅绝缘膜由AlN制成，其表现出优异的绝缘特性，从而增加肖特基势垒并实现大的输入幅度。 如果FET在增强模式下工作，则其可以以类似于Si-MOS型FET的方式操作，导致反型层的形成。

    Semiconductor device
    6.
    发明授权
    Semiconductor device 失效
    半导体器件

    公开(公告)号：US5124771A

    公开(公告)日：1992-06-23

    申请号：US647411

    申请日：1991-01-29

    申请人： Kenichi Taira ,  Ichiro Hase ,  Hiroji Kawai

    发明人： Kenichi Taira ,  Ichiro Hase ,  Hiroji Kawai

    IPC分类号： H01L29/68 ,  H01L21/331 ,  H01L21/334 ,  H01L29/205 ,  H01L29/73 ,  H01L29/737 ,  H01L29/76

    CPC分类号： H01L29/66931 ,  H01L29/7606

    摘要： A semiconductor device or a hot electron transistor being constructed such that an InAs base layer is sandwiched between a GaSb emitter barrier layer and a GaInAsSb-system collector barrier layer, which results in preventing hot electrons of unnecessarily high energy from being injected into the collector and an avalanche current from being generated, thereby making it possible to improve the saturation characteristics of the device.

    摘要翻译： 一种半导体器件或热电子晶体管被构造成使得InAs基极层夹在GaSb发射极阻挡层和GaInAsSb系集电极势垒层之间，这导致防止不必要的高能量的热电子被注入到集电极中， 产生雪崩电流，从而可以提高器件的饱和特性。

    Method for growing a nitride compound semiconductor
    10.
    再颁专利
    Method for growing a nitride compound semiconductor 有权
    生长氮化物半导体的方法

    公开(公告)号：USRE38613E1

    公开(公告)日：2004-10-05

    申请号：US10174289

    申请日：2002-09-18

    申请人： Hiroji Kawai ,  Tsunenori Asatsuma ,  Fumihiko Nakamura

    发明人： Hiroji Kawai ,  Tsunenori Asatsuma ,  Fumihiko Nakamura

    IPC分类号： H01L2104

    CPC分类号： H01L33/325 ,  C30B25/02 ,  C30B29/403 ,  C30B29/406 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02579 ,  H01L21/0262

    摘要： A new and improved method for growing a p-type nitride III-V compound semiconductor is provided which can produce a p-type nitride compound semiconductors having a high carrier concentration, without the need for annealing to activate impurities after growth. In a preferred embodiment, a p-type nitride compound semiconductor, such as p-type GaN, is grown by metal organic chemical vapor deposition methods using a nitrogen source material which does not release hydrogen during release of nitrogen and the semiconductor is grown in an inactive gas. The nitrogen source materials may be selected from nitrogen compounds that contain hydrogen radicals groups and alkyl radicals groups and/or phenyl radicals groups provided that the total amount of hydrogen radicals groups is less than or equal to the sum total of alkyl radicals groups and phenyl radicals groups present in the nitrogen compound used as the nitrogen source material.