公开(公告)号：US11251269B2

公开(公告)日：2022-02-15

申请号：US16576396

申请日：2019-09-19

Applicant: Infineon Technologies AG

Inventor： Reinhard Ploss ,  Thomas Aichinger ,  Roland Rupp ,  Hans-Joachim Schulze

IPC: H01L29/10 ,  H01L29/06 ,  H01L29/423 ,  H01L29/16 ,  H01L29/66

Abstract: An embodiment of a semiconductor device includes a trench gate structure extending from a first surface into a silicon carbide semiconductor body along a vertical direction. A body region of a first conductivity type adjoins a sidewall of the trench gate structure and includes a first body sub-region adjoining the sidewall and a second body sub-region adjoining the sidewall. At least one profile of dopants of the first conductivity type along the vertical direction includes a first doping peak in the first body sub-region and a second doping peak in the second body sub-region. A doping concentration of the first doping peak is larger than a doping concentration of the second doping peak.

公开(公告)号：US10340335B2

公开(公告)日：2019-07-02

申请号：US15385137

申请日：2016-12-20

Applicant: Infineon Technologies AG

Inventor： Reinhard Ploss ,  Hans-Joachim Schulze

IPC: H01L21/06 ,  H01L29/06 ,  H01L21/04 ,  H01L21/225 ,  H01L21/265 ,  H01L21/3065 ,  H01L21/324 ,  H01L29/16 ,  H01L21/263 ,  H01L21/3115 ,  H01L29/32 ,  H01L29/167

Abstract: A method of forming a semiconductor device is provided such that a trench is formed in a semiconductor body at a first surface of the semiconductor body. Dopants are introduced into a first region at a bottom side of the trench by ion implantation. A filling material is formed in the trench. Dopants are introduced into a second region at a top side of the filling material. Thermal processing of the semiconductor body is carried out and is configured to intermix dopants from the first and the second regions by a diffusion process along a vertical direction perpendicular to the first surface.

公开(公告)号：US20160099186A1

公开(公告)日：2016-04-07

申请号：US14963855

申请日：2015-12-09

Applicant: Infineon Technologies AG

Inventor： Reinhard Ploss ,  Helmut Oefner ,  Hans-Joachim Schulze

IPC: H01L21/66 ,  H01L21/324 ,  H01L21/265

CPC classification number: H01L22/20 ,  H01L21/261 ,  H01L21/263 ,  H01L21/265 ,  H01L21/26513 ,  H01L21/324 ,  H01L22/12 ,  H01L22/14 ,  H01L29/32 ,  H01L29/36 ,  H01L29/66325 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7397 ,  H01L29/74 ,  H01L29/7813 ,  H01L29/8611 ,  H01L29/872

Abstract: A method for treating a semiconductor wafer having a basic doping is disclosed. The method includes determining a doping concentration of the basic doping, and adapting the basic doping of the semiconductor wafer by postdoping. The postdoping includes at least one of the following methods: a proton implantation and a subsequent thermal process for producing hydrogen induced donors. In this case, at least one of the following parameters is dependent on the determined doping concentration of the basic doping: an implantation dose of the proton implantation, and a temperature of the thermal process.

Abstract translation: 公开了一种用于处理具有基本掺杂的半导体晶片的方法。 该方法包括确定基本掺杂的掺杂浓度，以及通过后掺杂来适应半导体晶片的基本掺杂。 后掺杂包括以下方法中的至少一种：质子注入和随后的用于产生氢诱导供体的热处理。 在这种情况下，以下参数中的至少一个取决于所确定的碱性掺杂的掺杂浓度：质子注入的注入剂量和热处理的温度。

公开(公告)号：US11139369B2

公开(公告)日：2021-10-05

申请号：US16455960

申请日：2019-06-28

Applicant: Infineon Technologies AG

Inventor： Reinhard Ploss ,  Hans-Joachim Schulze

IPC: H01L29/06 ,  H01L21/04 ,  H01L21/225 ,  H01L21/263 ,  H01L21/265 ,  H01L21/3065 ,  H01L21/324 ,  H01L29/16 ,  H01L21/3115 ,  H01L29/32 ,  H01L29/167

Abstract: A method of forming a semiconductor device includes forming a trench in a semiconductor body; at least partially filling the trench with a filling material, the filling material; introducing dopants into a portion of the filling material, where the dopants have a first diffusion coefficient relative to the filling material and have a second diffusion coefficient relative to the semiconductor body, where the first diffusion coefficient is greater than the second diffusion coefficient, and where a ratio of the first diffusion coefficient to the second diffusion coefficient is greater than 10; and applying thermal processing to the semiconductor body configured to spread the dopants in the filling material along a vertical direction between a bottom side and a top side of the filling material by a diffusion process.

公开(公告)号：US10014400B2

公开(公告)日：2018-07-03

申请号：US15650504

申请日：2017-07-14

Applicant: Infineon Technologies AG

Inventor： Helmut Oefner ,  Nico Caspary ,  Mohammad Momeni ,  Reinhard Ploss ,  Francisco Javier Santos Rodriguez ,  Hans-Joachim Schulze

IPC: H01L29/739 ,  H01L21/02 ,  H01L29/66 ,  H01L21/324 ,  H01L21/268 ,  H01L29/10 ,  H01L21/18 ,  H01L21/322 ,  H01L21/28 ,  H01L21/225

CPC classification number: H01L29/7393 ,  H01L21/02002 ,  H01L21/02005 ,  H01L21/02008 ,  H01L21/0201 ,  H01L21/02016 ,  H01L21/187 ,  H01L21/2257 ,  H01L21/268 ,  H01L21/28238 ,  H01L21/3221 ,  H01L21/3225 ,  H01L21/324 ,  H01L21/3242 ,  H01L21/76256 ,  H01L29/1095 ,  H01L29/32 ,  H01L29/66325 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/7813

Abstract: A semiconductor device includes: a semiconductor substrate having a first side, a second side opposite the first side, and a thickness; at least one semiconductor component integrated in the semiconductor substrate; a first metallization at the first side of the semiconductor substrate; and a second metallization at the second side of the semiconductor substrate. The semiconductor substrate has an oxygen concentration along a thickness line of the semiconductor substrate which has a global maximum at a position of 20% to 80% of the thickness relative to the first side. The global maximum is at least 2-times larger than the oxygen concentrations at each of the first side and the second side of the semiconductor substrate.

公开(公告)号：US20150348776A1

公开(公告)日：2015-12-03

申请号：US14824339

申请日：2015-08-12

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim Schulze ,  Alexander Susiti ,  Markus Zundel ,  Reinhard Ploss

IPC: H01L21/02 ,  H01L23/29 ,  H01L23/31 ,  H01L21/3115

CPC classification number: H01L29/7813 ,  H01L21/02123 ,  H01L21/02129 ,  H01L21/02321 ,  H01L21/26506 ,  H01L21/283 ,  H01L21/3115 ,  H01L21/31155 ,  H01L23/291 ,  H01L23/3171 ,  H01L29/06 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/4916 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7397 ,  H01L29/7802 ,  H01L29/7809 ,  H01L29/7811 ,  H01L29/861 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of manufacturing a semiconductor device includes forming a continuous silicate glass structure over a first surface of a semiconductor body, including a first part of the continuous glass structure over an active area of the semiconductor body and a second part of the continuous glass structure over an area of the semiconductor body outside of the active area. A first composition of dopants included in the first part of continuous glass structure differs from a second composition of dopants of the second part of the continuous glass structure.

Abstract translation: 一种制造半导体器件的方法包括在半导体本体的第一表面上形成连续的硅酸盐玻璃结构，该第一表面包括半导体本体的有源区域上的连续玻璃结构的第一部分和连续玻璃结构的第二部分， 半导体主体的有效区域外的区域。 连续玻璃结构的第一部分中包括的掺杂剂的第一组合物不同于连续玻璃结构的第二部分的第二种掺杂剂组合物。

公开(公告)号：US20200098868A1

公开(公告)日：2020-03-26

申请号：US16576396

申请日：2019-09-19

Applicant: Infineon Technologies AG

Inventor： Reinhard Ploss ,  Thomas Aichinger ,  Roland Rupp ,  Hans-Joachim Schulze

IPC: H01L29/10 ,  H01L29/16 ,  H01L29/66 ,  H01L29/06 ,  H01L29/423

Abstract: An embodiment of a semiconductor device includes a trench gate structure extending from a first surface into a silicon carbide semiconductor body along a vertical direction. A body region of a first conductivity type adjoins a sidewall of the trench gate structure and includes a first body sub-region adjoining the sidewall and a second body sub-region adjoining the sidewall. At least one profile of dopants of the first conductivity type along the vertical direction includes a first doping peak in the first body sub-region and a second doping peak in the second body sub-region. A doping concentration of the first doping peak is larger than a doping concentration of the second doping peak.

公开(公告)号：US09728395B2

公开(公告)日：2017-08-08

申请号：US14867839

申请日：2015-09-28

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Helmut Oefner ,  Nico Caspary ,  Mohammad Momeni ,  Reinhard Ploss ,  Francisco Javier Santos Rodriguez ,  Hans-Joachim Schulze

IPC: H01L21/02 ,  H01L21/268 ,  H01L21/324 ,  H01L29/66 ,  H01L21/18 ,  H01L21/225 ,  H01L21/28 ,  H01L21/322

CPC classification number: H01L29/7393 ,  H01L21/02002 ,  H01L21/02005 ,  H01L21/02008 ,  H01L21/0201 ,  H01L21/02016 ,  H01L21/187 ,  H01L21/2257 ,  H01L21/268 ,  H01L21/28238 ,  H01L21/3221 ,  H01L21/3225 ,  H01L21/324 ,  H01L21/3242 ,  H01L21/76256 ,  H01L29/1095 ,  H01L29/32 ,  H01L29/66325 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/7813

Abstract: A method for manufacturing a substrate wafer 100 includes providing a device wafer (110) having a first side (111) and a second side (112); subjecting the device wafer (110) to a first high temperature process for reducing the oxygen content of the device wafer (110) at least in a region (112a) at the second side (112); bonding the second side (112) of the device wafer (110) to a first side (121) of a carrier wafer (120) to form a substrate wafer (100); processing the first side (101) of the substrate wafer (100) to reduce the thickness of the device wafer (110); subjecting the substrate wafer (100) to a second high temperature process for reducing the oxygen content at least of the device wafer (110); and at least partially integrating at least one semiconductor component (140) into the device wafer (110) after the second high temperature process.

公开(公告)号：US20160300920A1

公开(公告)日：2016-10-13

申请号：US15187971

申请日：2016-06-21

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim Schulze ,  Alexander Susiti ,  Markus Zundel ,  Reinhard Ploss

IPC: H01L29/49 ,  H01L21/283 ,  H01L21/265 ,  H01L29/423 ,  H01L29/861

CPC classification number: H01L29/7813 ,  H01L21/02123 ,  H01L21/02129 ,  H01L21/02321 ,  H01L21/26506 ,  H01L21/283 ,  H01L21/3115 ,  H01L21/31155 ,  H01L23/291 ,  H01L23/3171 ,  H01L29/06 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/4916 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7397 ,  H01L29/7802 ,  H01L29/7809 ,  H01L29/7811 ,  H01L29/861 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of manufacturing a semiconductor device includes forming a trench in a semiconductor body at a first surface of the semiconductor body, forming a polysilicon material in the trench, introducing dopants into the polysilicon material by a high dose and low energy process, and performing a thermal treatment configured to drive-in the dopants into the polysilicon material.

Abstract translation: 一种制造半导体器件的方法包括在半导体本体的第一表面处形成半导体本体中的沟槽，在沟槽中形成多晶硅材料，通过高剂量和低能量过程将掺杂剂引入多晶硅材料中，并执行 配置成将掺杂剂驱入多晶硅材料的热处理。

公开(公告)号：US20160104622A1

公开(公告)日：2016-04-14

申请号：US14867839

申请日：2015-09-28

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Helmut Oefner ,  Nico Caspary ,  Mohammad Momeni ,  Reinhard Ploss ,  Francisco Javier Santos Rodriguez ,  Hans-Joachim Schulze

IPC: H01L21/28 ,  H01L21/322

CPC classification number: H01L29/7393 ,  H01L21/02002 ,  H01L21/02005 ,  H01L21/02008 ,  H01L21/0201 ,  H01L21/02016 ,  H01L21/187 ,  H01L21/2257 ,  H01L21/268 ,  H01L21/28238 ,  H01L21/3221 ,  H01L21/3225 ,  H01L21/324 ,  H01L21/3242 ,  H01L21/76256 ,  H01L29/1095 ,  H01L29/32 ,  H01L29/66325 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/7813

Abstract: A method for manufacturing a substrate wafer 100 includes providing a device wafer (110) having a first side (111) and a second side (112); subjecting the device wafer (110) to a first high temperature process for reducing the oxygen content of the device wafer (110) at least in a region (112a) at the second side (112); bonding the second side (112) of the device wafer (110) to a first side (121) of a carrier wafer (120) to form a substrate wafer (100); processing the first side (101) of the substrate wafer (100) to reduce the thickness of the device wafer (110); subjecting the substrate wafer (100) to a second high temperature process for reducing the oxygen content at least of the device wafer (110); and at least partially integrating at least one semiconductor component (140) into the device wafer (110) after the second high temperature process.

Abstract translation: 一种用于制造衬底晶片100的方法包括提供具有第一侧面（111）和第二侧面（112）的器件晶片（110）; 至少在第二侧（112）的区域（112a）中对器件晶片（110）进行第一高温工艺以减少器件晶片（110）的氧含量; 将器件晶片（110）的第二侧（112）接合到载体晶片（120）的第一侧（121）以形成衬底晶片（100）; 处理衬底晶片（100）的第一侧（101）以减小器件晶片（110）的厚度; 对所述衬底晶片（100）进行第二高温处理以至少减少所述器件晶片（110）的氧含量; 以及在所述第二高温处理之后至少部分地将至少一个半导体部件（140）集成到所述器件晶片（110）中。