ZERO-MISALIGNMENT VIA-PAD STRUCTURES
    4.
    发明申请

    公开(公告)号:US20190150291A1

    公开(公告)日:2019-05-16

    申请号:US16230977

    申请日:2018-12-21

    Abstract: A photoresist is deposited on a seed layer on a substrate. A first region of the photoresist is removed to expose a first portion of the seed layer to form a via-pad structure. A first conductive layer is deposited onto the first portion of the seed layer. A second region of the photoresist adjacent to the first region is removed to expose a second portion of the seed layer to form a line. A second conductive layer is deposited onto the first conductive layer and the second portion of the seed layer.

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