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    Semiconductor package with thermal fins
    1.
    发明授权
    Semiconductor package with thermal fins 有权

    公开(公告)号：US10573575B2

    公开(公告)日：2020-02-25

    申请号：US15688662

    申请日：2017-08-28

    Applicant: Intel Corporation

    Inventor： Hyoung Il Kim ,  Florence Pon ,  Yi Xu ,  Yuhong Cai ,  Min-Tih Lai ,  Leo Craft

    IPC: H01L23/34 ,  H01L23/367 ,  H01L23/055 ,  H01L23/14 ,  H01L25/065

    Abstract: Embodiments of the present disclosure provide techniques and configurations for a semiconductor package with thermal fins, in accordance with some embodiments. In embodiments, a package assembly includes a die and a mold compound disposed on the die, to encapsulate the die. The package may further include a thermal solution including one or more thermal fins attached to the mold compound at their respective ends. The thermal fins may be disposed substantially flat on a top surface of the mold compound at a first temperature, and rise away from the top surface of the mold compound in response to a change of temperature to a second temperature, to reach an enclosure that surrounds the package assembly, to provide direct heat conductivity between the die and the enclosure. The second temperature may be greater than the first temperature. Other embodiments may be described and/or claimed.

    Microelectronic device stacks having interior window wirebonding
    2.
    发明授权
    Microelectronic device stacks having interior window wirebonding 有权

    公开(公告)号：US10770429B2

    公开(公告)日：2020-09-08

    申请号：US16096392

    申请日：2016-05-31

    Applicant: INTEL CORPORATION

    Inventor： Min-Tih Lai ,  Cory A. Runyan

    IPC: H01L23/48 ,  H01L25/065 ,  H01L23/00 ,  H01L29/06 ,  H01L25/00

    Abstract: A microelectronic package may be fabricated having a microelectronic die stack attached to a microelectronic substrate, wherein a first microelectronic die within the microelectronic die stack includes an opening or “window” formed therethrough. The first microelectronic die may be in electronic communication with a second microelectronic die within microelectronic die stack and/or in electrical communication with a microelectronic substrate upon which the microelectronic die stack may be attached, wherein the electronic communication may be created with a bond wire which extends through the opening or “window” in the first microelectronic die.

    SEMICONDUCTOR PACKAGE WITH THERMAL FINS
    5.
    发明申请
    SEMICONDUCTOR PACKAGE WITH THERMAL FINS 审中-公开

    公开(公告)号：US20190067156A1

    公开(公告)日：2019-02-28

    申请号：US15688662

    申请日：2017-08-28

    Applicant: Intel Corporation

    Inventor： Hyoung Il Kim ,  Florence Pon ,  Yi Xu ,  Yuhong Cai ,  Min-Tih Lai ,  Leo Craft

    IPC: H01L23/367 ,  H01L23/34 ,  H01L23/055 ,  H01L23/14 ,  H01L25/065

    Abstract: Embodiments of the present disclosure provide techniques and configurations for a semiconductor package with thermal fins, in accordance with some embodiments. In embodiments, a package assembly may comprise a die and a mold compound disposed on the die, to encapsulate the die. The package may further include a thermal solution comprising one or more thermal fins attached to the mold compound at their respective ends. The thermal fins may be disposed substantially flat on a top surface of the mold compound at a first temperature, and rise away from the top surface of the mold compound in response to a change of temperature to a second temperature, to reach an enclosure that surrounds the package assembly, to provide direct heat conductivity between the die and the enclosure. The second temperature may be greater than the first temperature. Other embodiments may be described and/or claimed.

    MICROELECTRONIC DEVICE STACK HAVING A GROUND SHIELDING LAYER
    7.
    发明申请
    MICROELECTRONIC DEVICE STACK HAVING A GROUND SHIELDING LAYER 审中-公开

    公开(公告)号：US20190279954A1

    公开(公告)日：2019-09-12

    申请号：US16346438

    申请日：2016-12-01

    Applicant: Intel Corporation

    Inventor： Min-Tih Lai ,  Florence Pon

    IPC: H01L23/00 ,  H01L23/552 ,  H01L25/065 ,  H01L25/07

    Abstract: A microelectronic device may be formed having at least one microelectronic die attached to a microelectronic substrate, wherein a ground shielding layer is formed over the microelectronic die and the microelectronic substrate. In one embodiment, both the microelectronic substrate and the first microelectronic die may have a signal bond pad and a ground bond pad. A bond wire may be used to form a connection between the microelectronic substrate signal bond pad and the first microelectronic die signal bond pad. A dielectric material layer may be formed on the microelectronic substrate and the first microelectronic die, and an electrically conductive material layer may be formed on the dielectric material layer, wherein the electrically conductive material layer extends through openings in the dielectric material layer to contact the microelectronic substrate ground bond pad and the first microelectronic die ground bond pad.

    SURFACE MOUNTED CONTACT FINGERS
    8.
    发明申请
    SURFACE MOUNTED CONTACT FINGERS 审中-公开

    公开(公告)号：US20190215970A1

    公开(公告)日：2019-07-11

    申请号：US16315292

    申请日：2016-09-25

    Applicant: Intel Corporation

    Inventor： Min-Tih Lai

    IPC: H05K3/40 ,  H05K1/11 ,  H05K3/28

    CPC classification number: H05K3/4015 ,  H05K1/117 ,  H05K3/28 ,  H05K3/284 ,  H05K3/288 ,  H05K2201/1031 ,  H05K2203/1316 ,  H05K2203/1327

    Abstract: Aspects of the embodiments are directed to an edge card assembled using surface mount technology (SMT). The edge card can be assembled by providing a printed circuit board comprising a first set of SMT pads proximate an edge of the printed circuit board to receive metal contact fingers and a second set of SMT pads to receive SMT components; placing a metal contact finger onto each of the first set of SMT pads; placing one or more SMT components onto at least some of the second set of SMT pads; providing a solder paste to the printed circuit board; and heating the printed circuit board to reflow the solder paste to mechanically and electrically connect the SMT components and the metal contact finger to the printed circuit board. The edge card can include a thin printed circuit board substrate.

    Magnetic convection cooling for handheld device
    9.
    发明授权
    Magnetic convection cooling for handheld device 有权

    公开(公告)号：US10122836B2

    公开(公告)日：2018-11-06

    申请号：US15279145

    申请日：2016-09-28

    Applicant: Intel Corporation

    Inventor： Min-Tih Lai

    IPC: H01L23/473 ,  G06F1/20 ,  H05K7/20 ,  H04M1/02 ,  H01L23/36

    Abstract: A handheld device may include a magnetic convection cooling system, which may include a fluid chamber that is in thermal communication with electronic circuitry of the handheld device. The fluid chamber may be closed and may contain a substantially non-gaseous first fluid and a substantially non-gaseous second fluid, wherein first fluid may include a magnetic property different from a magnetic property of second fluid. At least one electromagnet may be selectively activated to move the first and second fluids within the fluid chamber to provide convective cooling of the electronic circuitry.

    Substrates, assembles, and techniques to enable multi-chip flip chip packages
    10.
    发明授权
    Substrates, assembles, and techniques to enable multi-chip flip chip packages 有权

    公开(公告)号：US10748873B2

    公开(公告)日：2020-08-18

    申请号：US15755219

    申请日：2015-09-23

    Applicant: Intel Corporation

    Inventor： Mao Guo ,  Min-Tih Lai ,  Tyler Charles Leuten

    IPC: H01L25/065 ,  H01L23/498 ,  H01L23/538 ,  H01L23/00 ,  H01L23/13 ,  H05K3/46 ,  H01L21/48 ,  H01L25/00 ,  H01L23/31

    Abstract: Substrates, assemblies, and techniques for enabling multi-chip flip chip packages are disclosed herein. For example, in some embodiments, a package substrate may include a first side face; a second side face, wherein the second side face is opposite to the first side face along an axis; a portion of insulating material extending from the first side face to the second side face; wherein a cross-section of the portion of insulating material taken perpendicular to the axis has a stairstep profile. Solder pads may be disposed at base and step surfaces of the portion of insulating material. One or more dies may be coupled to the package substrate (e.g., to form a multi-chip flip chip package), and in some embodiments, additional IC packages may be coupled to the package substrate. In some embodiments, the package substrate may be reciprocally symmetric or approximately reciprocally symmetric.

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