公开(公告)号：US20230299032A1

公开(公告)日：2023-09-21

申请号：US17699209

申请日：2022-03-21

Applicant: Intel Corporation

Inventor： Bernd Waidhas ,  Jan Proschwitz ,  Stefan Reif ,  Vishnu Prasad

IPC: H01L23/00

CPC classification number: H01L24/16 ,  H01L24/13 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L2224/13016 ,  H01L2224/13076 ,  H01L2224/13105 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/1312 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81464 ,  H01L2924/013 ,  H01L2924/014

Abstract: Disclosed herein are microelectronic assemblies, as well as related apparatuses and methods. In some embodiments, a microelectronic assembly may include a die having a first conductive contact on a surface; a substrate having a second conductive contact on a surface; and an interconnect electrically coupling the first conductive contact of the die and the second conductive contact of the substrate, wherein the interconnect includes a portion of a nanowire on the second conductive contact and an intermetallic compound (IMC) surrounding at least a portion of the nanowire on the second conductive contact.

公开(公告)号：US20230307313A1

公开(公告)日：2023-09-28

申请号：US17703400

申请日：2022-03-24

Applicant: Intel Corporation

Inventor： Carlton Hanna ,  Wolfgang Molzer ,  Stefan Reif ,  Georg Seidemann ,  Stephan Stoeckl ,  Pouya Talebbeydokhti

IPC: H01L23/373 ,  H01L23/367

CPC classification number: H01L23/3732 ,  H01L23/367

Abstract: A semiconductor package comprises a package substrate comprised of at least a first layer of dielectric material including a portion of diamond dust material. The diamond dust material is comprised of diamond dust particles. The semiconductor package includes at least one electrical connection coupled through layers of the package substrate.

公开(公告)号：US20230307300A1

公开(公告)日：2023-09-28

申请号：US17705878

申请日：2022-03-28

Applicant: Intel Corporation

Inventor： Jan Proschwitz ,  Stefan Reif ,  Bernd Waidhas ,  Vishnu Prasad

IPC: H01L21/66 ,  H01L23/00 ,  H01L23/58 ,  H01L25/18 ,  H01L23/538

CPC classification number: H01L22/30 ,  H01L23/564 ,  H01L23/585 ,  H01L24/16 ,  H01L25/18 ,  H01L23/5385 ,  H01L2224/16227

Abstract: A semiconductor package comprises a package substrate comprised of comprised of layers of a first material. The semiconductor package includes an integrated circuit (IC) attached to the substrate at a first surface of the IC through a plurality of vias. The semiconductor package includes at least one interface layer comprised of an interface material different from the first material and sealed from exposure to air. The interface material can comprise a moisture-sensitive nonconductive material and can be disposed within the package substrate or between the first surface of the IC and the package substrate, among other locations. Other systems, apparatuses and methods are described.

公开(公告)号：US20230317705A1

公开(公告)日：2023-10-05

申请号：US17707366

申请日：2022-03-29

Applicant: Intel Corporation

Inventor： Carlton Hanna ,  Bernd Waidhas ,  Georg Seidemann ,  Stephan Stoeckl ,  Pouya Talebbeydokhti ,  Stefan Reif ,  Eduardo De Mesa ,  Abdallah Bacha ,  Mohan Prashanth Javare Gowda ,  Lizabeth Keser

IPC: H01L25/18 ,  H01L23/538 ,  H01L25/065 ,  H01L25/10 ,  H01L25/00 ,  H05K1/18

CPC classification number: H01L25/18 ,  H01L23/5384 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H05K1/181 ,  H01L2225/06572 ,  H01L2225/06517 ,  H01L2225/06589 ,  H01L2225/1035 ,  H01L2225/1094 ,  H05K2201/09072 ,  H05K2201/10378 ,  H05K2201/10734

Abstract: An electronic system has a printed circuit board and a substrate. The substrate has two sides, a top and bottom. At least one memory unit is connected to the bottom side of the substrate and at least one processor is connected to the top side of the substrate. The memory is connected to the processor with interconnects that pass through the substrate.

公开(公告)号：US20230317562A1

公开(公告)日：2023-10-05

申请号：US17708968

申请日：2022-03-30

Applicant: Intel Corporation

Inventor： Bernd Waidhas ,  Jan Proschwitz ,  Stefan Reif ,  Vishnu Prasad ,  Georg Seidemann

IPC: H01L23/48 ,  H01L23/00

CPC classification number: H01L23/481 ,  H01L24/06 ,  H01L24/14 ,  H01L24/16 ,  H01L24/03 ,  H01L24/81 ,  H01L2224/06181 ,  H01L2224/14181 ,  H01L2224/16227 ,  H01L2224/06515 ,  H01L2224/02331 ,  H01L2224/02381 ,  H01L2224/0231

Abstract: A die package comprises a semiconductor die comprising a first face, a second face on an opposing second side, an active layer located between the first face and the second face, a first electrical pathway between the first face and the active layer, a second electrical pathway between the second face and the active layer, a first contact pad coupled to the first face and electrically connected to the first electrical pathway, and a second contact pad coupled to the second face and electrically connected to the second electrical pathway. In an example, the first electrical pathway is configured to transmit one or more signals between the first contact pad and the active layer and the second electrical pathway is configured to transmit electrical power between the second contact pad and the active layer.