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公开(公告)号：US09935283B2
公开(公告)日：2018-04-03
申请号：US15235142
申请日：2016-08-12
IPC分类号： H01L51/05 , H01L29/786 , H01L29/16 , H01L29/06 , H01L21/02 , H01L21/283 , H01L29/20 , H01L29/24 , H01L21/04 , H01L51/00 , H01L21/441 , H01L29/66 , H01L29/778 , G01N27/414 , H01L43/08 , H01L49/02 , H01L23/532 , H01L21/768
CPC分类号： H01L51/0541 , G01N27/414 , G01N27/4141 , G01N27/4146 , H01L21/02527 , H01L21/0254 , H01L21/02568 , H01L21/02606 , H01L21/043 , H01L21/283 , H01L21/441 , H01L21/7682 , H01L23/53276 , H01L28/60 , H01L29/0665 , H01L29/0673 , H01L29/1606 , H01L29/2003 , H01L29/24 , H01L29/66045 , H01L29/66969 , H01L29/778 , H01L29/78684 , H01L29/78696 , H01L43/08 , H01L51/0048 , H01L51/0558 , H01L2221/1094
摘要： Embodiments of the invention include a method for fabricating a semiconductor device and the resulting structure. A substrate is provided. A plurality of metal portions are formed on the substrate, wherein the plurality of metal portions are arranged such that areas of the substrate remain exposed. A thin film layer is deposited on the plurality of metal portions and the exposed areas of the substrate. A dielectric layer is deposited, wherein the dielectric layer is in contact with portions of the thin film layer on the plurality of metal portions, and wherein the dielectric layer is not in contact with portions of the thin film layer on the exposed areas of the substrate such that one or more enclosed spaces are present between the thin film layer on the exposed areas of the substrate and the dielectric layer.
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公开(公告)号：US09716221B2
公开(公告)日：2017-07-25
申请号：US14950576
申请日：2015-11-24
CPC分类号： H01L43/02 , G01R33/09 , G01R33/1269 , G01R33/1276 , H01L43/08 , H01L43/12
摘要： Embodiments are directed to a sensor having a first electrode, a second electrode and a detector region electrically coupled between the first electrode region and the second electrode region. The detector region includes a first layer having a topological insulator. The topological insulator includes a conducting path along a surface of the topological insulator, and the detector region further includes a second layer having a first insulating magnetic coupler, wherein a magnetic field applied to the detector region changes a resistance of the conducting path.
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公开(公告)号：US20170148875A1
公开(公告)日：2017-05-25
申请号：US15427500
申请日：2017-02-08
IPC分类号： H01L29/06 , H01L29/16 , H01L43/02 , H01L43/10 , H01L43/08 , H01L43/06 , H01L49/00 , H01L29/24
CPC分类号： H01L43/065 , G01N27/125 , H01L27/22 , H01L29/0649 , H01L29/1029 , H01L29/1606 , H01L29/24 , H01L43/02 , H01L43/04 , H01L43/06 , H01L43/08 , H01L43/10 , H01L43/14 , H01L49/003
摘要： A technique relates to a semiconductor device. First metal contacts are formed on top of a substrate. The first metal contacts are arranged in a first direction, and the first metal contacts are arranged such that areas of the substrate remain exposed. Insulator pads are positioned at predefined locations on top of the first metal contacts, such that the insulator pads are spaced from one another. Second metal contacts are formed on top of the insulator pads, such that the second metal contacts are arranged in a second direction different from the first direction. The first and second metal contacts sandwich the insulator pads at the predefined locations. Surface-sensitive conductive channels are formed to contact the first metal contacts and the second metal contacts. Four-terminal devices are defined by the surface-sensitive conductive channels contacting a pair of the first metal contacts and contacting a pair of the metal contacts.
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公开(公告)号：US09960345B2
公开(公告)日：2018-05-01
申请号：US15427500
申请日：2017-02-08
IPC分类号： H01L43/06 , H01L29/06 , H01L49/00 , H01L29/16 , H01L29/24 , H01L43/10 , H01L43/08 , H01L43/02
CPC分类号： H01L43/065 , G01N27/125 , H01L27/22 , H01L29/0649 , H01L29/1029 , H01L29/1606 , H01L29/24 , H01L43/02 , H01L43/04 , H01L43/06 , H01L43/08 , H01L43/10 , H01L43/14 , H01L49/003
摘要： A technique relates to a semiconductor device. First metal contacts are formed on top of a substrate. The first metal contacts are arranged in a first direction, and the first metal contacts are arranged such that areas of the substrate remain exposed. Insulator pads are positioned at predefined locations on top of the first metal contacts, such that the insulator pads are spaced from one another. Second metal contacts are formed on top of the insulator pads, such that the second metal contacts are arranged in a second direction different from the first direction. The first and second metal contacts sandwich the insulator pads at the predefined locations. Surface-sensitive conductive channels are formed to contact the first metal contacts and the second metal contacts. Four-terminal devices are defined by the surface-sensitive conductive channels contacting a pair of the first metal contacts and contacting a pair of the metal contacts.
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公开(公告)号：US20170271602A1
公开(公告)日：2017-09-21
申请号：US15613364
申请日：2017-06-05
IPC分类号： H01L51/05 , H01L29/06 , H01L21/02 , H01L21/283 , H01L29/20 , H01L29/66 , H01L21/04 , H01L51/00 , H01L21/441 , H01L29/786 , H01L29/24
CPC分类号： H01L51/0541 , G01N27/414 , G01N27/4141 , G01N27/4146 , H01L21/02527 , H01L21/0254 , H01L21/02568 , H01L21/02606 , H01L21/043 , H01L21/283 , H01L21/441 , H01L21/7682 , H01L23/53276 , H01L28/60 , H01L29/0665 , H01L29/0673 , H01L29/1606 , H01L29/2003 , H01L29/24 , H01L29/66045 , H01L29/66969 , H01L29/778 , H01L29/78684 , H01L29/78696 , H01L43/08 , H01L51/0048 , H01L51/0558 , H01L2221/1094
摘要： Embodiments of the invention include a method for fabricating a semiconductor device and the resulting structure. A substrate is provided. A plurality of metal portions are formed on the substrate, wherein the plurality of metal portions are arranged such that areas of the substrate remain exposed. A thin film layer is deposited on the plurality of metal portions and the exposed areas of the substrate. A dielectric layer is deposited, wherein the dielectric layer is in contact with portions of the thin film layer on the plurality of metal portions, and wherein the dielectric layer is not in contact with portions of the thin film layer on the exposed areas of the substrate such that one or more enclosed spaces are present between the thin film layer on the exposed areas of the substrate and the dielectric layer.
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公开(公告)号：US20160172507A1
公开(公告)日：2016-06-16
申请号：US14571771
申请日：2014-12-16
IPC分类号： H01L29/786 , H01L29/06 , H01L21/02 , H01L21/283 , H01L29/66 , H01L29/24 , H01L21/04 , H01L51/05 , H01L51/00 , H01L21/441 , H01L29/16 , H01L29/20
CPC分类号： H01L51/0541 , G01N27/414 , G01N27/4141 , G01N27/4146 , H01L21/02527 , H01L21/0254 , H01L21/02568 , H01L21/02606 , H01L21/043 , H01L21/283 , H01L21/441 , H01L21/7682 , H01L23/53276 , H01L28/60 , H01L29/0665 , H01L29/0673 , H01L29/1606 , H01L29/2003 , H01L29/24 , H01L29/66045 , H01L29/66969 , H01L29/778 , H01L29/78684 , H01L29/78696 , H01L43/08 , H01L51/0048 , H01L51/0558 , H01L2221/1094
摘要： Embodiments of the invention include a method for fabricating a semiconductor device and the resulting structure. A substrate is provided. A plurality of metal portions are formed on the substrate, wherein the plurality of metal portions are arranged such that areas of the substrate remain exposed. A thin film layer is deposited on the plurality of metal portions and the exposed areas of the substrate. A dielectric layer is deposited, wherein the dielectric layer is in contact with portions of the thin film layer on the plurality of metal portions, and wherein the dielectric layer is not in contact with portions of the thin film layer on the exposed areas of the substrate such that one or more enclosed spaces are present between the thin film layer on the exposed areas of the substrate and the dielectric layer.
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公开(公告)号：US10734571B2
公开(公告)日：2020-08-04
申请号：US16026381
申请日：2018-07-03
摘要： Embodiments are directed to a sensor having a first electrode, a second electrode and a detector region electrically coupled between the first electrode region and the second electrode region. The detector region includes a first layer having a topological insulator. The topological insulator includes a conducting path along a surface of the topological insulator, and the detector region further includes a second layer having a first insulating magnetic coupler, wherein a magnetic field applied to the detector region changes a resistance of the conducting path.
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公开(公告)号：US10079355B2
公开(公告)日：2018-09-18
申请号：US15613364
申请日：2017-06-05
IPC分类号： H01L21/441 , H01L51/05 , H01L29/786 , H01L29/16 , H01L29/06 , H01L21/02 , H01L21/283 , H01L29/20 , H01L29/24 , H01L21/04 , H01L51/00 , H01L29/66 , H01L29/778 , G01N27/414 , H01L43/08 , H01L49/02 , H01L23/532 , H01L21/768
CPC分类号： H01L51/0541 , G01N27/414 , G01N27/4141 , G01N27/4146 , H01L21/02527 , H01L21/0254 , H01L21/02568 , H01L21/02606 , H01L21/043 , H01L21/283 , H01L21/441 , H01L21/7682 , H01L23/53276 , H01L28/60 , H01L29/0665 , H01L29/0673 , H01L29/1606 , H01L29/2003 , H01L29/24 , H01L29/66045 , H01L29/66969 , H01L29/778 , H01L29/78684 , H01L29/78696 , H01L43/08 , H01L51/0048 , H01L51/0558 , H01L2221/1094
摘要： Embodiments of the invention include a method for fabricating a semiconductor device and the resulting structure. A substrate is provided. A plurality of metal portions are formed on the substrate, wherein the plurality of metal portions are arranged such that areas of the substrate remain exposed. A thin film layer is deposited on the plurality of metal portions and the exposed areas of the substrate. A dielectric layer is deposited, wherein the dielectric layer is in contact with portions of the thin film layer on the plurality of metal portions, and wherein the dielectric layer is not in contact with portions of the thin film layer on the exposed areas of the substrate such that one or more enclosed spaces are present between the thin film layer on the exposed areas of the substrate and the dielectric layer.
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公开(公告)号：US09728733B2
公开(公告)日：2017-08-08
申请号：US15235161
申请日：2016-08-12
IPC分类号： H01L21/441 , H01L51/05 , H01L29/786 , H01L29/16 , H01L29/06 , H01L21/02 , H01L21/283 , H01L29/20 , H01L29/24 , H01L21/04 , H01L51/00 , H01L29/66 , H01L29/778 , G01N27/414 , H01L43/08 , H01L49/02 , H01L23/532 , H01L21/768
CPC分类号： H01L51/0541 , G01N27/414 , G01N27/4141 , G01N27/4146 , H01L21/02527 , H01L21/0254 , H01L21/02568 , H01L21/02606 , H01L21/043 , H01L21/283 , H01L21/441 , H01L21/7682 , H01L23/53276 , H01L28/60 , H01L29/0665 , H01L29/0673 , H01L29/1606 , H01L29/2003 , H01L29/24 , H01L29/66045 , H01L29/66969 , H01L29/778 , H01L29/78684 , H01L29/78696 , H01L43/08 , H01L51/0048 , H01L51/0558 , H01L2221/1094
摘要： Embodiments of the invention include a method for fabricating a semiconductor device and the resulting structure. A substrate is provided. A plurality of metal portions are formed on the substrate, wherein the plurality of metal portions are arranged such that areas of the substrate remain exposed. A thin film layer is deposited on the plurality of metal portions and the exposed areas of the substrate. A dielectric layer is deposited, wherein the dielectric layer is in contact with portions of the thin film layer on the plurality of metal portions, and wherein the dielectric layer is not in contact with portions of the thin film layer on the exposed areas of the substrate such that one or more enclosed spaces are present between the thin film layer on the exposed areas of the substrate and the dielectric layer.
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10.发明申请INJECTION PILLAR DEFINITION FOR LINE MRAM BY A SELF-ALIGNED SIDEWALL TRANSFER 有权通过自对准的平台转移线MRAM的注射柱定义公开(公告)号：US20160380027A1
公开(公告)日：2016-12-29
申请号：US14920538
申请日：2015-10-22
CPC分类号： H01L27/222 , G11C11/161 , H01L43/02 , H01L43/08 , H01L43/12
摘要： A technique relates to an MRAM system. A conformal film covers trenches formed in an upper material. The upper material covers conductive islands in a substrate. The conformal film is selectively etched to leave sidewalls on the trenches. The sidewalls are etched into vertical columns self-aligned to and directly on top of the conductive islands below. A filling material is deposited and planarized to leave exposed tops of the vertical columns. An MTJ element is formed on top of the filling material and exposed tops of the vertical columns. The MTJ element is patterned into lines corresponding to the vertical columns, and each of the lines has a line MTJ element self-aligned to one of the vertical columns. Line MRAM devices are formed by patterning the MTJ element into the lines. Each of line MRAM devices respectively include the line MTJ element self-aligned to the one of the vertical columns.
摘要翻译： 技术涉及MRAM系统。 保形膜覆盖形成在上部材料中的沟槽。 上部材料覆盖基板中的导电岛。 选择性地蚀刻保形膜以在沟槽上留下侧壁。 侧壁被蚀刻成垂直的柱，其自对准并且直接位于下面的导电岛的顶部。 将填充材料沉积并平坦化以留下垂直柱的暴露顶部。 MTJ元件形成在填充材料的顶部和垂直柱的暴露的顶部。 将MTJ元件图案化成对应于垂直列的线，并且每条线具有与其中一个垂直列自对准的线MTJ元件。 线路MRAM器件通过将MTJ元件图案化成线。 线路MRAM设备中的每一个分别包括与一个垂直列自对准的线MTJ元件。
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