公开(公告)号：US08283766B2

公开(公告)日：2012-10-09

申请号：US12874446

申请日：2010-09-02

申请人： John A. Harada ,  David C. Douglas ,  Robert J. Drost

发明人： John A. Harada ,  David C. Douglas ,  Robert J. Drost

IPC分类号： H01L23/52 ,  H01L23/48 ,  H01L23/495 ,  H01L23/02

CPC分类号： H01L25/0657 ,  G02B6/43 ,  H01L23/544 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L29/0657 ,  H01L2223/54426 ,  H01L2224/0401 ,  H01L2224/05555 ,  H01L2224/10135 ,  H01L2224/10165 ,  H01L2224/131 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/1601 ,  H01L2224/16105 ,  H01L2224/16135 ,  H01L2224/16151 ,  H01L2224/1703 ,  H01L2224/32145 ,  H01L2224/73203 ,  H01L2224/73253 ,  H01L2224/81007 ,  H01L2224/81141 ,  H01L2224/81385 ,  H01L2224/81815 ,  H01L2224/8185 ,  H01L2224/819 ,  H01L2224/8313 ,  H01L2224/83132 ,  H01L2224/83193 ,  H01L2224/8385 ,  H01L2225/06531 ,  H01L2225/06551 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/1015 ,  H01L2924/10155 ,  H01L2924/151

摘要： A ramp-stack chip package is described. This chip package includes a vertical stack of semiconductor dies or chips that are offset from each other in a horizontal direction, thereby defining a terrace with exposed pads. A high-bandwidth ramp component, which is positioned approximately parallel to the terrace, is electrically and mechanically coupled to the exposed pads. For example, the ramp component may be coupled to the semiconductor dies using: solder, microsprings and/or an anisotropic conducting film. Furthermore, each of the semiconductor dies includes a static bend so that an end segment of each of the semiconductor dies is parallel to the direction and is mechanically coupled to the ramp component. These end segments may facilitate high-bandwidth communication of signals between the chips and the ramp component, for example, via proximity communication.

摘要翻译： 描述了斜坡堆叠芯片封装。 该芯片封装包括在水平方向彼此偏移的半导体管芯或芯片的垂直堆叠，从而限定具有暴露焊盘的露台。 位于大致平行于平台的高带宽斜坡部件被电气和机械耦合到暴露的焊盘。 例如，斜坡部件可以使用：焊料，微弹簧和/或各向异性导电膜耦合到半导体管芯。 此外，每个半导体管芯包括静态弯曲部，使得每个半导体管芯的端部段平行于该方向，并机械耦合到斜坡部件。 这些端段可以促进芯片和斜坡部件之间的信号的高带宽通信，例如通过接近通信。

公开(公告)号：US08373280B2

公开(公告)日：2013-02-12

申请号：US12873945

申请日：2010-09-01

申请人： John A. Harada ,  Robert J. Drost ,  David C. Douglas

发明人： John A. Harada ,  Robert J. Drost ,  David C. Douglas

IPC分类号： H01L23/498 ,  H01L21/50

CPC分类号： H01L25/0657 ,  H01L23/42 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L25/50 ,  H01L2223/54426 ,  H01L2224/0401 ,  H01L2224/06155 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16265 ,  H01L2224/2919 ,  H01L2224/29193 ,  H01L2224/32145 ,  H01L2224/73203 ,  H01L2224/73253 ,  H01L2224/81815 ,  H01L2224/92143 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06551 ,  H01L2225/06562 ,  H01L2225/06572 ,  H01L2225/06589 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19102

摘要： An assembly component and a technique for assembling a chip package using the assembly component are described. This chip package includes a set of semiconductor dies that are arranged in a stack in a vertical direction, which are offset from each other in a horizontal direction to define a stepped terraced at one side of the vertical stack. Moreover, the chip package may be assembled using the assembly component. In particular, the assembly component may include a housing having another stepped terrace. This other stepped terrace may include a sequence of steps in the vertical direction, which are offset from each other in the horizontal direction. Furthermore, the housing may be configured to mate with the set of semiconductor dies such that the set of semiconductor dies are arranged in the stack in the vertical direction. For example, the other stepped terrace may approximately be a mirror image of the stepped terrace.

摘要翻译： 描述了使用组装部件组装芯片封装的组装部件和技术。 该芯片封装包括沿垂直方向布置成堆叠的一组半导体管芯，它们在水平方向上彼此偏移，以限定在垂直堆叠的一侧上阶梯状梯度。 此外，可以使用组件部件组装芯片封装。 特别地，组件部件可以包括具有另一阶梯式台阶的壳体。 该另外的阶梯式平台可以包括在水平方向上彼此偏移的垂直方向的一系列步骤。 此外，壳体可以被配置为与该组半导体管芯配合，使得该组半导体管芯沿着垂直方向布置在堆叠中。 例如，其他阶梯式露台大概可以是阶梯式露台的镜像。

公开(公告)号：US08290319B2

公开(公告)日：2012-10-16

申请号：US12868577

申请日：2010-08-25

申请人： John A. Harada ,  David C. Douglas ,  Robert J. Drost

发明人： John A. Harada ,  David C. Douglas ,  Robert J. Drost

IPC分类号： G02B6/43

CPC分类号： H01L25/0657 ,  G02B6/43 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L25/0652 ,  H01L2223/54426 ,  H01L2223/54433 ,  H01L2223/6627 ,  H01L2224/131 ,  H01L2224/14155 ,  H01L2224/16105 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16265 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/73203 ,  H01L2224/73253 ,  H01L2225/06517 ,  H01L2225/06551 ,  H01L2225/06562 ,  H01L2924/1903 ,  H01L2924/19104 ,  H01L2924/00012 ,  H01L2924/0665 ,  H01L2924/014

摘要： A ramp-stack chip package is described. This chip package includes a vertical stack of semiconductor dies or chips that are offset from each other in a horizontal direction, thereby defining a stepped terrace. A high-bandwidth ramp component, which is positioned approximately parallel to the stepped terrace, is mechanically coupled to the semiconductor dies. Furthermore, the ramp component includes an optical waveguide that conveys the optical signal, and an optical coupling component that optically couples the optical signal to one of the semiconductor dies, thereby facilitating high-bandwidth communication of the optical signal between the semiconductor die and the ramp component.

摘要翻译： 描述了斜坡堆叠芯片封装。 该芯片封装包括在水平方向上彼此偏移的半导体管芯或芯片的垂直堆叠，从而限定阶梯式台阶。 位于大致平行于阶梯式台阶的高带宽斜坡部件机械耦合到半导体管芯。 此外，斜坡部件包括传送光信号的光波导和光耦合部件，其将光信号光耦合到半导体管芯之一，从而有助于半导体管芯和斜坡之间的光信号的高带宽通信 零件。

公开(公告)号：US20120049376A1

公开(公告)日：2012-03-01

申请号：US12873945

申请日：2010-09-01

申请人： John A. Harada ,  Robert J. Drost ,  David C. Douglas

发明人： John A. Harada ,  Robert J. Drost ,  David C. Douglas

IPC分类号： H01L23/498 ,  H01L21/50

CPC分类号： H01L25/0657 ,  H01L23/42 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L25/50 ,  H01L2223/54426 ,  H01L2224/0401 ,  H01L2224/06155 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16265 ,  H01L2224/2919 ,  H01L2224/29193 ,  H01L2224/32145 ,  H01L2224/73203 ,  H01L2224/73253 ,  H01L2224/81815 ,  H01L2224/92143 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06551 ,  H01L2225/06562 ,  H01L2225/06572 ,  H01L2225/06589 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19102

摘要： An assembly component and a technique for assembling a chip package using the assembly component are described. This chip package includes a set of semiconductor dies that are arranged in a stack in a vertical direction, which are offset from each other in a horizontal direction to define a stepped terraced at one side of the vertical stack. Moreover, the chip package may be assembled using the assembly component. In particular, the assembly component may include a housing having another stepped terrace. This other stepped terrace may include a sequence of steps in the vertical direction, which are offset from each other in the horizontal direction. Furthermore, the housing may be configured to mate with the set of semiconductor dies such that the set of semiconductor dies are arranged in the stack in the vertical direction. For example, the other stepped terrace may approximately be a mirror image of the stepped terrace.

摘要翻译： 描述了使用组装部件组装芯片封装的组装部件和技术。 该芯片封装包括沿垂直方向布置成堆叠的一组半导体管芯，它们在水平方向上彼此偏移，以限定在垂直堆叠的一侧上阶梯状梯度。 此外，可以使用组件部件组装芯片封装。 特别地，组件部件可以包括具有另一阶梯式台阶的壳体。 该另外的阶梯式平台可以包括在水平方向上彼此偏移的垂直方向的一系列步骤。 此外，壳体可以被配置为与该组半导体管芯配合，使得该组半导体管芯沿着垂直方向布置在堆叠中。 例如，其他阶梯式露台大概可以是阶梯式露台的镜像。

公开(公告)号：US20120056327A1

公开(公告)日：2012-03-08

申请号：US12874446

申请日：2010-09-02

申请人： John A. Harada ,  David C. Douglas ,  Robert J. Drost

发明人： John A. Harada ,  David C. Douglas ,  Robert J. Drost

IPC分类号： H01L23/52

CPC分类号： H01L25/0657 ,  G02B6/43 ,  H01L23/544 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L29/0657 ,  H01L2223/54426 ,  H01L2224/0401 ,  H01L2224/05555 ,  H01L2224/10135 ,  H01L2224/10165 ,  H01L2224/131 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/1601 ,  H01L2224/16105 ,  H01L2224/16135 ,  H01L2224/16151 ,  H01L2224/1703 ,  H01L2224/32145 ,  H01L2224/73203 ,  H01L2224/73253 ,  H01L2224/81007 ,  H01L2224/81141 ,  H01L2224/81385 ,  H01L2224/81815 ,  H01L2224/8185 ,  H01L2224/819 ,  H01L2224/8313 ,  H01L2224/83132 ,  H01L2224/83193 ,  H01L2224/8385 ,  H01L2225/06531 ,  H01L2225/06551 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/1015 ,  H01L2924/10155 ,  H01L2924/151

摘要： A ramp-stack chip package is described. This chip package includes a vertical stack of semiconductor dies or chips that are offset from each other in a horizontal direction, thereby defining a terrace with exposed pads. A high-bandwidth ramp component, which is positioned approximately parallel to the terrace, is electrically and mechanically coupled to the exposed pads. For example, the ramp component may be coupled to the semiconductor dies using: solder, microsprings and/or an anisotropic conducting film. Furthermore, each of the semiconductor dies includes a static bend so that an end segment of each of the semiconductor dies is parallel to the direction and is mechanically coupled to the ramp component. These end segments may facilitate high-bandwidth communication of signals between the chips and the ramp component, for example, via proximity communication.

摘要翻译： 描述了斜坡堆叠芯片封装。 该芯片封装包括在水平方向彼此偏移的半导体管芯或芯片的垂直堆叠，从而限定具有暴露焊盘的露台。 位于大致平行于平台的高带宽斜坡部件被电气和机械耦合到暴露的焊盘。 例如，斜坡部件可以使用：焊料，微弹簧和/或各向异性导电膜耦合到半导体管芯。 此外，每个半导体管芯包括静态弯曲部，使得每个半导体管芯的端部段平行于该方向，并机械耦合到斜坡部件。 这些端段可以促进芯片和斜坡部件之间的信号的高带宽通信，例如通过接近通信。

公开(公告)号：US20120051695A1

公开(公告)日：2012-03-01

申请号：US12868577

申请日：2010-08-25

申请人： John A. Harada ,  David C. Douglas ,  Robert J. Drost

发明人： John A. Harada ,  David C. Douglas ,  Robert J. Drost

IPC分类号： G02B6/26

CPC分类号： H01L25/0657 ,  G02B6/43 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L25/0652 ,  H01L2223/54426 ,  H01L2223/54433 ,  H01L2223/6627 ,  H01L2224/131 ,  H01L2224/14155 ,  H01L2224/16105 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16265 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/73203 ,  H01L2224/73253 ,  H01L2225/06517 ,  H01L2225/06551 ,  H01L2225/06562 ,  H01L2924/1903 ,  H01L2924/19104 ,  H01L2924/00012 ,  H01L2924/0665 ,  H01L2924/014

摘要： A ramp-stack chip package is described. This chip package includes a vertical stack of semiconductor dies or chips that are offset from each other in a horizontal direction, thereby defining a stepped terrace. A high-bandwidth ramp component, which is positioned approximately parallel to the stepped terrace, is mechanically coupled to the semiconductor dies. Furthermore, the ramp component includes an optical waveguide that conveys the optical signal, and an optical coupling component that optically couples the optical signal to one of the semiconductor dies, thereby facilitating high-bandwidth communication of the optical signal between the semiconductor die and the ramp component.

摘要翻译： 描述了斜坡堆叠芯片封装。 该芯片封装包括在水平方向上彼此偏移的半导体管芯或芯片的垂直堆叠，从而限定阶梯式台阶。 位于大致平行于阶梯式台阶的高带宽斜坡部件机械耦合到半导体管芯。 此外，斜坡部件包括传送光信号的光波导和光耦合部件，其将光信号光耦合到半导体管芯之一，从而有助于半导体管芯和斜坡之间的光信号的高带宽通信 零件。

公开(公告)号：US20120211878A1

公开(公告)日：2012-08-23

申请号：US13029825

申请日：2011-02-17

申请人： Darko R. Popovic ,  Matthew D. Giere ,  Bruce M. Guenin ,  Theresa Y. Sze ,  Ivan Shubin ,  John A. Harada ,  David C. Douglas ,  Jing Shi

发明人： Darko R. Popovic ,  Matthew D. Giere ,  Bruce M. Guenin ,  Theresa Y. Sze ,  Ivan Shubin ,  John A. Harada ,  David C. Douglas ,  Jing Shi

IPC分类号： H01L25/07 ,  H01L21/60

CPC分类号： H01L24/05 ,  H01L23/5385 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/0554 ,  H01L2224/05554 ,  H01L2224/1134 ,  H01L2224/13005 ,  H01L2224/13011 ,  H01L2224/1302 ,  H01L2224/13027 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/1329 ,  H01L2224/13311 ,  H01L2224/13339 ,  H01L2224/13347 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/14151 ,  H01L2224/14155 ,  H01L2224/14515 ,  H01L2224/16105 ,  H01L2224/16157 ,  H01L2224/17181 ,  H01L2224/20 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/33181 ,  H01L2224/4813 ,  H01L2224/48159 ,  H01L2224/484 ,  H01L2224/4846 ,  H01L2224/48463 ,  H01L2224/48477 ,  H01L2224/50 ,  H01L2224/73103 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/75704 ,  H01L2224/81139 ,  H01L2224/81947 ,  H01L2225/06589 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/00012

摘要： In a chip package, semiconductor dies in a vertical stack of semiconductor dies or chips (which is referred to as a ‘plank stack’) are separated by a mechanical spacer (such as a filler material or an adhesive). Moreover, the chip package includes a substrate at a right angle to the plank stack, which is electrically coupled to the semiconductor dies along an edge of the plank stack. In particular, electrical pads proximate to a surface of the substrate (which are along a stacking direction of the plank stack) are electrically coupled to pads that are proximate to edges of the semiconductor dies by an intervening conductive material, such as: solder, stud bumps, plated traces, wire bonds, spring connectors, a conductive adhesive and/or an anisotropic conducting film. Note that the chip package may facilitate high-bandwidth communication of signals between the semiconductor dies and the substrate.

摘要翻译： 在芯片封装中，半导体管芯或芯片（被称为“板堆叠”）的垂直堆叠中的半导体管芯由机械间隔件（例如填充材料或粘合剂）分开。 此外，芯片封装包括与板堆叠成直角的衬底，其与板堆叠的边缘电耦合到半导体管芯。 特别地，靠近基板表面（沿着板堆叠的堆叠方向）的电焊盘通过中间导电材料电耦合到靠近半导体管芯边缘的焊盘，例如：焊料，螺柱 凸块，电镀痕迹，线接合，弹簧连接器，导电粘合剂和/或各向异性导电膜。 注意，芯片封装可以促进半导体管芯和衬底之间的信号的高带宽通信。

公开(公告)号：US08390109B2

公开(公告)日：2013-03-05

申请号：US13029825

申请日：2011-02-17

申请人： Darko R. Popovic ,  Matthew D. Giere ,  Bruce M. Guenin ,  Theresa Y. Sze ,  Ivan Shubin ,  John A. Harada ,  David C. Douglas ,  Jing Shi

发明人： Darko R. Popovic ,  Matthew D. Giere ,  Bruce M. Guenin ,  Theresa Y. Sze ,  Ivan Shubin ,  John A. Harada ,  David C. Douglas ,  Jing Shi

IPC分类号： H01L25/07 ,  H01L21/60

CPC分类号： H01L24/05 ,  H01L23/5385 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/0554 ,  H01L2224/05554 ,  H01L2224/1134 ,  H01L2224/13005 ,  H01L2224/13011 ,  H01L2224/1302 ,  H01L2224/13027 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/1329 ,  H01L2224/13311 ,  H01L2224/13339 ,  H01L2224/13347 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/14151 ,  H01L2224/14155 ,  H01L2224/14515 ,  H01L2224/16105 ,  H01L2224/16157 ,  H01L2224/17181 ,  H01L2224/20 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/33181 ,  H01L2224/4813 ,  H01L2224/48159 ,  H01L2224/484 ,  H01L2224/4846 ,  H01L2224/48463 ,  H01L2224/48477 ,  H01L2224/50 ,  H01L2224/73103 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/75704 ,  H01L2224/81139 ,  H01L2224/81947 ,  H01L2225/06589 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/00012

摘要： In a chip package, semiconductor dies in a vertical stack of semiconductor dies or chips (which is referred to as a ‘plank stack’) are separated by a mechanical spacer (such as a filler material or an adhesive). Moreover, the chip package includes a substrate at a right angle to the plank stack, which is electrically coupled to the semiconductor dies along an edge of the plank stack. In particular, electrical pads proximate to a surface of the substrate (which are along a stacking direction of the plank stack) are electrically coupled to pads that are proximate to edges of the semiconductor dies by an intervening conductive material, such as: solder, stud bumps, plated traces, wire bonds, spring connectors, a conductive adhesive and/or an anisotropic conducting film. Note that the chip package may facilitate high-bandwidth communication of signals between the semiconductor dies and the substrate.

摘要翻译： 在芯片封装中，半导体管芯或芯片（被称为板堆叠）的垂直堆叠中的半导体管芯由机械间隔件（例如填充材料或粘合剂）分开。 此外，芯片封装包括与板堆叠成直角的衬底，其与板堆叠的边缘电耦合到半导体管芯。 特别地，靠近基板表面（沿着板堆叠的堆叠方向）的电焊盘通过中间导电材料电耦合到靠近半导体管芯边缘的焊盘，例如：焊料，螺柱 凸块，电镀痕迹，线接合，弹簧连接器，导电粘合剂和/或各向异性导电膜。 注意，芯片封装可以促进半导体管芯和衬底之间的信号的高带宽通信。

公开(公告)号：US06860028B2

公开(公告)日：2005-03-01

申请号：US10427497

申请日：2003-04-30

申请人： Glenn P. Charest ,  William L. Grouell ,  John A. Harada

发明人： Glenn P. Charest ,  William L. Grouell ,  John A. Harada

IPC分类号： G01B3/00 ,  G01D21/00 ,  G02B6/36 ,  H01R13/631 ,  H05K7/14

CPC分类号： H05K7/1454 ,  H01R12/7005 ,  H01R13/6315

摘要： An alignment device includes a crossbar and two brackets. Each one of the two brackets includes at least one guide hole, with each guide hole having a front opening. The crossbar couples the two brackets and defines a connector opening. The alignment device also includes two connector alignment posts. Each one of the two connector alignment posts has a first end coupled to the crossbar and an opposing end protruding into the connector opening. A method of connecting a circuit card to a mid plane and a computer including the alignment device also are described.

摘要翻译： 对准装置包括横杆和两个支架。 两个托架中的每一个包括至少一个引导孔，每个引导孔具有前开口。 横杆将两个支架联接并限定一个连接器开口。 对准装置还包括两个连接器对准柱。 两个连接器对准柱中的每一个具有联接到横杆的第一端和突出到连接器开口中的相对端。 还描述了将电路卡连接到中间平面的方法和包括对准装置的计算机。

公开(公告)号：US5751549A

公开(公告)日：1998-05-12

申请号：US670976

申请日：1996-06-26

申请人： Anthony N. Eberhardt ,  William L. Dailey ,  John A. Harada

发明人： Anthony N. Eberhardt ,  William L. Dailey ,  John A. Harada

IPC分类号： F04D29/58 ,  G06F1/20 ,  H05K7/20

CPC分类号： H05K7/20718 ,  G06F1/20

摘要： An electrical assembly that allows a plurality of electronic assemblies to be cooled by a number of fans. The assembly includes a housing which has a plenum chamber that is located between a rack chamber and a fan chamber. The rack chamber is separated from the plenum chamber by a backbone wall. The fan chamber is separated from the plenum chamber by a fan wall that is perpendicular to the backbone wall. The rack chamber contains a plurality of electronic assemblies such as hard disk drives. The fan chamber contains a plurality of individual fans. The fans induce an air flow from the rack chamber to the fan chamber through the plenum chamber. The plenum chamber provides a uniform pressure that induces an equal flow rate across each disk drive in the rack chamber. The fans are controlled by a control circuit which can detect the failure of one fan and increase the speed of the remaining fans to maintain the plenum chamber pressure. The constant plenum chamber pressure insures an equal flowrate across each disk drive even when one of the fans fails.

摘要翻译： 允许多个电子组件被多个风扇冷却的电气组件。 组件包括具有位于齿条腔室和风扇室之间的增压室的壳体。 机架室通过主干壁与增压室分离。 风扇室通过垂直于主干壁的风扇壁与增压室分离。 机架室包含多个电子组件，例如硬盘驱动器。 风扇室包含多个独立的风扇。 风扇通过增压室引起从架室到风扇室的空气流。 增压室提供均匀的压力，其在机架室中的每个磁盘驱动器上引起相等的流量。 风扇由控制电路控制，该控制电路可以检测一个风扇的故障，并增加剩余风扇的速度以保持增压室的压力。 即使其中一个风扇出现故障，恒定的室室压力也可确保每个磁盘驱动器的流量相等。