公开(公告)号：US06967353B2

公开(公告)日：2005-11-22

申请号：US10341706

申请日：2003-01-14

申请人： Jun Suzuki ,  Hiroyuki Okuyama ,  Goshi Biwa ,  Etsuo Morita

发明人： Jun Suzuki ,  Hiroyuki Okuyama ,  Goshi Biwa ,  Etsuo Morita

IPC分类号： H01L33/06 ,  H01L33/16 ,  H01L33/24 ,  H01L33/28 ,  H01L33/32 ,  H01L33/38 ,  H01L29/22 ,  H01L29/18 ,  H01L29/24 ,  H01L33/00

CPC分类号： H01L33/24 ,  H01L33/18

摘要： A semiconductor light emitting device includes a crystal layer formed on a substrate, the crystal layer having a tilt crystal plane tilted from the principal plane of the substrate, and a first conductive type layer, an active layer, and a second conductive type layer, which are formed on the crystal layer in such a manner as to extend within planes parallel to the tilt crystal plane, wherein the device has a shape formed by removing the apex and its vicinity of the stacked layer structure formed on the substrate. Such a semiconductor light emitting device is excellent in luminous efficiency even if the device has a three-dimensional device structure. The present invention also provides a method of fabricating the above semiconductor light emitting device.

摘要翻译： 半导体发光器件包括形成在衬底上的晶体层，所述晶体层具有从衬底的主平面倾斜的倾斜晶体面，以及第一导电类型层，有源层和第二导电型层， 以平行于倾斜晶面的平面内延伸的方式形成在晶体层上，其中，该器件具有通过去除形成在基板上的堆叠层结构的顶点及其附近而形成的形状。 这种半导体发光器件即使器件具有三维器件结构，发光效率也优异。 本发明还提供一种制造上述半导体发光器件的方法。

公开(公告)号：US20080050599A1

公开(公告)日：2008-02-28

申请号：US11976246

申请日：2007-10-23

申请人： Etsuo Morita ,  Yousuke Murakami ,  Goshi Biwa ,  Hiroyuki Okuyama ,  Masato Doi ,  Toyoharu Oohata

发明人： Etsuo Morita ,  Yousuke Murakami ,  Goshi Biwa ,  Hiroyuki Okuyama ,  Masato Doi ,  Toyoharu Oohata

IPC分类号： B32B9/04

CPC分类号： H01L21/02538 ,  C30B25/02 ,  C30B25/183 ,  C30B29/403 ,  C30B29/406 ,  H01L21/0237 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/0265

摘要： A crystal foundation having dislocations is used to obtain a crystal film of low dislocation density, a crystal substrate, and a semiconductor device. One side of a growth substrate (11) is provided with a crystal layer (13) with a buffer layer (12) in between. The crystal layer (13) has spaces (13a), (13b) in an end of each threading dislocation D1 elongating from below. The threading dislocation D1 is separated from the upper layer by the spaces (13a), (13b), so that each threading dislocation D1 is blocked from propagating to the upper layer. When the displacement of the threading dislocation D1 expressed by Burgers vector is preserved to develop another dislocation, the spaces (13a), (13b) vary the direction of its displacement. As a result, the upper layer above the spaces (13a), (13b) turns crystalline with a low dislocation density.

公开(公告)号：US08741451B2

公开(公告)日：2014-06-03

申请号：US11976246

申请日：2007-10-23

申请人： Etsuo Morita ,  Yousuke Murakami ,  Goshi Biwa ,  Hiroyuki Okuyama ,  Masato Doi ,  Toyoharu Oohata

发明人： Etsuo Morita ,  Yousuke Murakami ,  Goshi Biwa ,  Hiroyuki Okuyama ,  Masato Doi ,  Toyoharu Oohata

IPC分类号： B32B9/00 ,  B32B19/00

CPC分类号： H01L21/02538 ,  C30B25/02 ,  C30B25/183 ,  C30B29/403 ,  C30B29/406 ,  H01L21/0237 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/0265

摘要： A crystal foundation having dislocations is used to obtain a crystal film of low dislocation density, a crystal substrate, and a semiconductor device. One side of a growth substrate (11) is provided with a crystal layer (13) with a buffer layer (12) in between. The crystal layer (13) has spaces (13a), (13b) in an end of each threading dislocation D1 elongating from below. The threading dislocation D1 is separated from the upper layer by the spaces (13a), (13b), so that each threading dislocation D1 is blocked from propagating to the upper layer. When the displacement of the threading dislocation D1 expressed by Burgers vector is preserved to develop another dislocation, the spaces (13a), (13b) vary the direction of its displacement. As a result, the upper layer above the spaces (13a), (13b) turns crystalline with a low dislocation density.

摘要翻译： 使用具有位错的晶体基底来获得位错密度低的晶体膜，晶体基板和半导体器件。 生长衬底（11）的一侧设置有在其间具有缓冲层（12）的晶体层（13）。 在从下方延伸的每个穿透位错D1的端部中，晶体层（13）具有空间（13a），（13b）。 穿透位错D1通过空间（13a），（13b）与上层分开，使得每个穿透位错D1被阻止传播到上层。 当由汉堡矢量表示的穿透位错D1的位移被保留以产生另一个位错时，空间（13a），（13b）改变其位移的方向。 结果，空间（13a），（13b）上方的上层以低位错密度变成结晶。

公开(公告)号：US20070125996A1

公开(公告)日：2007-06-07

申请号：US11699999

申请日：2007-01-31

申请人： Etsuo Morita ,  Yousuke Murakami ,  Goshi Biwa ,  Hiroyuki Okuyama ,  Masato Doi ,  Toyoharu Oohata

发明人： Etsuo Morita ,  Yousuke Murakami ,  Goshi Biwa ,  Hiroyuki Okuyama ,  Masato Doi ,  Toyoharu Oohata

IPC分类号： H01L29/06 ,  H01L33/00 ,  H01L31/00 ,  H01L29/739

CPC分类号： H01L21/02538 ,  C30B25/02 ,  C30B25/183 ,  C30B29/403 ,  C30B29/406 ,  H01L21/0237 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/0265

摘要： A crystal foundation having dislocations is used to obtain a crystal film of low dislocation density, a crystal substrate, and a semiconductor device. One side of a growth substrate (11) is provided with a crystal layer (13) with a buffer layer (12) in between. The crystal layer (13) has spaces (13a), (13b) in an end of each threading dislocation D1 elongating from below. The threading dislocation D1 is separated from the upper layer by the spaces (13a), (13b), so that each threading dislocation D1 is blocked from propagating to the upper layer. When the displacement of the threading dislocation D1 expressed by Burgers vector is preserved to develop another dislocation, the spaces (13a), (13b) vary the direction of its displacement. As a result, the upper layer above the spaces (13a), (13b) turns crystalline with a low dislocation density.

摘要翻译： 使用具有位错的晶体基底来获得位错密度低的晶体膜，晶体基板和半导体器件。 生长衬底（11）的一侧设置有在其间具有缓冲层（12）的晶体层（13）。 晶体层（13）在从下方延伸的每个穿透位错D 1 1的末端具有间隔（13a），（13b）。 穿透位错D 1＆lt; 1＆gt;通过空间（13a），（13b）从上层分离，使得每个穿透位错D 1 1被阻止传播到 上层。 当由汉堡矢量表示的穿透位错D 1 1的位移被保留以产生另一位错时，空间（13a），（13b）改变其位移的方向。 结果，空间（13a），（13b）上方的上层以低位错密度变为结晶。

公开(公告)号：US07364805B2

公开(公告)日：2008-04-29

申请号：US10466607

申请日：2002-01-18

申请人： Etsuo Morita ,  Yousuke Murakami ,  Goshi Biwa ,  Hiroyuki Okuyama ,  Masato Doi ,  Toyoharu Oohata

发明人： Etsuo Morita ,  Yousuke Murakami ,  Goshi Biwa ,  Hiroyuki Okuyama ,  Masato Doi ,  Toyoharu Oohata

IPC分类号： B32B9/00 ,  B63H1/26 ,  H01L21/31

CPC分类号： H01L21/02538 ,  C30B25/02 ,  C30B25/183 ,  C30B29/403 ,  C30B29/406 ,  H01L21/0237 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/0265

摘要： A crystal foundation having dislocations is used to obtain a crystal film of low dislocation density, a crystal substrate, and a semiconductor device. One side of a growth substrate (11) is provided with a crystal layer (13) with a buffer layer (12) in between. The crystal layer (13) has spaces (13a), (13b) in an end of each threading dislocation D1 elongating from below. The threading dislocation D1 is separated from the upper layer by the spaces (13a), (13b), so that each threading dislocation D1 is blocked from propagating to the upper layer. When the displacement of the threading dislocation D1 expressed by Burgers vector is preserved to develop another dislocation, the spaces (13a), (13b) vary the direction of its displacement. As a result, the upper layer above the spaces (13a), (13b) turns crystalline with a low dislocation density.

摘要翻译： 使用具有位错的晶体基底来获得位错密度低的晶体膜，晶体基板和半导体器件。 生长衬底（11）的一侧设置有在其间具有缓冲层（12）的晶体层（13）。 晶体层（13）在从下方延伸的每个穿透位错D 1 1的末端具有间隔（13a），（13b）。 穿透位错D 1＆lt; 1＆gt;通过空间（13a），（13b）从上层分离，使得每个穿透位错D 1 1被阻止传播到 上层。 当由汉堡矢量表示的穿透位错D 1 1的位移被保留以产生另一位错时，空间（13a），（13b）改变其位移的方向。 结果，空间（13a），（13b）上方的上层以低位错密度变为结晶。

公开(公告)号：US07727331B2

公开(公告)日：2010-06-01

申请号：US11699999

申请日：2007-01-31

申请人： Etsuo Morita ,  Yousuke Murakami ,  Goshi Biwa ,  Hiroyuki Okuyama ,  Masato Doi ,  Toyoharu Oohata

发明人： Etsuo Morita ,  Yousuke Murakami ,  Goshi Biwa ,  Hiroyuki Okuyama ,  Masato Doi ,  Toyoharu Oohata

IPC分类号： C30B25/02

CPC分类号： H01L21/02538 ,  C30B25/02 ,  C30B25/183 ,  C30B29/403 ,  C30B29/406 ,  H01L21/0237 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/0265

摘要： A crystal foundation having dislocations is used to obtain a crystal film of low dislocation density, a crystal substrate, and a semiconductor device. One side of a growth substrate (11) is provided with a crystal layer (13) with a buffer layer (12) in between. The crystal layer (13) has spaces (13a), (13b) in an end of each threading dislocation D1 elongating from below. The threading dislocation D1 is separated from the upper layer by the spaces (13a), (13b), so that each threading dislocation D1 is blocked from propagating to the upper layer. When the displacement of the threading dislocation D1 expressed by Burgers vector is preserved to develop another dislocation, the spaces (13a), (13b) vary the direction of its displacement. As a result, the upper layer above the spaces (13a), (13b) turns crystalline with a low dislocation density.

摘要翻译： 使用具有位错的晶体基底来获得位错密度低的晶体膜，晶体基板和半导体器件。 生长衬底（11）的一侧设置有在其间具有缓冲层（12）的晶体层（13）。 在从下方延伸的每个穿透位错D1的端部中，晶体层（13）具有空间（13a），（13b）。 穿透位错D1通过空间（13a），（13b）与上层分开，使得每个穿透位错D1被阻止传播到上层。 当由汉堡矢量表示的穿透位错D1的位移被保留以产生另一个位错时，空间（13a），（13b）改变其位移的方向。 结果，空间（13a），（13b）上方的上层以低位错密度变成结晶。

公开(公告)号：US07564064B2

公开(公告)日：2009-07-21

申请号：US11682770

申请日：2007-03-06

申请人： Toyoharu Oohata ,  Hiroyuki Okuyama ,  Masato Doi ,  Goshi Biwa ,  Jun Suzuki

发明人： Toyoharu Oohata ,  Hiroyuki Okuyama ,  Masato Doi ,  Goshi Biwa ,  Jun Suzuki

IPC分类号： H01L27/15

CPC分类号： H01L33/20 ,  H01L33/007 ,  H01L33/24

摘要： An n-type GaN layer is grown onto a sapphire substrate and a hexagonal etching mask is formed onto the n-type GaN layer as provided. The n-type GaN layer is etched to a predetermined depth by using the etching mask by the RIE method. A hexagonal prism portion whose upper surface is a C plane is formed. After the etching mask was removed, an active layer and a p-type GaN layer are sequentially grown onto the whole surface of the substrate so as to cover the hexagonal prism portion, thereby forming a light emitting device structure. After that, a p-side electrode is formed onto the p-type GaN layer of the hexagonal prism portion and an n-side electrode is formed onto the n-type GaN layer.

摘要翻译： 在蓝宝石衬底上生长n型GaN层，并且在所提供的n型GaN层上形成六边形蚀刻掩模。 通过使用RIE法的蚀刻掩模将n型GaN层蚀刻到预定深度。 形成上表面为C面的六边形棱镜部。 在除去蚀刻掩模之后，将有源层和p型GaN层依次生长到基板的整个表面上以覆盖六边形棱镜部分，从而形成发光器件结构。 之后，在六边形棱镜部分的p型GaN层上形成p侧电极，在n型GaN层上形成n侧电极。

公开(公告)号：US20060170001A1

公开(公告)日：2006-08-03

申请号：US11331290

申请日：2006-01-12

申请人： Jun Suzuki ,  Masato Doi ,  Goshi Biwa ,  Hiroyuki Okuyama

发明人： Jun Suzuki ,  Masato Doi ,  Goshi Biwa ,  Hiroyuki Okuyama

IPC分类号： H01L33/00

CPC分类号： H01L33/0075 ,  H01L33/40

摘要： A semiconductor light-emitting device is provided. In an InGaN-based semiconductor light-emitting device including an Ag electrode, a semiconductor layer on the contact side of at least the Ag electrode is a dislocation semiconductor layer of which dislocation density is selected to be less than 1×107 (1/cm2) and thereby short-circuit caused by Ag migration generated along this dislocation can be avoided. Thus, this semiconductor light-emitting device is able to solve a problem of a shortened life and a problem with the fraction of defective devices encountered with the InGaN-based semiconductor light-emitting device.

摘要翻译： 提供了一种半导体发光器件。 在包括Ag电极的InGaN系半导体发光器件中，至少Ag电极的接触侧的半导体层是位错密度选择为小于1×10 7（1 / cm 2），从而可以避免沿着该位错产生的Ag迁移引起的短路。 因此，该半导体发光器件能够解决寿命缩短的问题，并且能够解决InGaN系半导体发光元件遇到的缺陷器件的分数的问题。

公开(公告)号：US07250320B2

公开(公告)日：2007-07-31

申请号：US10512131

申请日：2004-02-19

申请人： Hiroyuki Okuyama ,  Masato Doi ,  Goshi Biwa ,  Jun Suzuki ,  Toyoharu Oohata

发明人： Hiroyuki Okuyama ,  Masato Doi ,  Goshi Biwa ,  Jun Suzuki ,  Toyoharu Oohata

IPC分类号： H01L29/22

CPC分类号： H01L33/20 ,  H01L21/0237 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02647 ,  H01L33/007 ,  H01L33/24 ,  H01L33/32 ,  H01L2224/48137

摘要： A semiconductor light emitting element, manufacturing method thereof, integrated semiconductor light emitting device, manufacturing method thereof, illuminating device, and manufacturing method thereof are provided.An n-type GaN layer is grown on a sapphire substrate, and a growth mask of SiN, for example, is formed thereon. On the n-type GaN layer exposed through an opening in the growth mask, a six-sided steeple-shaped n-type GaN layer is selectively grown, which has inclined crystal planes each composed of a plurality of crystal planes inclined from the major surface of the sapphire substrate by different angles of inclination to exhibit a convex plane as a whole. On the n-type GaN layer, an active layer and a p-type GaN layer are grown to make a light emitting element structure. Thereafter, a p-side electrode and an n-side electrode are formed.

摘要翻译： 提供半导体发光元件，其制造方法，集成半导体发光器件，其制造方法，照明器件及其制造方法。 在蓝宝石衬底上生长n型GaN层，例如在其上形成SiN的生长掩模。 在通过生长掩模中的开口暴露的n型GaN层上，选择性地生长六边形尖状n型GaN层，其倾斜晶面各自由从主表面倾斜的多个晶面构成 的蓝宝石衬底由不同的倾斜角度整体呈现凸面。 在n型GaN层上生长有源层和p型GaN层以制成发光元件结构。 此后，形成p侧电极和n侧电极。

公开(公告)号：US20060169997A1

公开(公告)日：2006-08-03

申请号：US11329589

申请日：2006-01-10

申请人： Jun Suzuki ,  Masato Doi ,  Hiroyuki Okuyama ,  Goshi Biwa

发明人： Jun Suzuki ,  Masato Doi ,  Hiroyuki Okuyama ,  Goshi Biwa

IPC分类号： H01L33/00

CPC分类号： H01L33/20 ,  Y10S257/918

摘要： A semiconductor light-emitting device is provided. The semiconductor light-emitting device includes a laminated semiconductor structure portion composed of at least a first conductivity type first cladding layer, an active layer and a second conductivity type second cladding layer, wherein an outer peripheral surface of this laminated semiconductor structure portion is formed as a curved surface shape which is protrusively curved or bent with respect to the outside of the laminated direction.

摘要翻译： 提供了一种半导体发光器件。 半导体发光装置包括由至少第一导电型第一包层，有源层和第二导电型第二包层构成的层叠半导体结构部，其中，该层叠半导体结构部的外周面形成为 相对于层叠方向的外侧突出地弯曲或弯曲的曲面形状。