公开(公告)号：US20080050599A1

公开(公告)日：2008-02-28

申请号：US11976246

申请日：2007-10-23

申请人： Etsuo Morita ,  Yousuke Murakami ,  Goshi Biwa ,  Hiroyuki Okuyama ,  Masato Doi ,  Toyoharu Oohata

发明人： Etsuo Morita ,  Yousuke Murakami ,  Goshi Biwa ,  Hiroyuki Okuyama ,  Masato Doi ,  Toyoharu Oohata

IPC分类号： B32B9/04

CPC分类号： H01L21/02538 ,  C30B25/02 ,  C30B25/183 ,  C30B29/403 ,  C30B29/406 ,  H01L21/0237 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/0265

摘要： A crystal foundation having dislocations is used to obtain a crystal film of low dislocation density, a crystal substrate, and a semiconductor device. One side of a growth substrate (11) is provided with a crystal layer (13) with a buffer layer (12) in between. The crystal layer (13) has spaces (13a), (13b) in an end of each threading dislocation D1 elongating from below. The threading dislocation D1 is separated from the upper layer by the spaces (13a), (13b), so that each threading dislocation D1 is blocked from propagating to the upper layer. When the displacement of the threading dislocation D1 expressed by Burgers vector is preserved to develop another dislocation, the spaces (13a), (13b) vary the direction of its displacement. As a result, the upper layer above the spaces (13a), (13b) turns crystalline with a low dislocation density.

公开(公告)号：US07364805B2

公开(公告)日：2008-04-29

申请号：US10466607

申请日：2002-01-18

申请人： Etsuo Morita ,  Yousuke Murakami ,  Goshi Biwa ,  Hiroyuki Okuyama ,  Masato Doi ,  Toyoharu Oohata

发明人： Etsuo Morita ,  Yousuke Murakami ,  Goshi Biwa ,  Hiroyuki Okuyama ,  Masato Doi ,  Toyoharu Oohata

IPC分类号： B32B9/00 ,  B63H1/26 ,  H01L21/31

CPC分类号： H01L21/02538 ,  C30B25/02 ,  C30B25/183 ,  C30B29/403 ,  C30B29/406 ,  H01L21/0237 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/0265

摘要： A crystal foundation having dislocations is used to obtain a crystal film of low dislocation density, a crystal substrate, and a semiconductor device. One side of a growth substrate (11) is provided with a crystal layer (13) with a buffer layer (12) in between. The crystal layer (13) has spaces (13a), (13b) in an end of each threading dislocation D1 elongating from below. The threading dislocation D1 is separated from the upper layer by the spaces (13a), (13b), so that each threading dislocation D1 is blocked from propagating to the upper layer. When the displacement of the threading dislocation D1 expressed by Burgers vector is preserved to develop another dislocation, the spaces (13a), (13b) vary the direction of its displacement. As a result, the upper layer above the spaces (13a), (13b) turns crystalline with a low dislocation density.

摘要翻译： 使用具有位错的晶体基底来获得位错密度低的晶体膜，晶体基板和半导体器件。 生长衬底（11）的一侧设置有在其间具有缓冲层（12）的晶体层（13）。 晶体层（13）在从下方延伸的每个穿透位错D 1 1的末端具有间隔（13a），（13b）。 穿透位错D 1＆lt; 1＆gt;通过空间（13a），（13b）从上层分离，使得每个穿透位错D 1 1被阻止传播到 上层。 当由汉堡矢量表示的穿透位错D 1 1的位移被保留以产生另一位错时，空间（13a），（13b）改变其位移的方向。 结果，空间（13a），（13b）上方的上层以低位错密度变为结晶。

公开(公告)号：US08741451B2

公开(公告)日：2014-06-03

申请号：US11976246

申请日：2007-10-23

申请人： Etsuo Morita ,  Yousuke Murakami ,  Goshi Biwa ,  Hiroyuki Okuyama ,  Masato Doi ,  Toyoharu Oohata

发明人： Etsuo Morita ,  Yousuke Murakami ,  Goshi Biwa ,  Hiroyuki Okuyama ,  Masato Doi ,  Toyoharu Oohata

IPC分类号： B32B9/00 ,  B32B19/00

CPC分类号： H01L21/02538 ,  C30B25/02 ,  C30B25/183 ,  C30B29/403 ,  C30B29/406 ,  H01L21/0237 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/0265

摘要： A crystal foundation having dislocations is used to obtain a crystal film of low dislocation density, a crystal substrate, and a semiconductor device. One side of a growth substrate (11) is provided with a crystal layer (13) with a buffer layer (12) in between. The crystal layer (13) has spaces (13a), (13b) in an end of each threading dislocation D1 elongating from below. The threading dislocation D1 is separated from the upper layer by the spaces (13a), (13b), so that each threading dislocation D1 is blocked from propagating to the upper layer. When the displacement of the threading dislocation D1 expressed by Burgers vector is preserved to develop another dislocation, the spaces (13a), (13b) vary the direction of its displacement. As a result, the upper layer above the spaces (13a), (13b) turns crystalline with a low dislocation density.

摘要翻译： 使用具有位错的晶体基底来获得位错密度低的晶体膜，晶体基板和半导体器件。 生长衬底（11）的一侧设置有在其间具有缓冲层（12）的晶体层（13）。 在从下方延伸的每个穿透位错D1的端部中，晶体层（13）具有空间（13a），（13b）。 穿透位错D1通过空间（13a），（13b）与上层分开，使得每个穿透位错D1被阻止传播到上层。 当由汉堡矢量表示的穿透位错D1的位移被保留以产生另一个位错时，空间（13a），（13b）改变其位移的方向。 结果，空间（13a），（13b）上方的上层以低位错密度变成结晶。

公开(公告)号：US20070125996A1

公开(公告)日：2007-06-07

申请号：US11699999

申请日：2007-01-31

申请人： Etsuo Morita ,  Yousuke Murakami ,  Goshi Biwa ,  Hiroyuki Okuyama ,  Masato Doi ,  Toyoharu Oohata

发明人： Etsuo Morita ,  Yousuke Murakami ,  Goshi Biwa ,  Hiroyuki Okuyama ,  Masato Doi ,  Toyoharu Oohata

IPC分类号： H01L29/06 ,  H01L33/00 ,  H01L31/00 ,  H01L29/739

CPC分类号： H01L21/02538 ,  C30B25/02 ,  C30B25/183 ,  C30B29/403 ,  C30B29/406 ,  H01L21/0237 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/0265

摘要： A crystal foundation having dislocations is used to obtain a crystal film of low dislocation density, a crystal substrate, and a semiconductor device. One side of a growth substrate (11) is provided with a crystal layer (13) with a buffer layer (12) in between. The crystal layer (13) has spaces (13a), (13b) in an end of each threading dislocation D1 elongating from below. The threading dislocation D1 is separated from the upper layer by the spaces (13a), (13b), so that each threading dislocation D1 is blocked from propagating to the upper layer. When the displacement of the threading dislocation D1 expressed by Burgers vector is preserved to develop another dislocation, the spaces (13a), (13b) vary the direction of its displacement. As a result, the upper layer above the spaces (13a), (13b) turns crystalline with a low dislocation density.

摘要翻译： 使用具有位错的晶体基底来获得位错密度低的晶体膜，晶体基板和半导体器件。 生长衬底（11）的一侧设置有在其间具有缓冲层（12）的晶体层（13）。 晶体层（13）在从下方延伸的每个穿透位错D 1 1的末端具有间隔（13a），（13b）。 穿透位错D 1＆lt; 1＆gt;通过空间（13a），（13b）从上层分离，使得每个穿透位错D 1 1被阻止传播到 上层。 当由汉堡矢量表示的穿透位错D 1 1的位移被保留以产生另一位错时，空间（13a），（13b）改变其位移的方向。 结果，空间（13a），（13b）上方的上层以低位错密度变为结晶。

公开(公告)号：US07727331B2

公开(公告)日：2010-06-01

申请号：US11699999

申请日：2007-01-31

申请人： Etsuo Morita ,  Yousuke Murakami ,  Goshi Biwa ,  Hiroyuki Okuyama ,  Masato Doi ,  Toyoharu Oohata

发明人： Etsuo Morita ,  Yousuke Murakami ,  Goshi Biwa ,  Hiroyuki Okuyama ,  Masato Doi ,  Toyoharu Oohata

IPC分类号： C30B25/02

CPC分类号： H01L21/02538 ,  C30B25/02 ,  C30B25/183 ,  C30B29/403 ,  C30B29/406 ,  H01L21/0237 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/0265

摘要： A crystal foundation having dislocations is used to obtain a crystal film of low dislocation density, a crystal substrate, and a semiconductor device. One side of a growth substrate (11) is provided with a crystal layer (13) with a buffer layer (12) in between. The crystal layer (13) has spaces (13a), (13b) in an end of each threading dislocation D1 elongating from below. The threading dislocation D1 is separated from the upper layer by the spaces (13a), (13b), so that each threading dislocation D1 is blocked from propagating to the upper layer. When the displacement of the threading dislocation D1 expressed by Burgers vector is preserved to develop another dislocation, the spaces (13a), (13b) vary the direction of its displacement. As a result, the upper layer above the spaces (13a), (13b) turns crystalline with a low dislocation density.

摘要翻译： 使用具有位错的晶体基底来获得位错密度低的晶体膜，晶体基板和半导体器件。 生长衬底（11）的一侧设置有在其间具有缓冲层（12）的晶体层（13）。 在从下方延伸的每个穿透位错D1的端部中，晶体层（13）具有空间（13a），（13b）。 穿透位错D1通过空间（13a），（13b）与上层分开，使得每个穿透位错D1被阻止传播到上层。 当由汉堡矢量表示的穿透位错D1的位移被保留以产生另一个位错时，空间（13a），（13b）改变其位移的方向。 结果，空间（13a），（13b）上方的上层以低位错密度变成结晶。

公开(公告)号：US06967353B2

公开(公告)日：2005-11-22

申请号：US10341706

申请日：2003-01-14

申请人： Jun Suzuki ,  Hiroyuki Okuyama ,  Goshi Biwa ,  Etsuo Morita

发明人： Jun Suzuki ,  Hiroyuki Okuyama ,  Goshi Biwa ,  Etsuo Morita

IPC分类号： H01L33/06 ,  H01L33/16 ,  H01L33/24 ,  H01L33/28 ,  H01L33/32 ,  H01L33/38 ,  H01L29/22 ,  H01L29/18 ,  H01L29/24 ,  H01L33/00

CPC分类号： H01L33/24 ,  H01L33/18

摘要： A semiconductor light emitting device includes a crystal layer formed on a substrate, the crystal layer having a tilt crystal plane tilted from the principal plane of the substrate, and a first conductive type layer, an active layer, and a second conductive type layer, which are formed on the crystal layer in such a manner as to extend within planes parallel to the tilt crystal plane, wherein the device has a shape formed by removing the apex and its vicinity of the stacked layer structure formed on the substrate. Such a semiconductor light emitting device is excellent in luminous efficiency even if the device has a three-dimensional device structure. The present invention also provides a method of fabricating the above semiconductor light emitting device.

摘要翻译： 半导体发光器件包括形成在衬底上的晶体层，所述晶体层具有从衬底的主平面倾斜的倾斜晶体面，以及第一导电类型层，有源层和第二导电型层， 以平行于倾斜晶面的平面内延伸的方式形成在晶体层上，其中，该器件具有通过去除形成在基板上的堆叠层结构的顶点及其附近而形成的形状。 这种半导体发光器件即使器件具有三维器件结构，发光效率也优异。 本发明还提供一种制造上述半导体发光器件的方法。

公开(公告)号：US6121636A

公开(公告)日：2000-09-19

申请号：US72177

申请日：1998-05-05

申请人： Etsuo Morita ,  Hiroji Kawai

发明人： Etsuo Morita ,  Hiroji Kawai

IPC分类号： H01L33/32 ,  H01L33/40 ,  H01L33/46 ,  H01L33/54 ,  H01L33/56 ,  H01L33/62 ,  H01S5/00 ,  H01S5/323 ,  H01L29/78 ,  H01L33/00

CPC分类号： H01L33/20 ,  H01L33/32 ,  H01L33/46 ,  H01L2224/32245 ,  H01L2224/32257 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48464 ,  H01L2224/49107 ,  H01L2224/73265

摘要： A semiconductor light emitting device is provided, which does not deteriorate in luminance, maintains a high reliability, permits more free choice of an adhesive, and promises effective extraction of light to the exterior even when it is bonded to a lead frame or other support with the adhesive in practical use. In a GaN light emitting diode, GaN compound semiconductor layers are stacked sequentially on a front surface of a sapphire substrate to form a light emitting diode structure, and a reflective film is formed on a rear surface. Alternatively, the GaN compound semiconductor layers forming the light emitting diode structure are selectively removed by etching to define an inverted mesa-shaped end surface, and the reflective film is formed on the end surface. Both the p-side electrode and the n-side electrode are formed on a common side of the substrate where the GaN compound semiconductor layers are formed.

摘要翻译： 提供一种半导体发光器件，其不会劣化亮度，保持高可靠性，允许更自由地选择粘合剂，并且即使当将其粘合到引线框架或其他支撑件上时也能有效地将光提取到外部， 粘合剂在实际使用中。 在GaN发光二极管中，GaN化合物半导体层依次层叠在蓝宝石衬底的前表面上以形成发光二极管结构，并且在后表面上形成反射膜。 或者，通过蚀刻选择性地除去形成发光二极管结构的GaN化合物半导体层，以限定倒置的台面状端面，并且在端面上形成反射膜。 p侧电极和n侧电极都形成在形成GaN化合物半导体层的基板的共同侧。

公开(公告)号：US6107162A

公开(公告)日：2000-08-22

申请号：US59827

申请日：1998-04-14

申请人： Etsuo Morita ,  Hiroji Kawai

发明人： Etsuo Morita ,  Hiroji Kawai

IPC分类号： H01L21/20 ,  H01L33/14 ,  H01L33/16 ,  H01L33/20 ,  H01L33/32 ,  H01S5/00 ,  H01S5/02 ,  H01S5/042 ,  H01S5/10 ,  H01S5/323 ,  H01L21/46

CPC分类号： H01S5/0201 ,  H01S5/0422 ,  H01S5/0202 ,  H01S5/0213 ,  H01S5/1082 ,  H01S5/32341

摘要： A semiconductor device such as a semiconductor layer is formed of a compound semiconductor layer of III-V group such as GaN. In the case where the substrate has not any planes that are easy to cleave which coincides with an easy-to-cleave plane of a semiconductor layer grown on the substrate or the substrate easily succumbs to cleavage, then the semiconductor layer together with the substrate can be broken into chips in an easy-to-cleave plane. The cleaved surface of the semiconductor layer can be positively formed as an optically superior surface. A compound semiconductor layer 2 containing at least one of the elements {Ga, Al, In} and N is formed on the substrate 1. This compound semiconductor layer 2 has a pair of facets of {11-20} plane substantially perpendicular to the substrate 1.

摘要翻译： 诸如半导体层的半导体器件由诸如GaN的III-V族的化合物半导体层形成。 在衬底没有任何容易切割的平面与衬底上生长的半导体层的容易解理平面或衬底容易陷入裂纹的情况相一致的情况下，半导体层与衬底一起可以 在易于分裂的飞机上被破碎成碎片。 可以将半导体层的分解面牢固地形成为光学优良的表面。 包含至少一种元素{Ga，Al，In}和N的化合物半导体层2形成在基板1上。该化合物半导体层2具有与基板垂直的{11-20}面的一对面 1。

公开(公告)号：US20050196888A1

公开(公告)日：2005-09-08

申请号：US11113597

申请日：2005-04-25

申请人： Etsuo Morita

发明人： Etsuo Morita

IPC分类号： H01L21/20 ,  H01L21/205 ,  H01L21/335 ,  H01L33/00 ,  H01L33/12 ,  H01L33/16 ,  H01L33/20 ,  H01L33/32 ,  H01S5/00 ,  H01S5/02 ,  H01S5/323 ,  H01S5/343 ,  H01L21/00 ,  H01L21/46

CPC分类号： H01L33/20 ,  H01L21/0242 ,  H01L21/0243 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/0262 ,  H01L29/66462 ,  H01L33/007 ,  H01S5/0207 ,  H01S5/0213 ,  H01S5/32341

摘要： To improve crystallographic property of a nitride III-V compound semiconductor layer grown on a sapphire substrate, a plurality of recesses are made on a major surface of the sapphire substrate, and the nitride III-V compound semiconductor layer is grown thereon. At least a part of the inner surface of each recess makes an angle not less than 10 degrees with respect to the major surface of the sapphire substrate. The recesses are buried with nitride III-V compound semiconductor crystal having a higher Al composition ratio than the nitride III-V compound semiconductor layer, such as AlxGa1-xN crystal whose Al composition ratio x is 0.2 or more, for example. Each recess has a depth not less than 25 nm and a width not less than 30 nm. The recesses may be made either upon thermal cleaning of the sapphire substrate or by using lithography and etching, thermal etching, or the like.

摘要翻译： 为了提高在蓝宝石衬底上生长的氮化物III-V化合物半导体层的晶体学特性，在蓝宝石衬底的主表面上形成多个凹槽，并且在其上生长氮化物III-V化合物半导体层。 每个凹部的内表面的至少一部分相对于蓝宝石衬底的主表面形成不小于10度的角度。 这些凹槽用比氮化物III-V化合物半导体层更高的Al组分比的氮化物III-V化合物半导体晶体掩埋，例如Al x Ga 1-x N Al组成比例x为0.2以上。 每个凹槽的深度不小于25nm，宽度不小于30nm。 凹槽可以在蓝宝石基板的热清洗或者通过使用光刻和蚀刻，热蚀刻等方面制成。

公开(公告)号：US06232623B1

公开(公告)日：2001-05-15

申请号：US09334666

申请日：1999-06-17

申请人： Etsuo Morita

发明人： Etsuo Morita

IPC分类号： H01L3300

CPC分类号： H01L33/20 ,  H01L21/0242 ,  H01L21/0243 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/0262 ,  H01L29/66462 ,  H01L33/007 ,  H01S5/0207 ,  H01S5/0213 ,  H01S5/32341

摘要： To improve crystallographic property of a nitride III-V compound semiconductor layer grown on a sapphire substrate, a plurality of recesses are made on a major surface of the sapphire substrate, and the nitride III-V compound semiconductor layer is grown thereon. At least a part of the inner surface of each recess makes an angle not less than 10 degrees with respect to the major surface of the sapphire substrate. The recesses are buried with nitride III-V compound semiconductor crystal having a higher Al composition ratio than the nitride III-V compound semiconductor layer, such as AlxGa1−xN crystal whose Al composition ratio x is 0.2 or more, for example. Each recess has a depth not less than 25 nm and a width not less than 30 nm. The recesses may be made either upon thermal cleaning of the sapphire substrate or by using lithography and etching, thermal etching, or the like.

摘要翻译： 为了提高在蓝宝石衬底上生长的氮化物III-V化合物半导体层的晶体学特性，在蓝宝石衬底的主表面上形成多个凹槽，并且在其上生长氮化物III-V化合物半导体层。 每个凹部的内表面的至少一部分相对于蓝宝石衬底的主表面形成不小于10度的角度。 通过例如Al组成比x为0.2以上的Al x Ga 1-x N晶体，比氮化物III-V化合物半导体层具有更高的Al组成比的氮化物III-V化合物半导体晶体埋设凹部。 每个凹槽的深度不小于25nm，宽度不小于30nm。 凹槽可以在蓝宝石基板的热清洗或者通过使用光刻和蚀刻，热蚀刻等方面制成。