摘要:
A resin composition for semiconductor encapsulation having good moldability, of which the cured product has effective electromagnetic wave shieldability, is provided. A resin composition for semiconductor encapsulation, containing spherical sintered ferrite particles having the following properties (a) to (c) : (a) the soluble ion content of the particles is at most 5 ppm; (b) the mean particle size of the particles is from 10 to 50 μm; (c) the crystal structure of the particles by X-ray diffractiometry is a spinel structure.
摘要:
An object is to obtain a semiconductor device testing apparatus that can improve the contact characteristic between probe needles and power-supply terminals and signal terminals while ensuring efficiency of product utilization of a tested wafer. Provided on a probe wafer (4) are bumps (5) formed in the same positions in mirror symmetry as the positions of pads (3) formed in individual chips (2) on a tested wafer (1), a common interconnection (6) for interconnecting bumps (5) to be supplied with the same power supplies and signals, and terminals (7) connected to the common interconnection (6) to supply power supplies and signals to the common interconnection (6) from the outside. The bumps (5) come in contact with the pads (3) in the chips (2) when the probe wafer (4) and the tested wafer (1) are put together. The common interconnection (6) supplies the power supplies and signals for a burn-in test to the pads (3) in the chips (2).
摘要:
An electric work station calculates an output load of a selected cell based on information from at least one of a design cell information library, a logic circuit information library and a layout information library. The work station further calculates a hot carrier dependent lifetime of a transistor in the cell by using the computed output load and information from a reliability information library, and verifies reliability of the cell by comparing the calculated lifetime with a reference value.
摘要:
The present invention relates to plate-like ferrite particles with magnetoplumbite structure having a composition represented by the general formula of AO.multidot.n{(Fe.sub.1-(a+b) Bi.sub.a M.sub.b).sub.2 O.sub.3 } wherein A is Ba, Sr or Ba--Sr; M is Zn--Nb, Zn--Ta or Zn--Sn; n is from 5.5 to 6.1; a is from 0.001 to 0.005; b is from 0.050 to 0.120; and the ratio of b/a is from 20 to 50. The plate-like ferrite particles with magnetoplumbite structure have an appropriate particle size, a low coercive force, a large saturation magnetization, a small switching field distribution (S.F.D.) and an excellent temperature stability, and a magnetic card containing the plate-like ferrite particles with magnetoplumbite structure.
摘要:
A semiconductor substrate with no reduction in the effective usage area and mechanical strength, and non-uniformity of the resist film thickness, and method of manufacturing and using the same are obtained. A detection mark for detecting the crystal orientation of a silicon wafer having an outer perimeter entirely of a circular contour is formed at a predetermined region of the silicon wafer. The crystal orientation of the semiconductor wafer can easily be detected with the outer perimeter still taking a circular contour. Therefore, various problems encountered in a conventional semiconductor substrate having an orientation flat or notch such as reduction in mechanical strength and effective usage area, and non-uniformity of the resist film can be circumvented.
摘要:
Disclosed herein are ferrite particles for a bonded magnetic core comprising crystal grains of 5 to 15 .mu.m in average diameter, having an average particle diameter of 20 to 150 .mu.m and a magnetic permeability of not less than 24, and consisting essentially of 47 to 58 mol % of Fe.sub.2 O.sub.3, 10 to 30 mol % of nickel oxide, manganese oxide, nickel-managanese oxide (calculated as NiO, MnO or NiO.MnO) and 15 to 40 mol % of zinc oxide (calculated as ZnO).
摘要翻译:本发明公开了一种粘结磁芯的铁氧体颗粒,其包含平均粒径为5〜15μm,平均粒径为20〜150μm,磁导率不低于24的晶粒,基本上由47〜 58mol%的Fe 2 O 3,10〜30mol%的氧化镍,氧化锰,镍锰氧化物(以NiO,MnO或NiO.MnO计)和15〜40mol%的氧化锌(以ZnO计)。
摘要:
A heat-resistant inorganic pigment of the present invention comprises a composite metal oxide containing Ti and two divalent metals selected from the group consisting of Mg, Fe, Ni and Co, the content of said two divalent metals in said composite metal oxide being 0.95 to 1.05, in an atomic ratio, based on Ti, and the composition ratio of said two divalent metals being 95/5 to 5/95 in an atomic ratio. The pigment of the present invention is useful as a pigment for a heat-resistant coating material and is a novel heat-resistant inorganic pigment which does not pollute the environment.
摘要:
An input protection circuit comprises an internal circuit and an input terminal, between which a pair of rectifying devices are interposed with polygonal diffusion regions of one and the other conduction types, which diffusion regions are formed longer along the width thereof orthogonal to the direction of current flow in the wiring than along the direction of current flow. The width of the contacts between said wiring and said diffusion regions is greater than the width of the wiring not having the contacts, thereby achieving a high electrostatic breakdown voltage.
摘要:
A method of verifying semiconductor integrated circuit reliability allows reliability verification of a large-scale semiconductor integrated circuit without any omission. Step S12 is to obtain a sum total (Cio) of inner-cell input/output load capacities in a selected cell on the basis of input and output load capacities registered in a cell library database (1A), and step S13 is to obtain wiring capacitance (Cic) between cells. In step S14, the sum total (Cio) of inner-cell input/output load capacities and the wiring capacitance (Cic) between cells are added to obtain output-terminal load capacity (COUT). On the basis of the output-terminal load capacity (COUT), a failure rate (FOUT) of an intercellular interconnect line is obtained in step S15, and a failure rate (Fcell) of inner-cell interconnect lines is obtained in step S16 from an equation registered in the cell library database (1A). Then, those failure rates (Fcell, FOUT) are added to obtain a total failure rate (Ftotal) in step S17.
摘要:
To provide a burn-in method and device capable of accelerating burn-in also in a peripheral circuit portion and a logic circuit portion as well as a memory cell array portion. A high temperature stress is applied to a wafer to be an evaluation object (Step SP11). Next, a low temperature stress and an electric stress are applied to the wafer (Step SP12). Then, it is decided whether a predetermined stress is applied to the wafer or not (Step SP13). If a result of the decision at the Step SP13 is “YES”, it is decided whether a defective portion is generated in each chip of the wafer or not (Step SP14). Referring to a chip decided to have a failure generated thereon as a result of the decision at the Step SP14, it is decided whether repair is executed for the defective portion or not (Step SP15). If a result of the decision at the Step SP15 is “YES”, the repair is executed for the defective portion (Step SP16).