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公开(公告)号：US09229054B2
公开(公告)日：2016-01-05
申请号：US13976931
申请日：2011-09-28
IPC分类号： G01R31/3187 , G01R31/317 , G01R31/3193 , G01R31/26 , G01R31/28 , G06F1/10
CPC分类号： G01R31/31707 , G01R31/2642 , G01R31/2882 , G01R31/31725 , G01R31/31937 , G06F1/10
摘要： An aging monitor circuit that provides a more accurate estimate of aging and/or delay in a circuit and/or circuit path. The aging monitor circuit employs a separate aging path with driving and receiving flip flops (FFs) and a tunable replica circuit (TRC) to enable measurements of single-transition DC-stressed path delay that only propagates through stressed transistors or other circuit element(s). A finite state machine (FSM) in the aging monitor circuit is configured to adjust a frequency of a clock signal output by a digitally controlled oscillator (DCO) in response to an error signal output by the receiving FF. The error signal is generated in response to single-transition DC-stressed path delay; and therefore enables the adjustment of the frequency of the dock signal to correspond to an amount or effect of the delay.
摘要翻译： 一种老化监视电路，可以更准确地估计电路和/或电路路径中的老化和/或延迟。 老化监测电路采用单独的老化路径，具有驱动和接收触发器（FF）和可调谐复制电路（TRC），以便能够测量仅通过应力晶体管或其他电路元件传播的单跃迁DC应力路径延迟 ）。 老化监视电路中的有限状态机（FSM）被配置为响应于由接收FF输出的误差信号来调节由数字控制振荡器（DCO）输出的时钟信号的频率。 误差信号是响应单跃变直流应力路径延迟而产生的; 因此能够调整对接信号的频率以对应于延迟的量或效果。
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公开(公告)号：US20130285685A1
公开(公告)日：2013-10-31
申请号：US13976931
申请日：2011-09-28
IPC分类号： G01R31/317
CPC分类号： G01R31/31707 , G01R31/2642 , G01R31/2882 , G01R31/31725 , G01R31/31937 , G06F1/10
摘要： An aging monitor circuit that provides a more accurate estimate of aging and/or delay in a circuit and/or circuit path. The aging monitor circuit employs a separate aging path with driving and receiving flip flops (FFs) and a tunable replica circuit (TRC) to enable measurements of single-transition DC-stressed path delay that only propagates through stressed transistors or other circuit element(s). A finite state machine (FSM) in the aging monitor circuit is configured to adjust a frequency of a clock signal output by a digitally controlled oscillator (DCO) in response to an error signal output by the receiving FF. The error signal is generated in response to single transition DC-stressed path delay, and therefore enables the adjustment of the frequency of the clock signal to correspond to an amount or effect of the delay.
摘要翻译： 一种老化监视电路，可以更准确地估计电路和/或电路路径中的老化和/或延迟。 老化监测电路采用单独的老化路径，具有驱动和接收触发器（FF）和可调谐复制电路（TRC），以实现仅通过应力晶体管或其他电路元件传播的单跃迁DC应力路径延迟的测量 ）。 老化监视电路中的有限状态机（FSM）被配置为响应于由接收FF输出的误差信号来调节由数字控制振荡器（DCO）输出的时钟信号的频率。 误差信号是响应于单个转变的直流应力路径延迟而产生的，因此能够调整时钟信号的频率以对应于延迟的量或影响。
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3.发明申请RESILIENT REGISTER FILE CIRCUIT FOR DYNAMIC VARIATION TOLERANCE AND METHOD OF OPERATING THE SAME 有权用于动态变化公差的弹性寄存器文件电路及其操作方法公开(公告)号：US20140032980A1
公开(公告)日：2014-01-30
申请号：US13976859
申请日：2011-12-28
IPC分类号： G06F11/07
CPC分类号： G06F11/1068 , G06F9/30141 , G06F9/3861 , G06F11/0751 , G06F11/1008 , G11C7/18 , G11C29/42 , G11C29/52
摘要： The disclosed system and method detect and correct register file read path errors that may occur as a result of reducing or eliminating supply voltage guardbands and/or frequency guardbands for a CPU, thereby increasing overall energy efficiency of the system.
摘要翻译： 所公开的系统和方法检测并校正由于减少或消除CPU的电源电压保护带和/或频率保护带而可能发生的寄存器文件读取路径错误，从而提高了系统的总体能量效率。
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公开(公告)号：US20140122947A1
公开(公告)日：2014-05-01
申请号：US13664153
申请日：2012-10-30
申请人： Keith A. Bowman , James W. Tschanz , Nam Sung Kim , Janice C. Lee , Christopher B. Wilkerson , Shih-Lien L. Lu , Tanay Karnik , Vivek K. De
发明人： Keith A. Bowman , James W. Tschanz , Nam Sung Kim , Janice C. Lee , Christopher B. Wilkerson , Shih-Lien L. Lu , Tanay Karnik , Vivek K. De
CPC分类号： G01R31/3177 , G01R31/31723 , G01R31/31725 , G01R31/31727 , G06F1/10 , G06F11/0706 , G06F11/0757 , G06F11/0793 , H03K3/0375
摘要： Sequential circuits with error-detection are provided. They may, for example, be used to replace traditional master-slave flip-flops, e.g., in critical path circuits to detect and initiate correction of late transitions at the input of the sequential. In some embodiments, such sequentials may comprise a transition detector with a time borrowing latch.
摘要翻译： 提供了具有错误检测的顺序电路。 例如，它们可以用于替代传统的主从触发器，例如在关键路径电路中，以检测并启动在顺序输入处的后期转换的校正。 在一些实施例中，这样的顺序可以包括具有时间借用锁存器的转换检测器。
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5.发明授权Resilient register file circuit for dynamic variation tolerance and method of operating the same 有权用于动态变化公差的弹性寄存器文件电路及其操作方法公开(公告)号：US09329918B2
公开(公告)日：2016-05-03
申请号：US13976859
申请日：2011-12-28
CPC分类号： G06F11/1068 , G06F9/30141 , G06F9/3861 , G06F11/0751 , G06F11/1008 , G11C7/18 , G11C29/42 , G11C29/52
摘要： The disclosed system and method detect and correct register file read path errors that may occur as a result of reducing or eliminating supply voltage guardbands and/or frequency guardbands for a CPU, thereby increasing overall energy efficiency of the system.
摘要翻译： 所公开的系统和方法检测并校正由于减少或消除CPU的电源电压保护带和/或频率保护带而可能发生的寄存器文件读取路径错误，从而提高系统的总体能量效率。
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公开(公告)号：US09189014B2
公开(公告)日：2015-11-17
申请号：US13664153
申请日：2012-10-30
申请人： Keith A. Bowman , James W. Tschanz , Nam Sung Kim , Janice C. Lee , Christopher B. Wilkerson , Shih-Lien L. Lu , Tanay Karnik , Vivek K. De
发明人： Keith A. Bowman , James W. Tschanz , Nam Sung Kim , Janice C. Lee , Christopher B. Wilkerson , Shih-Lien L. Lu , Tanay Karnik , Vivek K. De
IPC分类号： G06F11/07 , G06F1/08 , G06F1/10 , H03K3/037 , G01R31/317
CPC分类号： G01R31/3177 , G01R31/31723 , G01R31/31725 , G01R31/31727 , G06F1/10 , G06F11/0706 , G06F11/0757 , G06F11/0793 , H03K3/0375
摘要： Sequential circuits with error-detection are provided. They may, for example, be used to replace traditional master-slave flip-flops, e.g., in critical path circuits to detect and initiate correction of late transitions at the input of the sequential. In some embodiments, such sequentials may comprise a transition detector with a time borrowing latch.
摘要翻译： 提供了具有错误检测的顺序电路。 例如，它们可以用于替代传统的主从触发器，例如在关键路径电路中，以检测并启动在顺序输入处的后期转换的校正。 在一些实施例中，这样的顺序可以包括具有时间借用锁存器的转换检测器。
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公开(公告)号：US07653850B2
公开(公告)日：2010-01-26
申请号：US11758124
申请日：2007-06-05
申请人： James W. Tschanz , Keith A. Bowman , Nam Sung Kim , Chris Wilkerson , Shih-Lien L. Lu , Tanay Karnik
发明人： James W. Tschanz , Keith A. Bowman , Nam Sung Kim , Chris Wilkerson , Shih-Lien L. Lu , Tanay Karnik
CPC分类号： G06F11/24
摘要： Some embodiments provide sampling of a data signal output from a path stage using a latch, sampling of the data signal output from the path stage using an edge-triggered flip-flop, comparing a first value output by the latch with a second value output by the edge-triggered flip-flop, and generating an error signal if the first value is different from the second value.
摘要翻译： 一些实施例使用锁存器提供从路径级输出的数据信号的采样，使用边沿触发的触发器对从路径级输出的数据信号进行采样，将由锁存器输出的第一值与由 边沿触发触发器，并且如果第一值不同于第二值，则产生误差信号。
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公开(公告)号：US20080307277A1
公开(公告)日：2008-12-11
申请号：US11758124
申请日：2007-06-05
申请人： James W. Tschanz , Keith A. Bowman , Nam Sung Kim , Chris Wilkerson , Shih-Lien L. Lu , Tanay Karnik
发明人： James W. Tschanz , Keith A. Bowman , Nam Sung Kim , Chris Wilkerson , Shih-Lien L. Lu , Tanay Karnik
IPC分类号： G06F11/25
CPC分类号： G06F11/24
摘要： Some embodiments provide sampling of a data signal output from a path stage using a latch, sampling of the data signal output from the path stage using an edge-triggered flip-flop, comparing a first value output by the latch with a second value output by the edge-triggered flip-flop, and generating an error signal if the first value is different from the second value.
摘要翻译： 一些实施例使用锁存器提供从路径级输出的数据信号的采样，使用边沿触发的触发器对从路径级输出的数据信号进行采样，将由锁存器输出的第一值与由 边沿触发触发器，并且如果第一值不同于第二值，则产生误差信号。
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公开(公告)号：US20140236582A1
公开(公告)日：2014-08-21
申请号：US13997070
申请日：2011-12-06
申请人： Arijit Raychowdhury , Willem M. Beltman , James W. Tschanz , Carlos Tokunaga , Michael E. Deisher , Thomas E. Walsh
发明人： Arijit Raychowdhury , Willem M. Beltman , James W. Tschanz , Carlos Tokunaga , Michael E. Deisher , Thomas E. Walsh
IPC分类号： G10L15/20 , G10L21/0232 , G10L15/22 , G10L21/0208
CPC分类号： G10L15/20 , G06F1/3234 , G06F17/142 , G10L15/22 , G10L15/285 , G10L21/0208 , G10L21/0232 , G10L25/18 , G10L25/84 , G10L2015/223 , G10L2021/02087
摘要： Methods of enabling voice processing with minimal power consumption includes recording time-domain audio signal at a first clock frequency and a first voltage, and performing Fast Fourier Transform (FFT) operations on the time-domain audio signal at a second clock frequency to generate frequency-domain audio signal. The frequency domain audio signal may be enhanced to obtain better signal to noise ratio, through one or multiple filtering and enhancing techniques. The enhanced audio signal may be used to generate the total signal energy and estimate the background noise energy. Decision logic may determine from the signal energy and the background noise, the presence or absence of the human voice. The first clock frequency may be different from the second clock frequency.
摘要翻译： 以最小功耗实现语音处理的方法包括以第一时钟频率和第一电压记录时域音频信号，并且以第二时钟频率对时域音频信号执行快速傅立叶变换（FFT）操作以产生频率 域音频信号。 可以通过一个或多个滤波和增强技术来增强频域音频信号以获得更好的信噪比。 增强音频信号可用于产生总信号能量并估计背景噪声能量。 决策逻辑可以根据信号能量和背景噪声来确定人类语音的存在或不存在。 第一时钟频率可以不同于第二时钟频率。
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公开(公告)号：US09633654B2
公开(公告)日：2017-04-25
申请号：US13997070
申请日：2011-12-06
申请人： Arijit Raychowdhury , Willem M. Beltman , James W. Tschanz , Carlos Tokunaga , Michael E. Deisher , Thomas E. Walsh
发明人： Arijit Raychowdhury , Willem M. Beltman , James W. Tschanz , Carlos Tokunaga , Michael E. Deisher , Thomas E. Walsh
IPC分类号： G10L25/00 , G10L15/20 , G10L25/84 , G10L21/0208 , G10L25/18 , G06F17/14 , G10L15/22 , G10L21/0232 , G10L15/28 , G06F1/32
CPC分类号： G10L15/20 , G06F1/3234 , G06F17/142 , G10L15/22 , G10L15/285 , G10L21/0208 , G10L21/0232 , G10L25/18 , G10L25/84 , G10L2015/223 , G10L2021/02087
摘要： Methods of enabling voice processing with minimal power consumption includes recording time-domain audio signal at a first clock frequency and a first voltage, and performing Fast Fourier Transform (FFT) operations on the time-domain audio signal at a second clock frequency to generate frequency-domain audio signal. The frequency domain audio signal may be enhanced to obtain better signal to noise ratio, through one or multiple filtering and enhancing techniques. The enhanced audio signal may be used to generate the total signal energy and estimate the background noise energy. Decision logic may determine from the signal energy and the background noise, the presence or absence of the human voice. The first clock frequency may be different from the second clock frequency.
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