公开(公告)号：US20120126402A1

公开(公告)日：2012-05-24

申请号：US13293769

申请日：2011-11-10

申请人： Koichi HATAKEYAMA ,  Mitsuhisa Watanabe ,  Keiyo Kusanagi

发明人： Koichi HATAKEYAMA ,  Mitsuhisa Watanabe ,  Keiyo Kusanagi

IPC分类号： H01L23/498 ,  H01L23/522

CPC分类号： H01L23/3135 ,  H01L21/561 ,  H01L21/6836 ,  H01L23/3128 ,  H01L23/481 ,  H01L24/97 ,  H01L25/0657 ,  H01L2221/68327 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06586 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/81 ,  H01L2924/00

摘要： A semiconductor device includes a wiring board; a stack of semiconductor chips disposed over the wiring board, each of the semiconductor chip comprising via electrodes, the semiconductor chips being electrically coupled through the via electrodes to each other, the semiconductor chips being electrically coupled through the via electrodes to the wiring board; a first seal that seals the stack of semiconductor chips; and a second seal that covers the first seal. The first seal is smaller in elastic modulus than the second seal.

摘要翻译： 半导体器件包括布线板; 布置在所述布线板上的半导体芯片堆叠，所述半导体芯片中的每一个包括通孔电极，所述半导体芯片通过所述通孔电极彼此电耦合，所述半导体芯片通过所述通孔电极电耦合到所述布线板; 密封半导体芯片堆叠的第一密封件; 以及覆盖第一密封件的第二密封件。 第一密封件的弹性模量比第二密封件小。

公开(公告)号：US20120118939A1

公开(公告)日：2012-05-17

申请号：US13295581

申请日：2011-11-14

申请人： Keiyo KUSANAGI ,  Koichi HATAKEYAMA ,  Mitsuhisa WATANABE ,  Yusuke NAKANOYA ,  Hidenori MATSUSHITA ,  Toru MEURA ,  Kenzou MAEJIMA ,  Hiroki NIKAIDO ,  Mina NIKAIDO

发明人： Keiyo KUSANAGI ,  Koichi HATAKEYAMA ,  Mitsuhisa WATANABE ,  Yusuke NAKANOYA ,  Hidenori MATSUSHITA ,  Toru MEURA ,  Kenzou MAEJIMA ,  Hiroki NIKAIDO ,  Mina NIKAIDO

IPC分类号： B23K1/008 ,  B23K31/02

CPC分类号： B23K1/0016 ,  H01L24/13 ,  H01L24/29 ,  H01L24/73 ,  H01L24/75 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13118 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/73204 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81209 ,  H01L2224/81815 ,  H01L2224/83192 ,  H01L2224/83203 ,  H01L2224/83862 ,  H01L2224/92125 ,  H01L2224/97 ,  H01L2924/00013 ,  H01L2924/01029 ,  H01L2924/15787 ,  H01L2924/181 ,  H05K3/3436 ,  H05K3/3489 ,  H05K2201/10674 ,  H05K2201/10977 ,  H05K2203/068 ,  H05K2203/1189 ,  Y02P70/613 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/014 ,  H01L2924/00

摘要： The process for manufacturing the semiconductor device and the apparatus, which achieve stable production of semiconductor devices with improved connection reliability, is presented. First terminals of circuit boards 1 are arranged to face the corresponding bumps of semiconductor chips 2, respectively, and the resin layer 3 is disposed between the respective first terminals and the respective bumps to form laminates, and the laminates are simultaneously compressed from a direction of lamination, while heating a plurality of laminates. In such case, the diaphragm 54 disposed in a heating furnace 51 is abutted against a plurality of laminates or a member 531 to elastically deform the members while a plurality of laminates is heated in the heating furnace 51, so that laminates are simultaneously compressed from a direction of lamination, while heating thereof in a vacuum.

摘要翻译： 本发明提供了制造半导体器件的方法以及实现稳定生产具有改进的连接可靠性的半导体器件的装置。 电路板1的第一端子被分别布置成与半导体芯片2的相应凸块相对，并且树脂层3设置在相应的第一端子和相应的凸块之间以形成层压体，并且层叠体同时从 同时加热多个层压板。 在这种情况下，设置在加热炉51中的隔膜54抵靠多个层压体或构件531，以在加热炉51中加热多个层压体的同时使构件弹性变形，使得层压体同时从 层叠方向，同时在真空中加热。