公开(公告)号：US08395269B2

公开(公告)日：2013-03-12

申请号：US12656616

申请日：2010-02-04

申请人： Masaya Kawano ,  Koji Soejima ,  Nobuaki Takahashi ,  Yoichiro Kurita ,  Masahiro Komuro ,  Satoshi Matsui

发明人： Masaya Kawano ,  Koji Soejima ,  Nobuaki Takahashi ,  Yoichiro Kurita ,  Masahiro Komuro ,  Satoshi Matsui

IPC分类号： H01L21/50

CPC分类号： H01L25/0657 ,  H01L21/76898 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/562 ,  H01L23/642 ,  H01L25/50 ,  H01L2221/68345 ,  H01L2223/6622 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10155 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012

摘要： A method of manufacturing a semiconductor device includes forming an interconnect member, mounting a first semiconductor chip having a semiconductor substrate in a face-down manner on the interconnect member, forming a resin layer on the interconnect member to cover a side surface of the first semiconductor chip, thinning the first semiconductor chip and the resin layer, forming an inorganic insulating layer on a back surface of the first semiconductor chip so as to be in contact with the back surface and to extend over the resin layer, and forming a through electrode so as to penetrate the inorganic insulating layer and the semiconductor substrate.

摘要翻译： 一种制造半导体器件的方法包括形成互连部件，将具有半导体衬底的第一半导体芯片以面向下的方式安装在互连部件上，在互连部件上形成树脂层以覆盖第一半导体的侧表面 芯片，使第一半导体芯片和树脂层变薄，在第一半导体芯片的背面上形成无机绝缘层，以与背面接触并延伸到树脂层上，并形成通孔，从而形成通孔 以穿透无机绝缘层和半导体衬底。

公开(公告)号：US08114766B1

公开(公告)日：2012-02-14

申请号：US12498664

申请日：2009-07-07

申请人： Koji Soejima ,  Yoichiro Kurita ,  Masaya Kawano

发明人： Koji Soejima ,  Yoichiro Kurita ,  Masaya Kawano

IPC分类号： H01L21/4763

CPC分类号： H01L21/561 ,  H01L21/563 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3121 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L24/97 ,  H01L2221/68318 ,  H01L2221/68345 ,  H01L2221/68381 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/92125 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/15788 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2924/01028 ,  H01L2924/00

摘要： Method of manufacturing a semiconductor device, which achieves a reduction in manufacturing cost and prevents, a damage on the interconnect layer by an influence of the etchant solution, since the support substrate can be easily stripped from the interconnect layer. The method of manufacturing a semiconductor device includes: forming an interconnect film, by forming a seed metal layer on a support substrate and a protective film contacting with an end of an interface between the support substrate and the seed metal layer, and by growing a plated material from a surface of the seed metal layer; mounting a semiconductor chip on the interconnect film; removing at least a portion of the protective film to form a region where the support substrate and the seed metal layer are exposed; and stripping the support substrate from the region as a starting point to remove thereof from the seed metal layer.

摘要翻译： 制造半导体器件的方法，由于可以容易地从互连层剥离支撑基板，所以能够降低制造成本并防止由于蚀刻液的影响对互连层的损伤。 制造半导体器件的方法包括：通过在支撑衬底上形成种子金属层和与支撑衬底和种子金属层之间的界面的端部接触的保护膜来形成互连膜，并且通过生长电镀 种子金属层表面的材料; 将半导体芯片安装在所述互连膜上; 去除所述保护膜的至少一部分以形成所述支撑基底和所述种子金属层暴露的区域; 从该区域剥离载体基材作为起始点，以将其从种子金属层除去。

公开(公告)号：US20100144091A1

公开(公告)日：2010-06-10

申请号：US12656616

申请日：2010-02-04

申请人： Masaya Kawano ,  Koji Soejima ,  Nobuaki Takahashi ,  Yoichiro Kurita ,  Masahiro Komuro ,  Satoshi Matsui

发明人： Masaya Kawano ,  Koji Soejima ,  Nobuaki Takahashi ,  Yoichiro Kurita ,  Masahiro Komuro ,  Satoshi Matsui

IPC分类号： H01L21/50

CPC分类号： H01L25/0657 ,  H01L21/76898 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/562 ,  H01L23/642 ,  H01L25/50 ,  H01L2221/68345 ,  H01L2223/6622 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10155 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012

摘要： A method of manufacturing a semiconductor device includes forming an interconnect member, mounting a first semiconductor chip having a semiconductor substrate in a face-down manner on the interconnect member, forming a resin layer on the interconnect member to cover a side surface of the first semiconductor chip, thinning the first semiconductor chip and the resin layer, forming an inorganic insulating layer on a back surface of the first semiconductor chip so as to be in contact with the back surface and to extend over the resin layer, and forming a through electrode so as to penetrate the inorganic insulating layer and the semiconductor substrate.

摘要翻译： 一种制造半导体器件的方法包括形成互连部件，将具有半导体衬底的第一半导体芯片以面向下的方式安装在互连部件上，在互连部件上形成树脂层以覆盖第一半导体的侧表面 芯片，使第一半导体芯片和树脂层变薄，在第一半导体芯片的背面上形成无机绝缘层，以与背面接触并延伸到树脂层上，并形成通孔，从而形成通孔 以穿透无机绝缘层和半导体衬底。

公开(公告)号：US20080128916A1

公开(公告)日：2008-06-05

申请号：US11987624

申请日：2007-12-03

申请人： Koji Soejima ,  Masaya Kawano ,  Yoichiro Kurita

发明人： Koji Soejima ,  Masaya Kawano ,  Yoichiro Kurita

IPC分类号： H01L23/48

CPC分类号： H01L23/3128 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3135 ,  H01L23/66 ,  H01L24/97 ,  H01L25/0657 ,  H01L2223/6627 ,  H01L2224/16145 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2224/97 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06572 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/18161 ,  H01L2924/19032 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2224/81 ,  H01L2224/0401

摘要： Provided is a semiconductor device including an interconnect substrate, a transmission line which is formed on the interconnect substrate, and a circuit component which is mounted over the interconnect substrate and has a ground plane. The transmission line includes a first portion and a second portion that is connected to the first portion. The first portion and the ground plane constitute a microstrip line. The second portion and ground line constitute a coplanar line.

摘要翻译： 提供了一种半导体器件，包括互连衬底，形成在互连衬底上的传输线，以及安装在互连衬底上并具有接地面的电路部件。 传输线包括连接到第一部分的第一部分和第二部分。 第一部分和接地平面构成微带线。 第二部分和地线构成共面线。

公开(公告)号：US20080079164A1

公开(公告)日：2008-04-03

申请号：US11865750

申请日：2007-10-02

申请人： Yoichiro KURITA ,  Koji Soejima ,  Masaya Kawano

发明人： Yoichiro KURITA ,  Koji Soejima ,  Masaya Kawano

IPC分类号： H01L23/52 ,  H01L21/4763

CPC分类号： H01L23/3128 ,  H01L21/4857 ,  H01L21/6835 ,  H01L23/3135 ,  H01L23/5389 ,  H01L25/0652 ,  H01L25/18 ,  H01L2221/68345 ,  H01L2224/0554 ,  H01L2224/05573 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81005 ,  H01L2224/83005 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19105 ,  H05K3/0058 ,  H05K3/284 ,  H05K3/4682 ,  H05K2201/0195 ,  H05K2201/09527 ,  H05K2201/096 ,  H05K2201/09972 ,  H05K2203/016 ,  H05K2203/0733 ,  H05K2203/1469 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： The electronic device includes a first interconnect layer and a second interconnect layer. The second interconnect layer is provided on the lower surface of the first interconnect layer. The first interconnect layer includes a via plug (first conductive plug). An end face of the via plug on the side of the second interconnect layer is smaller in area than the opposite end face. The via plug is exposed on the surface of the first interconnect layer facing the second interconnect layer. An insulating resin forming the first interconnect layer is higher in thermal decomposition temperature than an insulating resin forming the second interconnect layer.

摘要翻译： 电子设备包括第一互连层和第二互连层。 第二互连层设置在第一互连层的下表面上。 第一互连层包括通孔插头（第一导电插头）。 通孔塞在第二互连层一侧的端面的面积小于相对端面。 通孔插头暴露在面向第二互连层的第一互连层的表面上。 形成第一互连层的绝缘树脂的热分解温度高于形成第二互连层的绝缘树脂。

公开(公告)号：US20080079157A1

公开(公告)日：2008-04-03

申请号：US11856730

申请日：2007-09-18

申请人： Yoichiro Kurita ,  Koji Soejima ,  Masaya Kawano

发明人： Yoichiro Kurita ,  Koji Soejima ,  Masaya Kawano

IPC分类号： H01L23/48 ,  H01L21/56

CPC分类号： H01L23/3128 ,  H01L21/4857 ,  H01L21/6835 ,  H01L23/3135 ,  H01L23/5389 ,  H01L25/0652 ,  H01L25/18 ,  H01L2221/68345 ,  H01L2224/0554 ,  H01L2224/05573 ,  H01L2224/13025 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19105 ,  H05K3/0058 ,  H05K3/284 ,  H05K3/4682 ,  H05K2201/0195 ,  H05K2201/09527 ,  H05K2201/09972 ,  H05K2203/016 ,  H05K2203/1469 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： The electronic device includes a first interconnect layer and a second interconnect layer. The second interconnect layer is provided on the lower surface of the first interconnect layer. The first interconnect layer includes a via plug (first conductive plug). An end face of the via plug on the side of the second interconnect layer is smaller in area than the opposite end face. The via plug is exposed on the surface of the first interconnect layer facing the second interconnect layer. An insulating resin forming the first interconnect layer is higher in thermal decomposition temperature than an insulating resin forming the second interconnect layer.

公开(公告)号：US08685796B2

公开(公告)日：2014-04-01

申请号：US11856730

申请日：2007-09-18

申请人： Yoichiro Kurita ,  Koji Soejima ,  Masaya Kawano

发明人： Yoichiro Kurita ,  Koji Soejima ,  Masaya Kawano

IPC分类号： H01L21/44

CPC分类号： H01L23/3128 ,  H01L21/4857 ,  H01L21/6835 ,  H01L23/3135 ,  H01L23/5389 ,  H01L25/0652 ,  H01L25/18 ,  H01L2221/68345 ,  H01L2224/0554 ,  H01L2224/05573 ,  H01L2224/13025 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19105 ,  H05K3/0058 ,  H05K3/284 ,  H05K3/4682 ,  H05K2201/0195 ,  H05K2201/09527 ,  H05K2201/09972 ,  H05K2203/016 ,  H05K2203/1469 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： The electronic device includes a first interconnect layer and a second interconnect layer. The second interconnect layer is provided on the lower surface of the first interconnect layer. The first interconnect layer includes a via plug (first conductive plug). An end face of the via plug on the side of the second interconnect layer is smaller in area than the opposite end face. The via plug is exposed on the surface of the first interconnect layer facing the second interconnect layer. An insulating resin forming the first interconnect layer is higher in thermal decomposition temperature than an insulating resin forming the second interconnect layer.

摘要翻译： 电子设备包括第一互连层和第二互连层。 第二互连层设置在第一互连层的下表面上。 第一互连层包括通孔插头（第一导电插头）。 通孔塞在第二互连层一侧的端面的面积小于相对端面。 通孔插头暴露在面向第二互连层的第一互连层的表面上。 形成第一互连层的绝缘树脂的热分解温度高于形成第二互连层的绝缘树脂。

公开(公告)号：US07927999B2

公开(公告)日：2011-04-19

申请号：US11393686

申请日：2006-03-31

申请人： Yoichiro Kurita ,  Masaya Kawano ,  Koji Soejima

发明人： Yoichiro Kurita ,  Masaya Kawano ,  Koji Soejima

IPC分类号： H01L21/4763

CPC分类号： H01L23/3128 ,  H01L21/563 ,  H01L21/6835 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/81 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2221/68363 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/83005 ,  H01L2224/83051 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/06582 ,  H01L2225/06586 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/18161 ,  H01L2924/19041 ,  H05K3/4644 ,  H05K3/4676 ,  H05K3/4688 ,  Y10T29/4913 ,  H01L2924/00 ,  H01L2224/0401

摘要： The semiconductor device 1 includes interconnect layers 10, 20, an IC chip 30, via plugs 42, 44, a seal resin 50, and solder balls 60. The interconnect layer 10 includes a via plug 42. An end face of the via plug 42 on the side of the interconnect layer 20 is smaller in area than the opposite end face, i.e. the end face on the side of the IC chip 30. An end face of the via plug 44 on the side of the interconnect layer 10 is smaller in area than the opposite end face, i.e. the end face on the side of the solder balls 60. The thermal decomposition temperature of the insulating resin 14 constituting the interconnect layer 10 is higher than that of the insulating resin 24 constituting the interconnect layer 20.

摘要翻译： 半导体器件1包括互连层10,20，IC芯片30，经由插头42,44，密封树脂50和焊球60.互连层10包括通孔塞42.通孔插塞42的端面 在互连层20一侧的面积比相对端面即IC芯片30一侧的端面的面积小。在互连层10一侧的通路插塞44的端面较小 构成互连层10的绝缘树脂14的热分解温度高于构成互连层20的绝缘树脂24的热分解温度。

公开(公告)号：US07652375B2

公开(公告)日：2010-01-26

申请号：US11790155

申请日：2007-04-24

申请人： Koji Soejima ,  Yoichiro Kurita ,  Masaya Kawano ,  Shintaro Yamamichi ,  Katsumi Kikuchi

发明人： Koji Soejima ,  Yoichiro Kurita ,  Masaya Kawano ,  Shintaro Yamamichi ,  Katsumi Kikuchi

IPC分类号： H01L23/48 ,  H01L23/52

CPC分类号： H01L21/563 ,  H01L21/6835 ,  H01L24/81 ,  H01L25/0657 ,  H01L2221/68345 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/1147 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2225/06572 ,  H01L2225/06586 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01021 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/014 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A first electronic circuit component and a second electronic circuit component are electrically connected to an electro-conductive member via a first solder and a second solder, respectively. The electro-conductive member is formed in a resin film. The electro-conductive member is configured as containing a second diffusion barrier metal film. The second diffusion barrier metal film prevents diffusion of the second solder. Between the electro-conductive member and the first solder, a first diffusion barrier metal film is provided. The first diffusion barrier metal film prevents diffusion of the first solder. On the first surface of the resin film and on the electro-conductive member, an adhesive metal film is formed so as to contact with the resin film and the electro-conductive member. The adhesive metal film has stronger adhesiveness to the resin film than either of those of the first solder and the first diffusion barrier metal film.

摘要翻译： 第一电子电路部件和第二电子电路部件分别经由第一焊料和第二焊料电连接到导电部件。 导电构件形成在树脂膜中。 导电构件被构造成包含第二扩散阻挡金属膜。 第二扩散阻挡金属膜防止第二焊料的扩散。 在导电构件和第一焊料之间设置有第一扩散阻挡金属膜。 第一扩散阻挡金属膜防止第一焊料的扩散。 在树脂膜的第一表面和导电部件上形成粘接金属膜，以与树脂膜和导电部件接触。 粘合金属膜比第一焊料和第一扩散阻挡金属膜中的任一种具有比树脂膜更强的粘附性。

公开(公告)号：US07495345B2

公开(公告)日：2009-02-24

申请号：US11543084

申请日：2006-10-05

申请人： Yoichiro Kurita ,  Koji Soejima ,  Masaya Kawano

发明人： Yoichiro Kurita ,  Koji Soejima ,  Masaya Kawano

IPC分类号： H01L23/28

CPC分类号： H01L25/0657 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/49838 ,  H01L24/28 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06582 ,  H01L2225/06586 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/00

摘要： A semiconductor device-composing substrate 10 has a support base 12, an interconnect layer 14 including interconnects 13, and an insulating resin layer 16. The semiconductor device-composing substrate 10 also has a mounting region D1 on which a semiconductor chip 30 is to be mounted. The insulating resin layer 16 is formed on the interconnect layer 14. Chip-connecting electrodes 17, external electrode pads 18 and the resin stopper patterns 19 are formed in the insulating resin layer 16. The chip-connecting electrodes 17 are provided in the mounting region D1. The external electrode pads 18 are provided outside the mounting region D1. The resin stopper patterns 19 are provided between the mounting region D1 and the external electrode pads 18.

摘要翻译： 半导体器件组成基板10具有支撑基底12，包括互连件13的互连层14和绝缘树脂层16.半导体器件组成基板10还具有安装区域D1，半导体芯片30将被安装在其上 安装。 绝缘树脂层16形成在互连层14上。芯片连接电极17，外部电极焊盘18和树脂阻挡图案19形成在绝缘树脂层16中。芯片连接电极17设置在安装区域 D1。 外部电极焊盘18设置在安装区域D1的外侧。 树脂止挡图案19设置在安装区域D1和外部电极焊盘18之间。