公开(公告)号：US20030001207A1

公开(公告)日：2003-01-02

申请号：US09859700

申请日：2001-05-16

Applicant: Motorola, Inc.

Inventor： Jamal Ramdani ,  Alexander A. Demkov ,  Lyndee L. Hilt

IPC: H01L027/01

CPC classification number: C30B25/18 ,  H01L21/0237 ,  H01L21/02381 ,  H01L21/02439 ,  H01L21/02447 ,  H01L21/0245 ,  H01L21/02458 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02513 ,  H01L21/02521 ,  H01L21/02538 ,  H01L21/0254

Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. One way to achieve the formation of a compliant substrate includes first growing an accommodating buffer layer on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. In addition, formation of a compliant substrate may include utilizing surfactant enhanced epitaxy, epitaxial growth of single crystal silicon onto single crystal oxide, and epitaxial growth of Zintl phase materials.

Abstract translation: 通过形成用于生长单晶层的柔性衬底，可以将单晶材料的高质量外延层生长在覆盖单晶衬底（例如大硅晶片）上。 实现顺应性衬底的形成的一种方式包括首先在硅晶片上生长容纳缓冲层。 容纳缓冲层是通过氧化硅的非晶界面层与硅晶片间隔开的单晶氧化物层。 非晶界面层消耗应变并允许高质量单晶氧化物容纳缓冲层的生长。 容纳缓冲层与下面的硅晶片和上覆的单晶材料层晶格匹配。 通过非晶界面层处理容纳缓冲层和底层硅衬底之间的任何晶格失配。 此外，顺应性衬底的形成可以包括利用表面活性剂增强的外延，将单晶硅外延生长到单晶氧化物上，以及Zintl相材料的外延生长。

公开(公告)号：US20020149023A1

公开(公告)日：2002-10-17

申请号：US10161743

申请日：2002-06-05

Applicant: MOTOROLA, INC.

Inventor： Lyndee L. Hilt ,  Jamal Ramdani

IPC: H01L031/12

CPC classification number: H01L21/0254 ,  H01L21/02381 ,  H01L21/02439 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02639 ,  H01L21/02647

Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying large silicon wafers by first growing an accommodating buffer layer (202) on a silicon substrate (200). The accommodating buffer layer (202) is a layer of monocrystalline material spaced apart from the silicon substrate (200) by an amorphous interface layer (204) of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline accommodating buffer layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. Utilizing this technique permits the fabrication of semiconductor structures formed by high quality Group III-V nitride films.

Abstract translation: 通过首先在硅衬底（200）上生长容纳缓冲层（202），可以将高质量的单晶材料外延层生长在大的硅晶片上。 容纳缓冲层（202）是通过氧化硅的非晶界面层（204）与硅衬底（200）间隔开的单晶材料层。 非晶界面层消耗应变并允许高质量单晶容纳缓冲层的生长。 通过非晶界面层处理容纳缓冲层和底层硅衬底之间的任何晶格失配。 利用这种技术允许制造由高质量III-V族氮化物膜形成的半导体结构。

公开(公告)号：US20020096683A1

公开(公告)日：2002-07-25

申请号：US09766046

申请日：2001-01-19

Applicant: Motorola, Inc.

Inventor： Jamal Ramdani ,  Lyndee L. Hilt

IPC: H01L031/0256 ,  H01L023/58

CPC classification number: H01L21/02197 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/02293 ,  H01L21/02356 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02513 ,  H01L21/02521 ,  H01L21/0254 ,  H01L21/31691 ,  H01L21/3185 ,  H01L33/007

Abstract: High quality epitaxial layers of GaN can be grown overlying large silicon wafers (200) by forming an amorphous layer (210) on the substrate. The amorphous layer dissipates strain and permits the growth of a high quality GaN layer (208). Any lattice mismatch between the GaN layer and the underlying substrate is taken care of by the amorphous layer.

Abstract translation: 通过在衬底上形成非晶层（210），可以将GaN的高质量外延层生长在大的硅晶片（200）上。 非晶层消散应变并允许生长高质量的GaN层（208）。 通过非晶层处理GaN层和下层衬底之间的任何晶格失配。

公开(公告)号：US20020074624A1

公开(公告)日：2002-06-20

申请号：US10076450

申请日：2002-02-19

Applicant: MOTOROLA, INC.

Inventor： Jamal Ramdani ,  Ravindranath Droopad ,  Lyndee L. Hilt ,  Kurt William Eisenbeiser

IPC: H01L023/58

CPC classification number: H01S5/0261 ,  C30B25/18 ,  H01L21/02197 ,  H01L21/02271 ,  H01L21/0228 ,  H01L21/02381 ,  H01L21/02433 ,  H01L21/02439 ,  H01L21/02472 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02507 ,  H01L21/02513 ,  H01L21/02521 ,  H01L21/02543 ,  H01L21/02546 ,  H01L21/02557 ,  H01L21/0256 ,  H01L21/31691 ,  H01L21/8252 ,  H01L21/8258 ,  H01L27/0605 ,  H01L27/15 ,  H01L33/16 ,  H01L33/30 ,  H01L2924/0002 ,  H01S5/021 ,  H01L2924/00

Abstract: High quality epitaxial layers of compound semiconductor materials can be grown overlying large silicon wafers by first growing an accommodating buffer layer on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline compound semiconductor layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer.

公开(公告)号：US20020003238A1

公开(公告)日：2002-01-10

申请号：US09824376

申请日：2001-04-02

Applicant: Motorola, Inc.

Inventor： Jamal Ramdani ,  Lyndee L. Hilt

IPC: H01L031/0328

CPC classification number: C30B25/18 ,  C23C16/26 ,  C30B25/02 ,  C30B29/04 ,  H01L21/02378 ,  H01L21/02381 ,  H01L21/02439 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02513 ,  H01L21/31691 ,  H01L21/318 ,  H01L21/76801 ,  H01L21/76825 ,  H01L21/76828 ,  H01L21/76829 ,  H01L21/8221 ,  H01L21/8258 ,  H01L23/66 ,  H01L27/0605 ,  H01L2924/0002 ,  H01L2924/00

Abstract: High quality cubic boron nitride layers can be grown overlying monocrystalline substrates (102) such as large silicon wafers by forming a compliant substrate for growing the nitride layer. One way to achieve the formation of a compliant substrate includes first growing an accommodating buffer layer (104) on a silicon wafer (102). The accommodating buffer layer (104) is a layer of monocrystalline oxide spaced apart from the silicon wafer (102) by an amorphous interface layer of silicon oxide (108). The amorphous interface layer (108) dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer (104).

Abstract translation: 可以通过形成用于生长氮化物层的顺应性衬底，将高质量的立方氮化硼层生长在覆盖单晶衬底（102），例如大硅晶片上。 实现顺应性衬底的形成的一种方法包括首先在硅晶片（102）上生长容纳缓冲层（104）。 容纳缓冲层（104）是通过氧化硅（108）的非晶界面层与硅晶片（102）间隔开的单晶氧化物层。 非晶界面层（108）耗散应变并允许高质量单晶氧化物容纳缓冲层（104）的生长。

公开(公告)号：US20040150076A1

公开(公告)日：2004-08-05

申请号：US10767998

申请日：2004-02-02

Applicant: MOTOROLA, INC.

Inventor： Jamal Ramdani ,  Ravindranath Droopad ,  Lyndee L. Hilt ,  Kurt William Einsebeiser

IPC: H01L023/58

CPC classification number: H01S5/0261 ,  C30B25/18 ,  H01L21/02197 ,  H01L21/02271 ,  H01L21/0228 ,  H01L21/02381 ,  H01L21/02433 ,  H01L21/02439 ,  H01L21/02472 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02507 ,  H01L21/02513 ,  H01L21/02521 ,  H01L21/02543 ,  H01L21/02546 ,  H01L21/02557 ,  H01L21/0256 ,  H01L21/31691 ,  H01L21/8252 ,  H01L21/8258 ,  H01L27/0605 ,  H01L27/15 ,  H01L33/16 ,  H01L33/30 ,  H01L2924/0002 ,  H01S5/021 ,  H01L2924/00

Abstract: High quality epitaxial layers of compound semiconductor materials can be grown overlying large silicon wafers by first growing an accommodating buffer layer on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline compound semiconductor layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer.

公开(公告)号：US20040149203A1

公开(公告)日：2004-08-05

申请号：US10768108

申请日：2004-02-02

Applicant: MOTOROLA, INC.

Inventor： Jamal Ramdani ,  Ravindranath Droopad ,  Lyndee L. Hilt ,  Kurt William Eisenbeiser

IPC: C30B023/00 ,  C30B025/00 ,  C30B028/12 ,  C30B028/14

CPC classification number: H01S5/0261 ,  C30B25/18 ,  H01L21/02381 ,  H01L21/02433 ,  H01L21/02439 ,  H01L21/02472 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02507 ,  H01L21/02513 ,  H01L21/02521 ,  H01L21/02543 ,  H01L21/02546 ,  H01L21/02557 ,  H01L21/0256 ,  H01L21/31691 ,  H01L21/8252 ,  H01L21/8258 ,  H01L27/0605 ,  H01L27/15 ,  H01L33/16 ,  H01L33/30 ,  H01L2924/0002 ,  H01S5/021 ,  H01L2924/00

Abstract: High quality epitaxial layers of compound semiconductor materials can be grown overlying large silicon wafers by first growing an accommodating buffer layer on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline compound semiconductor layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer.

公开(公告)号：US20030017624A1

公开(公告)日：2003-01-23

申请号：US09909937

申请日：2001-07-23

Applicant: MOTOROLA, INC.

Inventor： Joyce Yamamoto ,  Lyndee L. Hilt

IPC: H01L021/00

CPC classification number: H01L21/02488 ,  C30B25/18 ,  H01L21/02381 ,  H01L21/02505 ,  H01L21/02513 ,  H01L21/02521 ,  H01L21/31691 ,  H01L21/8258

Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. In addition, formation of a compliant substrate may include utilizing a controlled passivation layer during processing.

Abstract translation: 通过形成用于生长单晶层的柔性衬底，可以将单晶材料的高质量外延层生长在覆盖单晶衬底（例如大硅晶片）上。 容纳缓冲层包括通过硅氧化物的非晶界面层与硅晶片间隔开的单晶氧化物层。 非晶界面层消耗应变并允许高质量单晶氧化物容纳缓冲层的生长。 容纳缓冲层与下面的硅晶片和上覆的单晶材料层晶格匹配。 通过非晶界面层处理容纳缓冲层和底层硅衬底之间的任何晶格失配。 此外，顺应性衬底的形成可以包括在处理期间利用受控的钝化层。

公开(公告)号：US20020003239A1

公开(公告)日：2002-01-10

申请号：US09824615

申请日：2001-04-02

Applicant: Motorola, Inc.

Inventor： Jamal Ramdani ,  Lyndee L. Hilt

IPC: H01L031/0328

CPC classification number: H01L21/02488 ,  C23C16/26 ,  C30B25/02 ,  C30B25/18 ,  C30B29/04 ,  H01L21/02378 ,  H01L21/02381 ,  H01L21/02439 ,  H01L21/02491 ,  H01L21/02505 ,  H01L21/0251 ,  H01L21/02513 ,  H01L21/02527 ,  H01L21/0405 ,  H01L21/31691 ,  H01L21/318 ,  H01L21/8221 ,  H01L21/8258 ,  H01L23/66 ,  H01L27/0605 ,  H01L2924/0002 ,  H01L2924/00

Abstract: High quality carbon layers such as diamond or diamond-like carbon (108) can be grown overlying monocrystalline substrates (102) such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. One way to achieve the formation of a compliant substrate includes first growing an accommodating buffer layer (104) on a silicon wafer (102). The accommodating buffer layer (104) is a layer of monocrystalline oxide spaced apart from the silicon wafer (102) by an amorphous interface layer of silicon oxide (110). The amorphous interface layer (110) dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer (104).

Abstract translation: 通过形成用于生长单晶层的顺应性衬底，可以生长高质量的碳层，例如金刚石或类金刚石碳（108），覆盖单晶衬底（102），例如大的硅晶片。 实现顺应性衬底的形成的一种方法包括首先在硅晶片（102）上生长容纳缓冲层（104）。 容纳缓冲层（104）是通过氧化硅（110）的非晶界面层与硅晶片（102）间隔开的单晶氧化物层。 非晶界面层（110）耗散应变并允许高质量单晶氧化物容纳缓冲层（104）的生长。

公开(公告)号：US20040232525A1

公开(公告)日：2004-11-25

申请号：US10878225

申请日：2004-06-29

Applicant: MOTOROLA, INC.

Inventor： Jamal Ramdani ,  Ravindranath Droopad ,  Lyndee L. Hilt ,  Kurt William Eisenbeiser

IPC: H01L021/331

CPC classification number: H01S5/0261 ,  C30B25/18 ,  H01L21/02197 ,  H01L21/02271 ,  H01L21/0228 ,  H01L21/02381 ,  H01L21/02433 ,  H01L21/02439 ,  H01L21/02472 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02507 ,  H01L21/02513 ,  H01L21/02521 ,  H01L21/02543 ,  H01L21/02546 ,  H01L21/02557 ,  H01L21/0256 ,  H01L21/31691 ,  H01L21/8252 ,  H01L21/8258 ,  H01L27/0605 ,  H01L27/15 ,  H01L33/16 ,  H01L33/30 ,  H01L2924/0002 ,  H01S5/021 ,  H01L2924/00

Abstract: High quality epitaxial layers of compound semiconductor materials can be grown overlying large silicon wafers by first growing an accommodating buffer layer on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline compound semiconductor layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer.

Abstract translation: 通过首先在硅晶片上生长容纳缓冲层，可以将复合半导体材料的高质量外延层生长在大的硅晶片上。 容纳缓冲层是通过氧化硅的非晶界面层与硅晶片间隔开的单晶氧化物层。 非晶界面层消耗应变并允许高质量单晶氧化物容纳缓冲层的生长。 容纳缓冲层与下面的硅晶片和上覆的单晶化合物半导体层晶格匹配。 通过非晶界面层处理容纳缓冲层和底层硅衬底之间的任何晶格失配。