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18 条记录 (耗时 0.028 秒)

    Light transport ship
    3.
    发明授权
    Light transport ship 失效
    大型运输船

    公开(公告)号：US06769372B2

    公开(公告)日：2004-08-03

    申请号：US10232465

    申请日：2002-08-30

    申请人： Kazunori Sato ,  Katsuyoshi Takekuma ,  Takehito Tomoi ,  Kenichi Inoue ,  Shigeo Ohnishi

    发明人： Kazunori Sato ,  Katsuyoshi Takekuma ,  Takehito Tomoi ,  Kenichi Inoue ,  Shigeo Ohnishi

    IPC分类号： B63B300

    CPC分类号： B63B11/04 ,  B63B1/04 ,  B63B43/10

    摘要： The present invention provides a large transport ship in which the shape of a ship bottom 1a from a bow 1h to a stern 1t, when viewed on a cross-section perpendicular to the longitudinal direction of the ship bottom 1a, is tapered towards the center CL of the ship bottom in the widthwise direction. Consequently, it is possible to resolve problems associated with changes in the draft corresponding to the state of the load, without using ballast water.

    摘要翻译： 本发明提供一种大型运输船，其中当从与船底1a的纵向方向垂直的横截面观察时，从船首1h至船尾1t的船底1a的形状朝向中心CL逐渐变细 的船底沿宽度方向。 因此，可以在不使用压载水的情况下解决与负载状态对应的草图的变化相关联的问题。

    Nonvolatile semiconductor memory device
    4.
    发明授权
    Nonvolatile semiconductor memory device 有权
    非易失性半导体存储器件

    公开(公告)号：US07952909B2

    公开(公告)日：2011-05-31

    申请号：US12517025

    申请日：2007-11-05

    申请人： Kohji Inoue ,  Yasunari Hosoi ,  Shigeo Ohnishi ,  Nobuyoshi Awaya

    发明人： Kohji Inoue ,  Yasunari Hosoi ,  Shigeo Ohnishi ,  Nobuyoshi Awaya

    IPC分类号： G11C11/00

    CPC分类号： G11C13/0007 ,  G11C13/0026 ,  G11C13/0038 ,  G11C13/0069 ,  G11C2013/009 ,  G11C2213/15 ,  G11C2213/32 ,  G11C2213/34 ,  G11C2213/72 ,  G11C2213/77 ,  G11C2213/79 ,  H01L27/101 ,  H01L27/1021 ,  H01L27/2409 ,  H01L27/2436 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/146 ,  H01L45/1633

    摘要： Provided is a nonvolatile semiconductor device capable of performing writing operations of different resistance changes for memory cells having variable resistive elements whose resistive characteristics are changed by voltage applications, individually and simultaneously. The device includes: a load resistive characteristic variable circuit for each bit line connected commonly with the memory cells on the same column for selecting one of two load resistive characteristics according to a first writing operation where the resistive characteristics of the variable resistive element to be written transit from a low resistance state to a high resistance state or a second writing operation where they transit reversely; and a writing voltage pulse application circuit for applying a first voltage pulse in a first writing operation and a second voltage pulse in a second writing operation to the memory cells to be written through the load resistive characteristic variable circuits and the bit limes.

    摘要翻译： 提供了一种非易失性半导体器件，其能够对具有可变电阻元件的存储单元进行不同的电阻变化的写入操作，该电阻元件的电阻特性单独并同时由电压应用而改变。 该装置包括：用于与同一列上的存储器单元共同连接的每个位线的负载电阻特性可变电路，用于根据要写入的可变电阻元件的电阻特性的第一写入操作来选择两个负载电阻特性中的一个 从低电阻状态转移到高电阻状态或其反向转发的第二写入操作; 以及写入电压脉冲施加电路，用于将第一写入操作中的第一电压脉冲和第二写入操作中的第二电压脉冲施加到要通过负载电阻特性可变电路和位灰分写入的存储单元。

    Method of fabricating semiconductor memory device
    9.
    发明授权
    Method of fabricating semiconductor memory device 有权
    制造半导体存储器件的方法

    公开(公告)号：US6153460A

    公开(公告)日：2000-11-28

    申请号：US470990

    申请日：1999-12-23

    申请人： Shigeo Ohnishi ,  Nobuyuki Takenaka ,  Katsuji Iguchi

    发明人： Shigeo Ohnishi ,  Nobuyuki Takenaka ,  Katsuji Iguchi

    IPC分类号： H01L21/302 ,  H01L21/02 ,  H01L21/3065 ,  H01L21/768 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108 ,  H01L21/8234

    CPC分类号： H01L27/10852 ,  H01L28/55 ,  H01L28/60 ,  H01L28/75

    摘要： A method of fabricating a semiconductor memory device comprises the steps of: (a) forming an interlayer insulating film on a semiconductor substrate, opening a contact hole in said interlayer insulating film, and burying a plug in said contact hole; (b) forming a first insulating film on said interlayer insulating film inclusive of said plug, and forming a trench in said first insulating film above said plug; (c) forming a first conductive film on said first insulating film inclusive of said trench, and etching back said first conductive film by a chemical mechanical polishing method to form a bottom electrode inside said trench; (d) forming a high dielectric film or a ferroelectric film and a second conductive film in this order on said first insulating film inclusive of said bottom electrode; and (e) patterning simultaneously said high dielectric film or ferroelectric film and said second conductive film to form a capacitor insulating film and a top electrode.

    摘要翻译： 一种制造半导体存储器件的方法包括以下步骤：（a）在半导体衬底上形成层间绝缘膜，打开所述层间绝缘膜中的接触孔，并将插塞埋入所述接触孔中; （b）在包括所述插头的所述层间绝缘膜上形成第一绝缘膜，并且在所述插头上方的所述第一绝缘膜中形成沟槽; （c）在包括所述沟槽的所述第一绝缘膜上形成第一导电膜，并通过化学机械抛光方法蚀刻所述第一导电膜，以在所述沟槽内部形成底电极; （d）在包括所述底部电极的所述第一绝缘膜上依次形成高电介质膜或铁电体膜和第二导电膜; 和（e）同时形成所述高电介质膜或铁电体膜和所述第二导电膜以形成电容器绝缘膜和顶部电极。