公开(公告)号：US06215191B1

公开(公告)日：2001-04-10

申请号：US09281460

申请日：1999-03-30

申请人： Masud Beroz ,  Konstantine Karavakis ,  Thomas H. DiStefano

发明人： Masud Beroz ,  Konstantine Karavakis ,  Thomas H. DiStefano

IPC分类号： H01L2348

CPC分类号： H01L21/4821 ,  H01L23/49579 ,  H01L24/50 ,  H01L2924/12042 ,  H01L2924/351 ,  H01L2924/00

摘要： A method of treating a lead in a chip package. A conductive lead is positioned such that it extends across a gap in a dielectric substrate and is secured at either end to a first surface of the substrate. Directed energy is then applied to a desired portion of the surface of the lead within the gap. As a result of the application of energy, a surface layer of the lead is recrystallized thereby creating a fine grain, dense surface layer of lead material. Surface contaminates may be vaporized and contaminants at the grain boundaries of the recrystallized surface layers may be driven away from the grain boundaries such that a treated lead is more ductile and has better resistance to thermal cycling after the lead has been attached to a chip contact.

摘要翻译： 一种处理芯片封装中的引线的方法。 导电引线定位成使得其延伸穿过电介质基板中的间隙，并且在任一端固定到基板的第一表面。 然后将定向能量施加到间隙内的引线表面的期望部分。 作为施加能量的结果，铅的表面层被再结晶，从而形成细晶粒，致密的铅材料表面层。 表面污染物可能被蒸发，并且再结晶表面层的晶界处的污染物可能被驱离离开晶界，使得处理的引线更具延展性，并且在引线已经附着到芯片接触之后具有更好的耐热循环性。

公开(公告)号：US5966592A

公开(公告)日：1999-10-12

申请号：US560272

申请日：1995-11-21

申请人： Masud Beroz ,  Konstantine Karavakis ,  Thomas H. Distefano

发明人： Masud Beroz ,  Konstantine Karavakis ,  Thomas H. Distefano

IPC分类号： H01L21/48 ,  H01L23/495 ,  H01L21/44

CPC分类号： H01L21/4821 ,  H01L23/49579 ,  H01L24/50 ,  H01L2924/12042 ,  H01L2924/351

摘要： A method of treating a lead in a chip package. A conductive lead is positioned such that it extends across a gap in a dielectric substrate and is secured at either end to a first surface of the substrate. Directed energy is then applied to a desired portion of the surface of the lead within the gap. As a result of the application of energy, a surface layer of the lead is recrystallized thereby creating a fine grain, dense surface layer of lead material. Surface contaminates may be vaporized and contaminants at the grain boundaries of the recrystallized surface layers may be driven away from the grain boundaries such that a treated lead is more ductile and has better resistance to thermal cycling after the lead has been attached to a chip contact.

摘要翻译： 一种处理芯片封装中的引线的方法。 导电引线定位成使得其延伸穿过电介质基板中的间隙，并且在任一端固定到基板的第一表面。 然后将定向能量施加到间隙内的引线表面的期望部分。 作为施加能量的结果，铅的表面层被再结晶，从而形成细晶粒，致密的铅材料表面层。 表面污染物可能被蒸发，并且再结晶表面层的晶界处的污染物可能被驱离离开晶界，使得处理的引线更具延展性，并且在引线已经附着到芯片接触之后具有更好的耐热循环性。

公开(公告)号：US5776796A

公开(公告)日：1998-07-07

申请号：US726697

申请日：1996-10-07

申请人： Thomas H. Distefano ,  John W. Smith ,  Joseph Fjelstad ,  Craig S. Mitchell ,  Konstantine Karavakis

发明人： Thomas H. Distefano ,  John W. Smith ,  Joseph Fjelstad ,  Craig S. Mitchell ,  Konstantine Karavakis

IPC分类号： H01L21/56 ,  H01L21/68 ,  H01L23/24 ,  H01L23/31 ,  H01L23/495 ,  H01L21/44

CPC分类号： H01L21/568 ,  H01L21/56 ,  H01L21/565 ,  H01L21/6835 ,  H01L23/24 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/49572 ,  H01L24/32 ,  H01L24/50 ,  H01L24/97 ,  H01L2224/11003 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2224/97 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01058 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/12042

摘要： A method of encapsulating a semiconductor device. The encapsulation method includes a semiconductor chip package assembly having a spacer layer between a top surface of a sheet-like substrate and a contact bearing surface of a semiconductor chip, wherein the substrate has conductive leads thereon, the leads being electrically connected to terminals on a first end and bonded to respective chip contacts on a second end. Typically, the spacer layer is comprised of a compliant or elastomeric material. A protective layer is attached on a bottom surface of the substrate so as to cover the terminals on the substrate. A flowable, curable encapsulant material is deposited around a periphery of the semiconductor chip after the attachment of the protective layer so as to encapsulate the leads. The encapsulant material is then cured. Typically, this encapsulation method is performed on a plurality of chip assemblies simultaneously.

摘要翻译： 一种封装半导体器件的方法。 封装方法包括：半导体芯片封装组件，其具有在片状基板的顶表面和半导体芯片的接触支承表面之间的间隔层，其中，所述基板在其上具有导电引线，所述引线电连接到 第一端并且在第二端上结合到各个芯片触点。 通常，间隔层由顺应性或弹性体材料构成。 保护层附着在基板的底面，以覆盖基板上的端子。 在安装保护层以便封装引线之后，可流动的可固化的密封剂材料围绕半导体芯片的周边沉积。 然后固化密封材料。 通常，这种封装方法同时在多个芯片组件上执行。

公开(公告)号：US5663106A

公开(公告)日：1997-09-02

申请号：US246113

申请日：1994-05-19

申请人： Konstantine Karavakis ,  Thomas H. Distefano ,  John W. Smith, Jr. ,  Craig Mitchell

发明人： Konstantine Karavakis ,  Thomas H. Distefano ,  John W. Smith, Jr. ,  Craig Mitchell

IPC分类号： H01L21/56 ,  H01L21/68 ,  H01L23/24 ,  H01L23/31 ,  H01L21/60

CPC分类号： H01L21/568 ,  H01L21/56 ,  H01L21/6835 ,  H01L23/24 ,  H01L23/3114 ,  H01L24/97 ,  H01L2224/11003 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/3025 ,  Y10T29/49146

摘要： A method of packaging a semiconductor chip assembly includes the encapsulation of the same after establishing an encapsulation area and providing a physical barrier for protecting the terminals of a chip carrier. An alternative or supplement to providing a physical barrier is to provide a preform of an encapsulation material which includes a predetermined volume of such material so that only the encapsulation area is filled. For a semiconductor chip assembly which does not yet have an elastomeric layer, a method of simultaneously forming such an elastomeric layer and encapsulating a semiconductor chip assembly is also provided.

摘要翻译： 封装半导体芯片组件的方法包括在建立封装区域之后对其进行封装，并提供用于保护芯片载体的端子的物理屏障。 提供物理屏障的替代或补充是提供包含材料的预成型件，其包括预定体积的这种材料，使得仅填充封装区域。 对于还没有弹性体层的半导体芯片组件，还提供了同时形成这种弹性体层并封装半导体芯片组件的方法。

公开(公告)号：US5597470A

公开(公告)日：1997-01-28

申请号：US491809

申请日：1995-06-18

申请人： Konstantine Karavakis ,  Thomas H. DiStefano ,  Joseph Fjelstad

发明人： Konstantine Karavakis ,  Thomas H. DiStefano ,  Joseph Fjelstad

IPC分类号： H01L21/48 ,  H01L23/498 ,  H05K3/40 ,  C25D5/02

CPC分类号： H01L23/4985 ,  H01L21/4846 ,  H05K3/4092 ,  H01L2924/0002

摘要： A method for providing a flexible lead for a microelectronic device. A lead such as nickel or a nickel alloy is provided in elongated strips on a base material such as copper, which in turn overlies a dielectric sheet. The base material is etched from beneath bond regions of the lead material strips and a cover layer of a bondable material such as gold selectively provided around the lead material strips. The lead material strips act as plating mandrels, and allow rapid deposition of the cover material. A detachment area may be provided in each lead so that the leads may be detached and displaced within a bonding window in the dielectric sheet for attachment to chip contacts.

摘要翻译： 一种用于为微电子器件提供柔性引线的方法。 诸如镍或镍合金的引线设置在诸如铜的基底材料上的细长条中，其又覆盖在电介质片上。 从铅材料条的接合区下方蚀刻基材，并且可以选择性地设置在引线材料带周围的诸如金的可结合材料的覆盖层。 铅材料条作为电镀心轴，并允许覆盖材料的快速沉积。 可以在每个引线中设置分离区域，使得引线可以在电介质片中的接合窗口内分离和移位以附接到芯片触点。

公开(公告)号：US06897090B2

公开(公告)日：2005-05-24

申请号：US10430986

申请日：2003-05-07

申请人： Thomas H. DiStefano ,  Konstantine Karavakis ,  Craig Mitchell ,  John W. Smith

发明人： Thomas H. DiStefano ,  Konstantine Karavakis ,  Craig Mitchell ,  John W. Smith

IPC分类号： H01L21/56 ,  H01L23/31 ,  H01L21/44

CPC分类号： H01L24/50 ,  H01L21/565 ,  H01L23/3121 ,  H01L2224/50 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  Y10T29/49146 ,  H01L2924/00 ,  H01L2924/00012

摘要： A component incorporating a dielectric element such as a polymeric film with leads and terminals thereon is assembled with a semiconductor chip and bond regions of the leads are connected to contacts of the chip. At least one lead incorporates a plural set of connecting regions connecting the bond region of that lead to a plurality of terminals. One or more of the connecting regions in each such plural set are severed so as to leave less than all of the terminals associated with each such plural set connected to the contacts of the chip.

摘要翻译： 将包含诸如其上具有引线和端子的聚合物膜的电介质元件的部件与半导体芯片组装，并且引线的接合区域连接到芯片的触点。 至少一个引线包括将该引线的键合区域连接到多个端子的多组连接区域。 每个这样的多个组中的一个或多个连接区域被切断，以便留下少于与连接到芯片的触点的每个这样的多个组相关联的所有终端。

公开(公告)号：US06370032B1

公开(公告)日：2002-04-09

申请号：US09399209

申请日：1999-09-17

申请人： Thomas H. DiStefano ,  John W. Smith ,  Zlata Kovac ,  Konstantine Karavakis

发明人： Thomas H. DiStefano ,  John W. Smith ,  Zlata Kovac ,  Konstantine Karavakis

IPC分类号： H05K118

CPC分类号： H01L24/81 ,  H01L21/4839 ,  H01L21/563 ,  H01L23/22 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/4985 ,  H01L23/642 ,  H01L24/72 ,  H01L2224/73203 ,  H01L2224/81801 ,  H01L2224/83136 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/3025 ,  H05K1/118 ,  H05K3/361 ,  H05K3/4084 ,  H05K2201/0133 ,  H05K2201/0394 ,  H05K2201/0397 ,  H05K2201/09081 ,  H05K2201/091 ,  H05K2203/063 ,  Y10T29/49124 ,  Y10T29/49144 ,  Y10T29/49149

摘要： The present invention provides an interconnection scheme having complaint contacts arranged in an array to connect conductive surfaces on a microelectronic device and a supporting substrate, such as a printed circuit board. This invention accommodates for the difference in thermal coefficients of expansion between the device and the supporting substrate. Typically, an area array of conductive contact pads are connected into rows by conductive leads on a flexible, intermediate substrate. Each of the conductive leads bridges a bonding hole in the intermediate substrate which is situated between successive contact pads. Each of the conductive leads further has a frangible portion within or near each bonding hole. A stand-off between the intermediate substrate and the device is create by compliant dielectric pads, typically composed of an elastomer material, positioned under each contact pad. The frangible portions allow the leads to be cleanly broken, bent and secured into electrical contact with chip contacts on the device. Each of these connections may be supported by a compliant layer, typically an uncured elastomer which fills the area around the compliant dielectric pads and is then cured.

摘要翻译： 本发明提供了一种具有布置成阵列中的投诉触点的互连方案，以连接微电子装置上的导电表面和诸如印刷电路板的支撑基板。 本发明适用于器件和支撑衬底之间的热膨胀系数的差异。 通常，导电接触焊盘的区域阵列通过柔性中间衬底上的导电引线连接成行。 每个导电引线桥接位于连续接触焊盘之间的中间衬底中的结合孔。 每个导电引线还在每个结合孔内或附近还具有易碎部分。 中间基板和器件之间的间隔是通过位于每个接触垫下方的通常由弹性体材料组成的柔性介电垫产生的。 易碎部分允许引线被干净地折断，弯曲并固定成与设备上的芯片触点电接触。 这些连接中的每一个可以由柔性层（通常为填充柔性介电垫周围区域的未固化的弹性体）支撑，然后固化。

公开(公告)号：US5629239A

公开(公告)日：1997-05-13

申请号：US408262

申请日：1995-03-21

申请人： Thomas H. DiStefano ,  John W. Smith ,  Konstantine Karavakis ,  Joseph Fjelstad

发明人： Thomas H. DiStefano ,  John W. Smith ,  Konstantine Karavakis ,  Joseph Fjelstad

IPC分类号： H01L21/48 ,  H01L21/60 ,  H01L23/498

CPC分类号： H01L24/86 ,  H01L21/4846 ,  H01L23/4985 ,  H01L23/49861 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01042 ,  H01L2924/01049 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  Y10T29/49121

摘要： A semiconductor chip connection component having numerous leads extending side-by-side across a gap in a support structure, each lead having a frangible section to permit detachment of one end of the lead from the support structure in a bonding process. The frangible sections are formed by treating the lead-forming material in an elongated treatment zone extending across the regions occupied by numerous leads. The process avoids the need for especially fine etching to form notches in the lateral edges of the leads.

摘要翻译： 一种半导体芯片连接部件，其具有多个引线，跨越支撑结构中的间隙并排延伸，每个引线具有易碎部分，以允许引线的一端在接合过程中从支撑结构脱离。 通过在延伸的处理区域中处理引线形成材料形成脆性部分，该处理区域延伸穿过由许多引线占据的区域。 该工艺避免了在引线的侧边缘上特别细蚀刻形成凹口的需要。

公开(公告)号：US07067742B2

公开(公告)日：2006-06-27

申请号：US10033988

申请日：2001-12-28

申请人： Thomas H. DiStefano ,  Joseph Fjelstad ,  Belgacem Haba ,  Owais Jamil ,  Konstantine Karavakis ,  David Light ,  John W. Smith

发明人： Thomas H. DiStefano ,  Joseph Fjelstad ,  Belgacem Haba ,  Owais Jamil ,  Konstantine Karavakis ,  David Light ,  John W. Smith

IPC分类号： H01R12/04 ,  H05K1/11

CPC分类号： H01L24/72 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01016 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/12042 ,  H05K3/4092 ,  Y10T29/49126 ,  Y10T29/49147 ,  Y10T29/49149 ,  H01L2924/00

摘要： A connection component for use in making microelectronic element assemblies which has peelable leads that are formed on a dielectric support structure. One end of each lead is permanently connected to the support structure and the opposite end of the lead is releasably connected to the support structure. When the releasable end of the lead is bonded to a contact on a semiconductor chip, the releasable end of the lead can be peeled from the support structure such that the chip may be moved away from the support structure. A compliant layer may be disposed between the chip and the support structure. If a compliant material is injected between the chip and the support structure to form the compliant layer, the compliant material will lift the chip away from the support structure and facilitate the peeling of the leads from the support structure.

公开(公告)号：US06357112B1

公开(公告)日：2002-03-19

申请号：US09200100

申请日：1998-11-25

申请人： Thomas H. DiStefano ,  Joseph Fjelstad ,  Belgacem Haba ,  Owais Jamil ,  Konstantine Karavakis ,  David Light ,  John W. Smith

发明人： Thomas H. DiStefano ,  Joseph Fjelstad ,  Belgacem Haba ,  Owais Jamil ,  Konstantine Karavakis ,  David Light ,  John W. Smith

IPC分类号： H01R906

CPC分类号： H01L24/72 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01016 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/12042 ,  H05K3/4092 ,  Y10T29/49126 ,  Y10T29/49147 ,  Y10T29/49149 ,  H01L2924/00

摘要： A connection component for use in making microelectronic element assemblies, has peelable leads that are formed on a dielectric support structure. One end of each lead is permanently connected to the support structure and the opposite end of the lead is releasably connected to the support structure. When the releasable end of the lead is bonded to a contact on a semiconductor chip, the releasable end of the lead can be peeled from the support structure such that the chip may be moved away from the support structure. A compliant layer may be disposed between the chip and the support structure. If a compliant material is injected between the chip and the support structure to form the compliant layer, the compliant material will lift the chip away from the support structure and facilitate the peeling of the leads from the support structure.

摘要翻译： 用于制造微电子元件组件的连接部件具有形成在电介质支撑结构上的可剥离引线。 每个引线的一端永久地连接到支撑结构，并且引线的相对端可释放地连接到支撑结构。 当引线的可释放端接合到半导体芯片上的触点时，引线的可释放端可以从支撑结构剥离，使得芯片可以从支撑结构移开。 柔性层可以设置在芯片和支撑结构之间。 如果柔性材料在芯片和支撑结构之间注入以形成顺应性层，柔性材料将使芯片从支撑结构上提升，并促进引线从支撑结构的剥离。