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    Circuit Apparatus Having a Rounded Trace
    1.
    发明申请
    Circuit Apparatus Having a Rounded Trace 有权
    具有圆形迹线的电路装置

    公开(公告)号：US20120052417A1

    公开(公告)日：2012-03-01

    申请号：US12870041

    申请日：2010-08-27

    申请人： Matthew S. Doyle ,  Joseph Kuczynski ,  Kevin A. Splittstoesser ,  Timothy J. Tofil

    发明人： Matthew S. Doyle ,  Joseph Kuczynski ,  Kevin A. Splittstoesser ,  Timothy J. Tofil

    IPC分类号： G03F1/00 ,  G03F7/20 ,  C25D7/00 ,  G06F17/50

    CPC分类号： G03F7/0035 ,  C25D5/022 ,  G03F7/2002 ,  H05K3/18 ,  H05K2201/098 ,  H05K2203/056 ,  H05K2203/0588 ,  H05K2203/1476

    摘要： In various embodiments of the present invention a circuit apparatus having a rounded trace, a method to manufacture the circuit apparatus, and a design structure used in the design, testing, or manufacturing of the circuit apparatus are described. An artwork layer having an adaptable-mask section allows a graded amount of light to pass into an underlying photoresist layer. Subsequent to developing the photoresist layer, the graded amount of light creates a rounded geometric void used as a mold or sidewall for the creation of at least a portion of a rounded trace. The photoresist layer is removed resulting in a circuit apparatus having a rounded trace.

    摘要翻译： 在本发明的各种实施例中，描述了具有圆形轨迹的电路设备，制造电路设备的方法以及在电路设备的设计，测试或制造中使用的设计结构。 具有适应性掩模部分的艺术品层允许渐变量的光通过下面的光致抗蚀剂层。 在显影光致抗蚀剂层之后，渐变量的光产生用作模具或侧壁的圆形几何空隙，用于产生至少一部分圆形迹线。 去除光致抗蚀剂层，得到具有圆形迹线的电路装置。

    Method to manufacture a circuit apparatus having a rounded differential pair trace
    2.
    发明授权
    Method to manufacture a circuit apparatus having a rounded differential pair trace 失效
    制造具有圆形差动对迹线的电路装置的方法

    公开(公告)号：US08434222B2

    公开(公告)日：2013-05-07

    申请号：US12870072

    申请日：2010-08-27

    申请人： Matthew S. Doyle ,  Joseph Kuczynski ,  Kevin A. Splittstoesser ,  Timothy J. Tofil

    发明人： Matthew S. Doyle ,  Joseph Kuczynski ,  Kevin A. Splittstoesser ,  Timothy J. Tofil

    IPC分类号： H05K3/02 ,  H05K3/10

    CPC分类号： H05K1/0296 ,  C25D5/022 ,  C25D5/10 ,  C25D7/00 ,  H05K1/0245 ,  H05K3/18 ,  H05K3/184 ,  H05K2201/09672 ,  H05K2201/098 ,  H05K2203/056 ,  H05K2203/1476 ,  Y10T29/49126 ,  Y10T29/49155

    摘要： A first artwork layer having a first adaptable-mask section allows a graded amount of light to pass into an underlying first photoresist layer. Subsequent to developing the first photoresist layer, the graded amount of light creates a rounded geometric void used as a mold or sidewall for the creation of at least a lower portion of a rounded trace. A dielectric layer is laminated upon the lower portion and a second artwork layer having an second adaptable-mask section allows a graded amount of light to pass into a second photoresist layer. Subsequent to developing the second photoresist layer, the graded amount of light creates a rounded geometric void used as a mold or sidewall for the creation of at least an upper portion of a rounded trace. The photoresist and dielectric layers are removed resulting in a circuit apparatus having a rounded differential pair trace.

    摘要翻译： 具有第一适应性掩模部分的第一艺术品层允许渐变量的光进入下面的第一光致抗蚀剂层。 在显影第一光致抗蚀剂层之后，分级的光产生用作模具或侧壁的圆形几何空隙，用于产生圆形迹线的至少下部。 电介质层层叠在下部，具有第二可适应掩模部分的第二艺术品层允许渐变量的光通过第二光致抗蚀剂层。 在显影第二光致抗蚀剂层之后，分级的光产生用作模具或侧壁的圆形几何空隙，用于至少形成圆形迹线的上部。 去除光致抗蚀剂和介电层，导致具有圆形差分对迹线的电路设备。

    Circuit Apparatus Having a Rounded Differential Pair Trace
    3.
    发明申请
    Circuit Apparatus Having a Rounded Differential Pair Trace 失效
    具有圆形差分对跟踪的电路设备

    公开(公告)号：US20120048600A1

    公开(公告)日：2012-03-01

    申请号：US12870072

    申请日：2010-08-27

    申请人： Matthew S. Doyle ,  Joseph Kuczynski ,  Kevin A. Splittstoesser ,  Timothy J. Tofil

    发明人： Matthew S. Doyle ,  Joseph Kuczynski ,  Kevin A. Splittstoesser ,  Timothy J. Tofil

    IPC分类号： H05K1/03 ,  C25D7/00 ,  G03F7/20 ,  G06F17/50 ,  B05D5/12

    CPC分类号： H05K1/0296 ,  C25D5/022 ,  C25D5/10 ,  C25D7/00 ,  H05K1/0245 ,  H05K3/18 ,  H05K3/184 ,  H05K2201/09672 ,  H05K2201/098 ,  H05K2203/056 ,  H05K2203/1476 ,  Y10T29/49126 ,  Y10T29/49155

    摘要： A first artwork layer having a first adaptable-mask section allows a graded amount of light to pass into an underlying first photoresist layer. Subsequent to developing the first photoresist layer, the graded amount of light creates a rounded geometric void used as a mold or sidewall for the creation of at least a lower portion of a rounded trace. A dielectric layer is laminated upon the lower portion and a second artwork layer having an second adaptable-mask section allows a graded amount of light to pass into a second photoresist layer. Subsequent to developing the second photoresist layer, the graded amount of light creates a rounded geometric void used as a mold or sidewall for the creation of at least an upper portion of a rounded trace. The photoresist and dielectric layers are removed resulting in a circuit apparatus having a rounded differential pair trace.

    摘要翻译： 具有第一适应性掩模部分的第一艺术品层允许渐变量的光进入下面的第一光致抗蚀剂层。 在显影第一光致抗蚀剂层之后，分级的光产生用作模具或侧壁的圆形几何空隙，用于产生圆形迹线的至少下部。 电介质层层叠在下部，具有第二可适应掩模部分的第二艺术品层允许渐变量的光通过第二光致抗蚀剂层。 在显影第二光致抗蚀剂层之后，分级的光产生用作模具或侧壁的圆形几何空隙，用于至少形成圆形迹线的上部。 去除光致抗蚀剂和介电层，导致具有圆形差分对迹线的电路设备。

    Circuit apparatus having a rounded trace
    4.
    发明授权
    Circuit apparatus having a rounded trace 有权
    具有圆形轨迹的电路装置

    公开(公告)号：US09229318B2

    公开(公告)日：2016-01-05

    申请号：US12870041

    申请日：2010-08-27

    申请人： Matthew S. Doyle ,  Joseph Kuczynski ,  Kevin A. Splittstoesser ,  Timothy J. Tofil

    发明人： Matthew S. Doyle ,  Joseph Kuczynski ,  Kevin A. Splittstoesser ,  Timothy J. Tofil

    IPC分类号： G03F7/20 ,  G03F7/00 ,  C25D5/02 ,  H05K3/18

    CPC分类号： G03F7/0035 ,  C25D5/022 ,  G03F7/2002 ,  H05K3/18 ,  H05K2201/098 ,  H05K2203/056 ,  H05K2203/0588 ,  H05K2203/1476

    摘要： In various embodiments of the present invention a circuit apparatus having a rounded trace, a method to manufacture the circuit apparatus, and a design structure used in the design, testing, or manufacturing of the circuit apparatus are described. An artwork layer having an adaptable-mask section allows a graded amount of light to pass into an underlying photoresist layer. Subsequent to developing the photoresist layer, the graded amount of light creates a rounded geometric void used as a mold or sidewall for the creation of at least a portion of a rounded trace. The photoresist layer is removed resulting in a circuit apparatus having a rounded trace.

    摘要翻译： 在本发明的各种实施例中，描述了具有圆形轨迹的电路设备，制造电路设备的方法以及在电路设备的设计，测试或制造中使用的设计结构。 具有适应性掩模部分的艺术品层允许渐变量的光通过下面的光致抗蚀剂层。 在显影光致抗蚀剂层之后，渐变量的光产生用作模具或侧壁的圆形几何空隙，用于产生至少一部分圆形迹线。 去除光致抗蚀剂层，得到具有圆形迹线的电路装置。

    METHODS FOR MANUFACTURING A SEMI-BURIED VIA AND ARTICLES COMPRISING THE SAME
    6.
    发明申请
    METHODS FOR MANUFACTURING A SEMI-BURIED VIA AND ARTICLES COMPRISING THE SAME 审中-公开
    制造半岛威力的方法及其包含的文章

    公开(公告)号：US20090056998A1

    公开(公告)日：2009-03-05

    申请号：US11848330

    申请日：2007-08-31

    申请人： Roger A. Booth, Jr. ,  John R. Dangler ,  Matthew S. Doyle ,  Jesse Hefner ,  Thomas W. Liang ,  Ankur K. Patel ,  Paul Rudrud

    发明人： Roger A. Booth, Jr. ,  John R. Dangler ,  Matthew S. Doyle ,  Jesse Hefner ,  Thomas W. Liang ,  Ankur K. Patel ,  Paul Rudrud

    IPC分类号： H05K1/11 ,  H05K3/10

    CPC分类号： H05K3/429 ,  H05K1/0222 ,  H05K1/115 ,  H05K2201/09536 ,  H05K2201/09809 ,  H05K2203/061 ,  Y10T29/49165

    摘要： Disclosed herein is a method comprising drilling a first hole in a multilayered device; the multilayered device comprising a fill layer disposed between and in intimate contact with two layers of a first electrically conducting material; the fill layer being electrically insulating; plating the first hole with a slurry; the slurry comprising a magnetic material, an electrically conducting material, or a combination comprising at least one of the foregoing materials; filling the first hole with a fill material; the fill material being electrically insulating; laminating a first layer and a second layer on opposing faces of the multilayered device to form a laminate; the opposing faces being the faces through which the first hole is drilled; the first layer and the second layer each comprising a second electrically conducting material; drilling a second hole through the laminate; the second hole having a circumference that is encompassed by a circumference of the first hole; and plating the surface of the second hole with a third electrically conducting material.

    摘要翻译： 本文公开了一种方法，包括在多层装置中钻出第一孔; 所述多层器件包括设置在两层第一导电材料之间并与之紧密接触的填充层; 填充层电绝缘; 用浆料电镀第一个孔; 所述浆料包括磁性材料，导电材料或包含至少一种前述材料的组合; 用填充材料填充第一个孔; 填充材料电绝缘; 在所述多层器件的相对面上层叠第一层和第二层以形成层压体; 相对的面是钻出第一孔的面; 所述第一层和所述第二层各自包括第二导电材料; 穿过层压板钻出第二个孔; 所述第二孔具有由所述第一孔的圆周包围的圆周; 以及用第三导电材料电镀所述第二孔的表面。

    Flexible Printed Circuits Capable of Transmitting Electrical and Optical Signals
    7.
    发明申请
    Flexible Printed Circuits Capable of Transmitting Electrical and Optical Signals 有权
    灵活的印刷电路能够传输电和光信号

    公开(公告)号：US20080267556A1

    公开(公告)日：2008-10-30

    申请号：US12166442

    申请日：2008-07-02

    申请人： John R. Dangler ,  Matthew S. Doyle

    发明人： John R. Dangler ,  Matthew S. Doyle

    IPC分类号： G02B6/12

    CPC分类号： G02B6/3608 ,  G02B6/3688 ,  H05K1/02 ,  H05K1/0393 ,  H05K3/4602 ,  H05K3/4652 ,  H05K2201/09536

    摘要： A flexible printed circuit capable of transmitting electrical and optical signals is disclosed. The flexible printed circuit includes a set of optical waveguides for transmitting optical signals and a set of conductors for transmitting electrical signals. Each of a subset of the optical waveguides is enclosed by a respectively one of the conductors. The optical waveguide is made of glass or plastic. The conductors are formed within a first building block constructed by a first dielectric layer and a first substrate layer, and a second building block constructed by a second dielectric layer and a second substrate layer.

    摘要翻译： 公开了能够发送电和光信号的柔性印刷电路。 柔性印刷电路包括用于传输光信号的一组光波导和用于传输电信号的一组导体。 光波导的一个子集中的每一个被分别由一个导体包围。 光波导由玻璃或塑料制成。 导体形成在由第一介电层和第一基底层构成的第一构建块内，以及由第二介电层和第二基底层构成的第二构建块。

    Method and apparatus for characteristics impedance discontinuity reduction in high-speed flexible circuit applications
    8.
    发明授权
    Method and apparatus for characteristics impedance discontinuity reduction in high-speed flexible circuit applications 有权
    用于高速柔性电路应用中特性阻抗不连续性降低的方法和装置

    公开(公告)号：US07360188B2

    公开(公告)日：2008-04-15

    申请号：US11842533

    申请日：2007-08-21

    申请人： Matthew S. Doyle

    发明人： Matthew S. Doyle

    IPC分类号： G06F17/50

    CPC分类号： G06F17/5045 ,  G06F17/5018 ,  H05K1/0393 ,  H05K3/0005

    摘要： A method and apparatus are provided for implementing characteristic impedance discontinuity reduction in customized high-speed flexible circuit applications. A curved artwork region is selected and selected cells are scanned. An area on opposite sides of a signal wire within each cell is determined. The identified areas are compared using a user defined delta value. If the compared areas differ greater than the user defined delta value, then a coordinate change is computed for moving the signal wire to reduce characteristic impedance discontinuity.

    摘要翻译： 提供了一种用于在定制的高速柔性电路应用中实现特征阻抗不连续性降低的方法和装置。 选择一个弧形的艺术品区域，并扫描所选的单元格。 确定每个单元内的信号线的相对侧上的区域。 使用用户定义的增量值比较识别的区域。 如果比较区域差异大于用户定义的增量值，则计算移动信号线的坐标变化以减小特征阻抗不连续性。

    IMPLEMENTING ENHANCED LOW LOSS, THIN, HIGH PERFORMANCE FLEXIBLE CIRCUITS
    9.
    发明申请
    IMPLEMENTING ENHANCED LOW LOSS, THIN, HIGH PERFORMANCE FLEXIBLE CIRCUITS 有权
    实现增强低损耗，高性能灵活电路

    公开(公告)号：US20140005818A1

    公开(公告)日：2014-01-02

    申请号：US13535792

    申请日：2012-06-28

    申请人： John R. Dangler ,  Matthew S. Doyle

    发明人： John R. Dangler ,  Matthew S. Doyle

    IPC分类号： G06F19/00

    CPC分类号： H05K1/189 ,  H05K1/024 ,  H05K1/028 ,  H05K1/0393 ,  H05K3/0005 ,  H05K3/4635 ,  H05K3/4638 ,  H05K2201/0154 ,  H05K2201/0187 ,  H05K2201/0191 ,  H05K2201/09718 ,  H05K2203/063

    摘要： A method, system and computer program product are provided for implementing enhanced low loss, thin, high performance flexible circuits. A plurality of predefined values including predefined layout, spacing and density of conductor, signal trace construct, shape and feature values are provided for each signal layer in a flexible circuit. Volumetric calculations are performed using the predefined values for each signal layer in the flexible circuit and a respective adjacent adhesive layer is characterized for each signal layer providing a respective optimized adjacent adhesive layer.

    摘要翻译： 提供了一种方法，系统和计算机程序产品，用于实现增强型低损耗，薄型，高性能的柔性电路。 为柔性电路中的每个信号层提供多个预定值，包括预定布局，导体间距和密度，信号迹线构造，形状和特征值。 使用柔性电路中的每个信号层的预定值进行体积计算，并且相应的相邻粘合剂层的特征在于每个信号层提供相应优化的相邻粘合剂层。