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1.发明授权Method for applying a structure of joining material to the back surfaces of semiconductor chips 有权将材料的结构施加到半导体芯片的背面的方法公开(公告)号：US07592236B2
公开(公告)日：2009-09-22
申请号：US11582551
申请日：2006-10-18
申请人： Michael Bauer , Ludwig Heitzer , Jens Pohl , Peter Strobel , Christian Stuempfl
发明人： Michael Bauer , Ludwig Heitzer , Jens Pohl , Peter Strobel , Christian Stuempfl
IPC分类号： H01L21/00
CPC分类号： H01L21/67132 , H01L21/6715 , H01L23/3128 , H01L24/27 , H01L24/48 , H01L24/83 , H01L25/0657 , H01L25/50 , H01L2224/32145 , H01L2224/48091 , H01L2224/48227 , H01L2224/48472 , H01L2224/73265 , H01L2224/838 , H01L2225/0651 , H01L2225/06575 , H01L2225/06586 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01082 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A structure of joining material is applied to the back surfaces of semiconductor chips in manufacturing semiconductor devices. The joining material is applied, in finely metered and structured form via a joining material jet appliance, to the back surfaces of the semiconductor chips of a divided semiconductor wafer.
摘要翻译： 在制造半导体器件中，将半导体芯片的背面施加接合材料的结构。 接合材料通过接合材料喷射器具以精细计量和结构化的形式施加到分开的半导体晶片的半导体芯片的背面。
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公开(公告)号：US07547645B2
公开(公告)日：2009-06-16
申请号：US11504782
申请日：2006-08-16
申请人： Michael Bauer , Ludwig Heitzer , Jens Pohl , Peter Strobel , Christian Stuempfl
发明人： Michael Bauer , Ludwig Heitzer , Jens Pohl , Peter Strobel , Christian Stuempfl
IPC分类号： H01L21/20
CPC分类号： H01L21/56 , H01L2924/0002 , H01L2924/00
摘要： A method for coating a structure that includes at least one semiconductor chip involves electrostatically depositing coating particles on the areas of the structure to be coated. The coating particles are first applied to a carrier and the latter is electrostatically charged with the coating particles. The structure including at least one semiconductor chip is charged electrostatically to a polarity opposite to the carrier. The carrier and/or the structure are then moved towards one another in the direction of an area of the structure to be coated until the coating particles jump to the areas of the structure to be coated and adhere there. The coating particles are liquefied by heating the area with coating particles to form a coating.
摘要翻译： 涂覆包括至少一个半导体芯片的结构的方法包括在待涂覆结构的区域上静电沉积涂层颗粒。 首先将涂层颗粒施加到载体上，然后将涂层颗粒带电涂覆颗粒。 包括至少一个半导体芯片的结构被静电充电到与载体相反的极性。 然后将载体和/或结构沿待涂覆结构的区域的方向彼此移动，直到涂层颗粒跳到要涂覆的结构的区域并粘附在那里。 涂覆颗粒通过用涂覆颗粒加热该区域而液化以形成涂层。
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3.发明授权Semiconductor device with a thinned semiconductor chip and method for producing the thinned semiconductor chip 有权具有减薄的半导体芯片的半导体器件和用于制造变薄的半导体芯片的方法公开(公告)号：US07294916B2
公开(公告)日：2007-11-13
申请号：US11465547
申请日：2006-08-18
申请人： Michael Bauer , Ludwig Heitzer , Jens Pohl , Peter Strobel , Christian Stuempfl
发明人： Michael Bauer , Ludwig Heitzer , Jens Pohl , Peter Strobel , Christian Stuempfl
IPC分类号： H01L23/02
CPC分类号： H01L23/49562 , H01L21/3081 , H01L21/78 , H01L23/49524 , H01L24/32 , H01L24/40 , H01L24/48 , H01L24/73 , H01L2224/32245 , H01L2224/40091 , H01L2224/40245 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2224/73221 , H01L2224/73265 , H01L2224/83801 , H01L2224/8385 , H01L2924/00014 , H01L2924/01005 , H01L2924/01013 , H01L2924/01033 , H01L2924/01068 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/19043 , H01L2924/00 , H01L2924/3512 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2224/37099
摘要： A semiconductor device with a thinned semiconductor chip and a method for producing the latter is disclosed. In one embodiment, the thinned semiconductor chip has a top side with contact areas and a rear side with a rear side electrode. In this case, the rear side electrode is cohesively connected to a chip pad of a circuit carrier via an electrically conductive layer. In another embodiment, the thinned semiconductor chips of this semiconductor device according to the invention have low-microdefect edge side regions with semiconductor element structures and edge sides patterned by etching technology.
摘要翻译： 公开了一种具有薄型半导体芯片的半导体器件及其制造方法。 在一个实施例中，变薄的半导体芯片具有具有接触区域的顶侧和具有后侧电极的后侧。 在这种情况下，后侧电极经由导电层与电路载体的芯片焊盘粘结地连接。 在另一个实施例中，根据本发明的该半导体器件的薄化半导体芯片具有具有半导体元件结构和通过蚀刻技术图案化的边缘侧的低微细边缘侧区域。
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4.发明授权公开(公告)号：US07834460B2
公开(公告)日：2010-11-16
申请号：US11746390
申请日：2007-05-09
CPC分类号： H01L21/563 , H01L24/29 , H01L24/83 , H01L2224/73203 , H01L2224/83191 , H01L2224/83194 , H01L2224/83855 , H01L2224/83868 , H01L2224/83874 , H01L2924/01077 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/07802 , H01L2924/14
摘要： The invention pertains to a method for manufacturing an electronic component with a semiconductor element (1) that is contacted and fixed on a substrate surface (2). The method is characterized in that the rear side of the semiconductor element and/or the substrate surface is coated with an adhesive structure consisting of a first component (3) that solidifies, particularly hardens or cures, and an electrically conductive second component (4) that does not solidify, wherein the semiconductor element is bonded to the substrate surface in a contacting fashion. The electronic component is characterized in that a structured adhesive layer arranged between the semiconductor element and the substrate surface comprises a solidifying first component (3) and an electrically conductive non-solidifying second component (4).
摘要翻译： 公开了一种用于制造电子部件和对应电子部件的方法。 一个实施例提供了接触并固定在基板表面上的半导体元件。 电子部件是布置在半导体元件和基板表面之间的结构化粘合剂层，包括固化的第一部件和导电的非固化的第二部件。
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公开(公告)号：US20080017986A1
公开(公告)日：2008-01-24
申请号：US11780827
申请日：2007-07-20
IPC分类号： H01L23/488 , H01L21/56
CPC分类号： H01L21/6835 , H01L21/561 , H01L21/565 , H01L21/568 , H01L23/3107 , H01L24/45 , H01L24/48 , H01L24/83 , H01L24/85 , H01L24/97 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/73265 , H01L2224/83192 , H01L2224/83801 , H01L2224/85 , H01L2224/92247 , H01L2224/97 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01068 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/10253 , H01L2924/14 , H01L2924/181 , H01L2924/1815 , H01L2924/18165 , H01L2924/00014 , H01L2224/83 , H01L2924/00 , H01L2924/00012
摘要： A method for producing an electronic component of a VQFN (very thin quad flat pack no-lead) design includes the following method steps: anchoring at least one integrated circuit element on a sacrificial substrate; contact-connecting the at least one integrated circuit element to the sacrificial substrate with formation of contact-connecting points on the sacrificial substrate; forming an encapsulation on a top side of the sacrificial substrate, the at least one anchored integrated circuit element being mounted on the top side of the sacrificial substrate; removing the sacrificial substrate, thereby uncovering a portion of the contact-connecting points on the underside of the encapsulation.
摘要翻译： 用于制造VQFN（非常薄的四边形扁平封装无引线）设计的电子部件的方法包括以下方法步骤：将至少一个集成电路元件固定在牺牲基板上; 将所述至少一个集成电路元件接触连接到所述牺牲基板，同时在所述牺牲基板上形成接触连接点; 在所述牺牲衬底的顶侧上形成封装，所述至少一个锚定集成电路元件安装在所述牺牲衬底的顶侧; 去除牺牲衬底，从而露出封装底面上的接触连接点的一部分。
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6.发明申请公开(公告)号：US20070290346A1
公开(公告)日：2007-12-20
申请号：US11746390
申请日：2007-05-09
CPC分类号： H01L21/563 , H01L24/29 , H01L24/83 , H01L2224/73203 , H01L2224/83191 , H01L2224/83194 , H01L2224/83855 , H01L2224/83868 , H01L2224/83874 , H01L2924/01077 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/07802 , H01L2924/14
摘要： The invention pertains to a method for manufacturing an electronic component with a semiconductor element (1) that is contacted and fixed on a substrate surface (2). The method is characterized in that the rear side of the semiconductor element and/or the substrate surface is coated with an adhesive structure consisting of a first component (3) that solidifies, particularly hardens or cures, and an electrically conductive second component (4) that does not solidify, wherein the semiconductor element is bonded to the substrate surface in a contacting fashion. The electronic component is characterized in that a structured adhesive layer arranged between the semiconductor element and the substrate surface comprises a solidifying first component (3) and an electrically conductive non-solidifying second component (4).
摘要翻译： 本发明涉及一种用于制造具有接触并固定在基板表面（2）上的半导体元件（1）的电子部件的方法。 该方法的特征在于，半导体元件和/或基板表面的后侧涂覆有由固化，特别是硬化或固化的第一组分（3）和导电的第二组分（4）组成的粘合剂结构， 其不固化，其中半导体元件以接触方式结合到衬底表面。 电子部件的特征在于，布置在半导体元件和基板表面之间的结构化粘合剂层包括固化的第一部件（3）和导电的非固化的第二部件（4）。
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7.发明授权Electronic circuit in a package-in-package configuration and production method 有权电子电路采用封装在一起的配置和生产方法公开(公告)号：US07714416B2
公开(公告)日：2010-05-11
申请号：US11780767
申请日：2007-07-20
IPC分类号： H01L23/04
CPC分类号： H01L23/49551 , H01L24/48 , H01L25/105 , H01L25/16 , H01L2224/48091 , H01L2224/48247 , H01L2225/1029 , H01L2225/1088 , H01L2924/00014 , H01L2924/01078 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/30107 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： An electronic circuit in a package-in-package configuration and a production method is disclosed. One embodiment provides an arrangement enveloped by an encapsulation and composed of at least one semiconductor element on an element carrier, at least one leadframe with at least one inner contact-connection, at least one inner lead running within the encapsulation, and at least one outer contact-connection led out from the encapsulation. The inner lead has an exposed inner lead section which can be contact-connected from the outer side of the package-in-package configuration.
摘要翻译： 公开了一种封装形式的电子电路及制造方法。 一个实施例提供了由封装包围并由元件载体上的至少一个半导体元件组成的布置，至少一个引线框架，其具有至少一个内部接触连接，至少一个内部引线，位于封装内，以及至少一个外部 接头连接从封装引出。 内引线具有暴露的内引线部分，其可以从封装包装构型的外侧接触连接。
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8.发明授权公开(公告)号：US07662664B2
公开(公告)日：2010-02-16
申请号：US11780786
申请日：2007-07-20
申请人： Michael Bauer , Ludwig Heitzer , Jens Pohl , Peter Strobel , Christian Stuempfl
发明人： Michael Bauer , Ludwig Heitzer , Jens Pohl , Peter Strobel , Christian Stuempfl
CPC分类号： H05K1/141 , H01L24/29 , H01L24/32 , H01L24/83 , H01L25/105 , H01L25/50 , H01L2224/16225 , H01L2224/16235 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2224/83191 , H01L2224/83192 , H01L2224/8388 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2924/01005 , H01L2924/01006 , H01L2924/0102 , H01L2924/01027 , H01L2924/01033 , H01L2924/01082 , H01L2924/014 , H01L2924/07802 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/19043 , H01L2924/3025 , H05K3/3436 , H05K2201/049 , H05K2201/10515 , H05K2201/1053 , H05K2201/10734 , H01L2924/00 , H01L2924/3512
摘要： An electronic circuit in a package-on-package configuration includes: a lower subassembly with a first electronic element, a first wiring carrier, a first housing with a first redistribution layer and an arrangement of solder balls disposed on the first redistribution layer and an upper subassembly with a second electronic element mounted on the lower subassembly. A method for producing the electronic circuit in a package-on-package configuration includes: adhering an upper side of the first electronic element to an underside of the first redistribution layer via a radiation-crosslinking thermoplastic adhesive.
摘要翻译： 封装在封装构造中的电子电路包括：具有第一电子元件的下部子组件，第一布线载体，具有第一再分布层的第一壳体和布置在第一再分布层上的焊球布置，以及上部 子组件具有安装在下部子组件上的第二电子元件。 一种封装在封装结构中的电子电路的制造方法，其特征在于，包括：通过辐射交联热塑性粘合剂将第一电子元件的上侧粘接到第一再分布层的下侧。
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9.发明申请公开(公告)号：US20080017972A1
公开(公告)日：2008-01-24
申请号：US11780767
申请日：2007-07-20
CPC分类号： H01L23/49551 , H01L24/48 , H01L25/105 , H01L25/16 , H01L2224/48091 , H01L2224/48247 , H01L2225/1029 , H01L2225/1088 , H01L2924/00014 , H01L2924/01078 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/30107 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： An electronic circuit in a package-in-package configuration and a production method is disclosed. One embodiment provides an arrangement enveloped by an encapsulation and composed of at least one semiconductor element on an element carrier, at least one leadframe with at least one inner contact-connection, at least one inner lead running within the encapsulation, and at least one outer contact-connection led out from the encapsulation. The inner lead has an exposed inner lead section which can be contact-connected from the outer side of the package-in-package configuration.
摘要翻译： 公开了一种封装形式的电子电路及制造方法。 一个实施例提供了由封装包围并由元件载体上的至少一个半导体元件组成的布置，至少一个引线框架，其具有至少一个内部接触连接，至少一个内部引线，位于封装内，以及至少一个外部 接头连接从封装引出。 内引线具有暴露的内引线部分，其可以从封装形式的封装构造的外侧接触连接。
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10.发明申请Method for applying a structure of joining material to the back surfaces of semiconductor chips 有权将材料的结构施加到半导体芯片的背面的方法公开(公告)号：US20070087532A1
公开(公告)日：2007-04-19
申请号：US11582551
申请日：2006-10-18
申请人： Michael Bauer , Ludwig Heitzer , Jens Pohl , Peter Strobel , Christian Stuempfl
发明人： Michael Bauer , Ludwig Heitzer , Jens Pohl , Peter Strobel , Christian Stuempfl
IPC分类号： H01L21/00
CPC分类号： H01L21/67132 , H01L21/6715 , H01L23/3128 , H01L24/27 , H01L24/48 , H01L24/83 , H01L25/0657 , H01L25/50 , H01L2224/32145 , H01L2224/48091 , H01L2224/48227 , H01L2224/48472 , H01L2224/73265 , H01L2224/838 , H01L2225/0651 , H01L2225/06575 , H01L2225/06586 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01082 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A structure of joining material is applied to the back surfaces of semiconductor chips in manufacturing semiconductor devices. The joining material is applied, in finely metered and structured form via a joining material jet appliance, to the back surfaces of the semiconductor chips of a divided semiconductor wafer.
摘要翻译： 在制造半导体器件中，将半导体芯片的背面施加接合材料的结构。 接合材料通过接合材料喷射器具以精细计量和结构化的形式施加到分开的半导体晶片的半导体芯片的背面。
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