公开(公告)号：US20060102290A1

公开(公告)日：2006-05-18

申请号：US11221763

申请日：2005-09-09

申请人： Susumu Harada ,  Chiaki Takubo ,  Kenji Takahashi ,  Hideo Aoki ,  Hideo Numata ,  Hisashi Kaneko ,  Hirokazu Ezawa ,  Mie Matsuo ,  Hiroshi Ikenoue ,  Ichiro Omura

发明人： Susumu Harada ,  Chiaki Takubo ,  Kenji Takahashi ,  Hideo Aoki ,  Hideo Numata ,  Hisashi Kaneko ,  Hirokazu Ezawa ,  Mie Matsuo ,  Hiroshi Ikenoue ,  Ichiro Omura

IPC分类号： B32B37/00

CPC分类号： H01L21/6835 ,  H01L21/76898

摘要： A wafer supporting plate is formed of a glass or a resin which can permeate ultraviolet rays and has a nearly disk shape. An outer diameter of the wafer supporting plate is larger than that of the semiconductor wafer which is supported. In the wafer supporting plate, a plurality of openings are formed to correspond to plural through holes of the semiconductor wafer. The opening has an open area larger than an open area of the through hole, that is, has a larger diameter.

摘要翻译： 晶片支撑板由可以渗透紫外线并具有近似圆盘形状的玻璃或树脂形成。 晶片支撑板的外径大于被支撑的半导体晶片的外径。 在晶片支撑板中，形成多个开口以对应于半导体晶片的多个通孔。 开口具有比通孔的开口面积大的开口面积，即具有较大的直径。

公开(公告)号：US07521352B2

公开(公告)日：2009-04-21

申请号：US11790723

申请日：2007-04-27

申请人： Hideo Shinomiya ,  Jun Hirota ,  Mie Matsuo ,  Hisashi Kaneko

发明人： Hideo Shinomiya ,  Jun Hirota ,  Mie Matsuo ,  Hisashi Kaneko

IPC分类号： H01L21/4763

CPC分类号： H01L21/76838 ,  G03F9/708 ,  G03F9/7084 ,  H01L23/544 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for manufacturing a semiconductor device includes forming a copper anti-diffusion film on a copper trench wiring layer, and forming an opening portion in the copper anti-diffusion film by laser ablation, the opening portion being formed in a region corresponding to an alignment region used for lithography process for forming an aluminum wiring on the copper trench wiring layer.

摘要翻译： 一种半导体器件的制造方法，其特征在于，在铜沟布线层上形成铜抗扩散膜，通过激光烧蚀在所述铜抗扩散膜中形成开口部，所述开口部形成在与所述铜 用于在铜沟布线层上形成铝布线的光刻工艺的区域。

公开(公告)号：US20060055050A1

公开(公告)日：2006-03-16

申请号：US11221762

申请日：2005-09-09

申请人： Hideo Numata ,  Hirokazu Ezawa ,  Chiaki Takubo ,  Kenji Takahashi ,  Hideo Aoki ,  Susumu Harada ,  Hisashi Kaneko ,  Hiroshi Ikenoue ,  Mie Matsuo ,  Ichiro Omura

发明人： Hideo Numata ,  Hirokazu Ezawa ,  Chiaki Takubo ,  Kenji Takahashi ,  Hideo Aoki ,  Susumu Harada ,  Hisashi Kaneko ,  Hiroshi Ikenoue ,  Mie Matsuo ,  Ichiro Omura

IPC分类号： H01L23/48

CPC分类号： H01L25/50 ,  H01L21/76898 ,  H01L23/481 ,  H01L25/0657 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05147 ,  H01L2224/05569 ,  H01L2224/13025 ,  H01L2224/16 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2224/05599

摘要： A semiconductor device comprises a semiconductor substrate having an through hole, a first insulation resin layer formed on an inner surface of the through hole, a second insulation resin layer formed on at least one of front and rear surfaces of the semiconductor substrate, and a first conductor layer formed in the through hole to connect at least both front and rear surfaces of the semiconductor substrate and insulated from the inner surface of the through hole with the first insulation resin layer. A second conductor layer (wiring pattern) which is electrically connected to the first conductor layer in the through hole is further provided on the second insulation resin layer. The conductor layer formed in the through hole and constituting a connecting plug has a high insulation reliability. Therefore, a semiconductor device suitable for a multi-chip package and the like can be obtained. Further, since the forming ability of the conductor layer connecting the front and rear surfaces and the insulation layer is high, the manufacturing cost can be reduced.

摘要翻译： 半导体器件包括具有通孔的半导体衬底，形成在通孔的内表面上的第一绝缘树脂层，形成在半导体衬底的前后表面中的至少一个上的第二绝缘树脂层，以及第一绝缘树脂层 形成在所述通孔中的导体层至少连接半导体衬底的前表面和后表面，并与所述通孔的内表面与所述第一绝缘树脂层绝缘。 在第二绝缘树脂层上还设置有与通孔中的第一导体层电连接的第二导体层（布线图案）。 形成在通孔中并构成连接插头的导体层具有高的绝缘可靠性。 因此，可以获得适合于多芯片封装等的半导体器件。 此外，由于连接前后表面和绝缘层的导体层的形成能力高，所以可以降低制造成本。

公开(公告)号：US07608537B2

公开(公告)日：2009-10-27

申请号：US11861087

申请日：2007-09-25

申请人： Mie Matsuo ,  Hisashi Kaneko

发明人： Mie Matsuo ,  Hisashi Kaneko

IPC分类号： G03F7/00 ,  H01J49/42

CPC分类号： H01L21/76885 ,  G03F9/708 ,  G03F9/7084 ,  H01L22/34 ,  H01L23/544 ,  H01L2223/54453 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for fabricating a semiconductor device, includes forming an opening in a first film, embedding an alignment mark material for alignment with an upper layer in the opening, forming a second film on the first film in which the alignment mark material is embedded, irradiating the second film formed in a predetermined region including a position where the alignment mark material is embedded with a processing light, thereby to remove the second film to an extent that a portion of the second film remains in the predetermined region, and exposing the portion of the second film remaining in the predetermined region to an etching environment for etching the second film.

摘要翻译： 一种制造半导体器件的方法，包括在第一膜中形成开口，在开口中嵌入用于与上层对准的对准标记材料，在其中嵌入对准标记材料的第一膜上形成第二膜，照射 所述第二膜形成在包括所述对准标记材料被嵌入处理光的位置的预定区域中，从而将所述第二膜移除到所述第二膜的一部分保留在所述预定区域中的程度， 所述第二膜保留在所述预定区域中以蚀刻所述第二膜的蚀刻环境。

公开(公告)号：US20070254474A1

公开(公告)日：2007-11-01

申请号：US11790723

申请日：2007-04-27

申请人： Hideo Shinomiya ,  Jun Hirota ,  Mie Matsuo ,  Hisashi Kaneko

发明人： Hideo Shinomiya ,  Jun Hirota ,  Mie Matsuo ,  Hisashi Kaneko

IPC分类号： H01L21/4763

CPC分类号： H01L21/76838 ,  G03F9/708 ,  G03F9/7084 ,  H01L23/544 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for manufacturing a semiconductor device includes forming a copper anti-diffusion film on a copper trench wiring layer, and forming an opening portion in the copper anti-diffusion film by laser aberration, the opening portion being formed in a region corresponding to an alignment region used for lithography process for forming an aluminum wiring on the copper trench wiring layer.

摘要翻译： 一种半导体器件的制造方法，其特征在于，在铜沟布线层上形成铜抗扩散膜，通过激光像差在所述铜防扩散膜中形成开口部，所述开口部形成在对应于 用于在铜沟布线层上形成铝布线的光刻工艺的区域。

公开(公告)号：US20060207985A1

公开(公告)日：2006-09-21

申请号：US11348482

申请日：2006-02-07

申请人： Hisashi Kaneko ,  Mie Matsuo ,  Hirokazu Ezawa

发明人： Hisashi Kaneko ,  Mie Matsuo ,  Hirokazu Ezawa

IPC分类号： H05B3/02

CPC分类号： B23K1/0016 ,  B23K2101/40 ,  B29C65/222 ,  B29C65/229 ,  B29C66/1122 ,  B29C66/43 ,  B29C66/472 ,  B29C66/818 ,  B29C66/81811 ,  B29C66/8362 ,  H01L2224/16 ,  H01L2924/00011 ,  H01L2924/00014 ,  Y10T29/49211 ,  Y10T29/49826 ,  H01L2224/0401

摘要： According to an aspect of the present invention, there is provided a bonding method, comprising disposing on a first body a second body with a bump interposed therebetween; and electrically and mechanically bonding the first body and the second body with the bump by passing a heating element between the first body and the second body to melt the bump by the heating element, the heating element being heated to a melting point or more of a material configuring the bump.

摘要翻译： 根据本发明的一个方面，提供了一种接合方法，包括：在第一主体上设置有插入其间的凸块的第二主体; 并且通过使第一主体和第二主体之间的加热元件通过加热元件熔化凸起而使第一主体和第二主体与凸起电气地和机械地结合，加热元件被加热到熔点以上 材料配置凸块。

公开(公告)号：US20060071271A1

公开(公告)日：2006-04-06

申请号：US11230624

申请日：2005-09-21

申请人： Ichiro Omura ,  Kenji Takahashi ,  Chiaki Takubo ,  Hideo Aoki ,  Hideo Numata ,  Mie Matsuo ,  Hirokazu Ezawa ,  Susumu Harada ,  Hisashi Kaneko ,  Hiroshi Ikenoue ,  Kenichi Matsushita

发明人： Ichiro Omura ,  Kenji Takahashi ,  Chiaki Takubo ,  Hideo Aoki ,  Hideo Numata ,  Mie Matsuo ,  Hirokazu Ezawa ,  Susumu Harada ,  Hisashi Kaneko ,  Hiroshi Ikenoue ,  Kenichi Matsushita

IPC分类号： H01L29/76 ,  H01L21/336

CPC分类号： H01L29/41766 ,  H01L23/481 ,  H01L24/14 ,  H01L24/17 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L29/7809 ,  H01L29/7811 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05568 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2224/05005 ,  H01L2224/05541 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device which is compact and thin in size, low in resistance of a current path and parasitic inductance and excellent in reliability is provided. This semiconductor device comprises a semiconductor substrate, a first main electrode which is formed on a front surface of the semiconductor substrate, a second main electrode which is formed on a rear surface of the semiconductor substrate, and a conducting portion which is formed in a direction to pierce through the semiconductor substrate, wherein the second main electrode is extracted to the front surface of the semiconductor substrate via the conducting portion. And, the conducting portion is a through via which has a through hole formed through the semiconductor substrate in its thickness direction and a conductive portion which is formed in the through hole and connected to the second main electrode.

摘要翻译： 提供了一种尺寸小型化，电流通路电阻低，寄生电感小，可靠性优异的半导体装置。 该半导体器件包括半导体衬底，形成在半导体衬底的前表面上的第一主电极，形成在半导体衬底的后表面上的第二主电极和形成在半导体衬底的背面上的导电部分 穿过半导体衬底，其中第二主电极经由导电部分被提取到半导体衬底的前表面。 并且，导电部是贯通通孔，该通孔在其厚度方向上形成有通过半导体基板的通孔，以及形成在通孔中并连接到第二主电极的导电部。

公开(公告)号：US07531876B2

公开(公告)日：2009-05-12

申请号：US11230624

申请日：2005-09-21

申请人： Ichiro Omura ,  Kenji Takahashi ,  Chiaki Takubo ,  Hideo Aoki ,  Hideo Numata ,  Mie Matsuo ,  Hirokazu Ezawa ,  Susumu Harada ,  Hisashi Kaneko ,  Hiroshi Ikenoue ,  Kenichi Matsushita

发明人： Ichiro Omura ,  Kenji Takahashi ,  Chiaki Takubo ,  Hideo Aoki ,  Hideo Numata ,  Mie Matsuo ,  Hirokazu Ezawa ,  Susumu Harada ,  Hisashi Kaneko ,  Hiroshi Ikenoue ,  Kenichi Matsushita

IPC分类号： H01L23/62

CPC分类号： H01L29/41766 ,  H01L23/481 ,  H01L24/14 ,  H01L24/17 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L29/7809 ,  H01L29/7811 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05568 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2224/05005 ,  H01L2224/05541 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device which is compact and thin in size, low in resistance of a current path and parasitic inductance and excellent in reliability is provided. This semiconductor device comprises a semiconductor substrate, a first main electrode which is formed on a front surface of the semiconductor substrate, a second main electrode which is formed on a rear surface of the semiconductor substrate, and a conducting portion which is formed in a direction to pierce through the semiconductor substrate, wherein the second main electrode is extracted to the front surface of the semiconductor substrate via the conducting portion. And, the conducting portion is a through via which has a through hole formed through the semiconductor substrate in its thickness direction and a conductive portion which is formed in the through hole and connected to the second main electrode.

摘要翻译： 提供了一种尺寸小型化，电流通路电阻低，寄生电感小，可靠性优异的半导体装置。 该半导体器件包括半导体衬底，形成在半导体衬底的前表面上的第一主电极，形成在半导体衬底的后表面上的第二主电极和形成在半导体衬底的背面上的导电部分 穿过半导体衬底，其中第二主电极经由导电部分被提取到半导体衬底的前表面。 并且，导电部是贯通通孔，该通孔在其厚度方向上形成有通过半导体基板的通孔，以及形成在通孔中并连接到第二主电极的导电部。

公开(公告)号：US07238919B2

公开(公告)日：2007-07-03

申请号：US11348482

申请日：2006-02-07

申请人： Hisashi Kaneko ,  Mie Matsuo ,  Hirokazu Ezawa

发明人： Hisashi Kaneko ,  Mie Matsuo ,  Hirokazu Ezawa

IPC分类号： B23K3/053 ,  H05B3/20

CPC分类号： B23K1/0016 ,  B23K2101/40 ,  B29C65/222 ,  B29C65/229 ,  B29C66/1122 ,  B29C66/43 ,  B29C66/472 ,  B29C66/818 ,  B29C66/81811 ,  B29C66/8362 ,  H01L2224/16 ,  H01L2924/00011 ,  H01L2924/00014 ,  Y10T29/49211 ,  Y10T29/49826 ,  H01L2224/0401

摘要： According to an aspect of the present invention, there is provided a bonding method, comprising disposing on a first body a second body with a bump interposed therebetween; and electrically and mechanically bonding the first body and the second body with the bump by passing a heating element between the first body and the second body to melt the bump by the heating element, the heating element being heated to a melting point or more of a material configuring the bump.

摘要翻译： 根据本发明的一个方面，提供了一种接合方法，包括：在第一主体上设置有插入其间的凸块的第二主体; 并且通过使第一主体和第二主体之间的加热元件通过加热元件熔化凸起而使第一主体和第二主体与凸起电气地和机械地结合，加热元件被加热到熔点以上 材料配置凸块。

公开(公告)号：US20100003816A1

公开(公告)日：2010-01-07

申请号：US12585238

申请日：2009-09-09

申请人： Makoto Honda ,  Kaori Yomogihara ,  Kazuhiro Murakami ,  Masanori Numano ,  Takahito Nagamatsu ,  Hideaki Harakawa ,  Hideto Matsuyama ,  Hirokazu Ezawa ,  Hisashi Kaneko

发明人： Makoto Honda ,  Kaori Yomogihara ,  Kazuhiro Murakami ,  Masanori Numano ,  Takahito Nagamatsu ,  Hideaki Harakawa ,  Hideto Matsuyama ,  Hirokazu Ezawa ,  Hisashi Kaneko

IPC分类号： H01L21/768

CPC分类号： H01L21/76802 ,  H01L21/02063 ,  H01L21/31116 ,  H01L21/76814

摘要： An insulating film formed on a conducting layer is dry-etched so as to make a connection hole in the insulating film to expose the conducting layer. Plasma is supplied onto the exposed conducting layer to dry-clean a damage layer produced in the connection hole. A product produced in the connection hole as a result of the dry cleaning is removed by a wet process. An oxide film formed in the connection hole as a result of the wet process is etched by a chemical dry process using a gas including either NF3 or HF. A thermally decomposable reaction product produced as a result of the etching is removed by heat treatment.

摘要翻译： 对形成在导电层上的绝缘膜进行干蚀刻，以在绝缘膜上形成连接孔，使导电层露出。 将等离子体供应到暴露的导电层上以干燥在连接孔中产生的损伤层。 作为干式清洗的连接孔中产生的产品通过湿法除去。 通过使用包括NF 3或HF的气体的化学干法，蚀刻形成在连接孔中的作为湿法处理的结果的氧化膜。 通过热处理除去作为蚀刻结果产生的可热分解的反应产物。