公开(公告)号：US20060102290A1

公开(公告)日：2006-05-18

申请号：US11221763

申请日：2005-09-09

申请人： Susumu Harada ,  Chiaki Takubo ,  Kenji Takahashi ,  Hideo Aoki ,  Hideo Numata ,  Hisashi Kaneko ,  Hirokazu Ezawa ,  Mie Matsuo ,  Hiroshi Ikenoue ,  Ichiro Omura

发明人： Susumu Harada ,  Chiaki Takubo ,  Kenji Takahashi ,  Hideo Aoki ,  Hideo Numata ,  Hisashi Kaneko ,  Hirokazu Ezawa ,  Mie Matsuo ,  Hiroshi Ikenoue ,  Ichiro Omura

IPC分类号： B32B37/00

CPC分类号： H01L21/6835 ,  H01L21/76898

摘要： A wafer supporting plate is formed of a glass or a resin which can permeate ultraviolet rays and has a nearly disk shape. An outer diameter of the wafer supporting plate is larger than that of the semiconductor wafer which is supported. In the wafer supporting plate, a plurality of openings are formed to correspond to plural through holes of the semiconductor wafer. The opening has an open area larger than an open area of the through hole, that is, has a larger diameter.

摘要翻译： 晶片支撑板由可以渗透紫外线并具有近似圆盘形状的玻璃或树脂形成。 晶片支撑板的外径大于被支撑的半导体晶片的外径。 在晶片支撑板中，形成多个开口以对应于半导体晶片的多个通孔。 开口具有比通孔的开口面积大的开口面积，即具有较大的直径。

公开(公告)号：US20060055050A1

公开(公告)日：2006-03-16

申请号：US11221762

申请日：2005-09-09

申请人： Hideo Numata ,  Hirokazu Ezawa ,  Chiaki Takubo ,  Kenji Takahashi ,  Hideo Aoki ,  Susumu Harada ,  Hisashi Kaneko ,  Hiroshi Ikenoue ,  Mie Matsuo ,  Ichiro Omura

发明人： Hideo Numata ,  Hirokazu Ezawa ,  Chiaki Takubo ,  Kenji Takahashi ,  Hideo Aoki ,  Susumu Harada ,  Hisashi Kaneko ,  Hiroshi Ikenoue ,  Mie Matsuo ,  Ichiro Omura

IPC分类号： H01L23/48

CPC分类号： H01L25/50 ,  H01L21/76898 ,  H01L23/481 ,  H01L25/0657 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05147 ,  H01L2224/05569 ,  H01L2224/13025 ,  H01L2224/16 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2224/05599

摘要： A semiconductor device comprises a semiconductor substrate having an through hole, a first insulation resin layer formed on an inner surface of the through hole, a second insulation resin layer formed on at least one of front and rear surfaces of the semiconductor substrate, and a first conductor layer formed in the through hole to connect at least both front and rear surfaces of the semiconductor substrate and insulated from the inner surface of the through hole with the first insulation resin layer. A second conductor layer (wiring pattern) which is electrically connected to the first conductor layer in the through hole is further provided on the second insulation resin layer. The conductor layer formed in the through hole and constituting a connecting plug has a high insulation reliability. Therefore, a semiconductor device suitable for a multi-chip package and the like can be obtained. Further, since the forming ability of the conductor layer connecting the front and rear surfaces and the insulation layer is high, the manufacturing cost can be reduced.

摘要翻译： 半导体器件包括具有通孔的半导体衬底，形成在通孔的内表面上的第一绝缘树脂层，形成在半导体衬底的前后表面中的至少一个上的第二绝缘树脂层，以及第一绝缘树脂层 形成在所述通孔中的导体层至少连接半导体衬底的前表面和后表面，并与所述通孔的内表面与所述第一绝缘树脂层绝缘。 在第二绝缘树脂层上还设置有与通孔中的第一导体层电连接的第二导体层（布线图案）。 形成在通孔中并构成连接插头的导体层具有高的绝缘可靠性。 因此，可以获得适合于多芯片封装等的半导体器件。 此外，由于连接前后表面和绝缘层的导体层的形成能力高，所以可以降低制造成本。

公开(公告)号：US20060071271A1

公开(公告)日：2006-04-06

申请号：US11230624

申请日：2005-09-21

申请人： Ichiro Omura ,  Kenji Takahashi ,  Chiaki Takubo ,  Hideo Aoki ,  Hideo Numata ,  Mie Matsuo ,  Hirokazu Ezawa ,  Susumu Harada ,  Hisashi Kaneko ,  Hiroshi Ikenoue ,  Kenichi Matsushita

发明人： Ichiro Omura ,  Kenji Takahashi ,  Chiaki Takubo ,  Hideo Aoki ,  Hideo Numata ,  Mie Matsuo ,  Hirokazu Ezawa ,  Susumu Harada ,  Hisashi Kaneko ,  Hiroshi Ikenoue ,  Kenichi Matsushita

IPC分类号： H01L29/76 ,  H01L21/336

CPC分类号： H01L29/41766 ,  H01L23/481 ,  H01L24/14 ,  H01L24/17 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L29/7809 ,  H01L29/7811 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05568 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2224/05005 ,  H01L2224/05541 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device which is compact and thin in size, low in resistance of a current path and parasitic inductance and excellent in reliability is provided. This semiconductor device comprises a semiconductor substrate, a first main electrode which is formed on a front surface of the semiconductor substrate, a second main electrode which is formed on a rear surface of the semiconductor substrate, and a conducting portion which is formed in a direction to pierce through the semiconductor substrate, wherein the second main electrode is extracted to the front surface of the semiconductor substrate via the conducting portion. And, the conducting portion is a through via which has a through hole formed through the semiconductor substrate in its thickness direction and a conductive portion which is formed in the through hole and connected to the second main electrode.

摘要翻译： 提供了一种尺寸小型化，电流通路电阻低，寄生电感小，可靠性优异的半导体装置。 该半导体器件包括半导体衬底，形成在半导体衬底的前表面上的第一主电极，形成在半导体衬底的后表面上的第二主电极和形成在半导体衬底的背面上的导电部分 穿过半导体衬底，其中第二主电极经由导电部分被提取到半导体衬底的前表面。 并且，导电部是贯通通孔，该通孔在其厚度方向上形成有通过半导体基板的通孔，以及形成在通孔中并连接到第二主电极的导电部。

公开(公告)号：US07531876B2

公开(公告)日：2009-05-12

申请号：US11230624

申请日：2005-09-21

申请人： Ichiro Omura ,  Kenji Takahashi ,  Chiaki Takubo ,  Hideo Aoki ,  Hideo Numata ,  Mie Matsuo ,  Hirokazu Ezawa ,  Susumu Harada ,  Hisashi Kaneko ,  Hiroshi Ikenoue ,  Kenichi Matsushita

发明人： Ichiro Omura ,  Kenji Takahashi ,  Chiaki Takubo ,  Hideo Aoki ,  Hideo Numata ,  Mie Matsuo ,  Hirokazu Ezawa ,  Susumu Harada ,  Hisashi Kaneko ,  Hiroshi Ikenoue ,  Kenichi Matsushita

IPC分类号： H01L23/62

CPC分类号： H01L29/41766 ,  H01L23/481 ,  H01L24/14 ,  H01L24/17 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L29/7809 ,  H01L29/7811 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05568 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2224/05005 ,  H01L2224/05541 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device which is compact and thin in size, low in resistance of a current path and parasitic inductance and excellent in reliability is provided. This semiconductor device comprises a semiconductor substrate, a first main electrode which is formed on a front surface of the semiconductor substrate, a second main electrode which is formed on a rear surface of the semiconductor substrate, and a conducting portion which is formed in a direction to pierce through the semiconductor substrate, wherein the second main electrode is extracted to the front surface of the semiconductor substrate via the conducting portion. And, the conducting portion is a through via which has a through hole formed through the semiconductor substrate in its thickness direction and a conductive portion which is formed in the through hole and connected to the second main electrode.

摘要翻译： 提供了一种尺寸小型化，电流通路电阻低，寄生电感小，可靠性优异的半导体装置。 该半导体器件包括半导体衬底，形成在半导体衬底的前表面上的第一主电极，形成在半导体衬底的后表面上的第二主电极和形成在半导体衬底的背面上的导电部分 穿过半导体衬底，其中第二主电极经由导电部分被提取到半导体衬底的前表面。 并且，导电部是贯通通孔，该通孔在其厚度方向上形成有通过半导体基板的通孔，以及形成在通孔中并连接到第二主电极的导电部。

公开(公告)号：US08237285B2

公开(公告)日：2012-08-07

申请号：US12533492

申请日：2009-07-31

申请人： Kazumasa Tanida ,  Mie Matsuo ,  Masahiro Sekiguchi ,  Chiaki Takubo

发明人： Kazumasa Tanida ,  Mie Matsuo ,  Masahiro Sekiguchi ,  Chiaki Takubo

IPC分类号： H01L21/70 ,  H01L29/40 ,  H01L23/48 ,  H01L23/52

CPC分类号： H01L21/76898 ,  H01L23/481 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05548 ,  H01L2224/05573 ,  H01L2224/0558 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/05681 ,  H01L2224/05684 ,  H01L2224/05686 ,  H01L2224/13 ,  H01L2924/00014 ,  H01L2924/01074 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/01014 ,  H01L2924/01029

摘要： Semiconductor device includes semiconductor substrate, through hole having first opening and second opening, and including an expansion portion so that an opening area of first opening is greater than an opening area of lowermost portion of expansion portion, first insulating layer, and having an opening which communicates with through hole and has an area smaller than opening area of first opening, first wiring layer provided on first insulating layer, second insulating layer provided on expansion portion of through hole, and to cover first opening and an inner wall surface of through hole, second insulating layer having an opening communicating with opening of first insulating layer so as to expose first wiring layer through opening of first insulating layer, and second wiring layer provided on second insulating layer to extend from inside of through hole, and being connected to first wiring layer via openings of first and second insulating layers.

摘要翻译： 半导体器件包括半导体衬底，具有第一开口和第二开口的通孔，并且包括膨胀部分，使得第一开口的开口面积大于膨胀部分的最下部分的开口面积，第一绝缘层，并且具有开口， 与通孔连通，并且具有小于第一开口的开口面积，设置在第一绝缘层上的第一布线层，设置在通孔的扩展部分上的第二绝缘层，以及覆盖通孔的第一开口和内壁表面的面积， 第二绝缘层，具有与第一绝缘层的开口连通的开口，以便通过第一绝缘层的开口露出第一布线层;以及第二布线层，设置在第二绝缘层上以从通孔的内部延伸，并且连接到第一布线 层通过第一和第二绝缘层的开口。

公开(公告)号：US07095112B2

公开(公告)日：2006-08-22

申请号：US10664150

申请日：2003-09-17

申请人： Mitsuyoshi Endo ,  Mie Matsuo ,  Chiaki Takubo

发明人： Mitsuyoshi Endo ,  Mie Matsuo ,  Chiaki Takubo

IPC分类号： H01L23/48 ,  H05K7/02 ,  H01L27/02

CPC分类号： H01L23/66 ,  H01L23/50 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19011 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05644 ,  H01L2224/45015 ,  H01L2924/207

摘要： Provided a semiconductor device including: a wiring board; a semiconductor chip having a pad electrically connected to a wiring on the wiring board; a second semiconductor chip provided on the wiring board at a position facing a side of the semiconductor chip, having passive elements integrated therein, and having pads for external connection to which both ends of the passive elements are connected respectively and at least one of which is electrically connected to the wiring on the wiring board electrically connected to the pad of the semiconductor chip.

摘要翻译： 提供一种半导体器件，包括：布线板; 半导体芯片，其具有电连接到所述布线板上的布线的焊盘; 第二半导体芯片，其设置在面对半导体芯片的一侧的位置处的布线板上，其中集成有无源元件，并且具有用于外部连接的焊盘，无源元件的两端分别连接到该衬垫，并且其中至少一个是 电连接到电连接到半导体芯片的焊盘的布线板上的布线。

公开(公告)号：US20100025860A1

公开(公告)日：2010-02-04

申请号：US12533492

申请日：2009-07-31

申请人： Kazumasa Tanida ,  Mie Matsuo ,  Masahiro Sekiguchi ,  Chiaki Takubo

发明人： Kazumasa Tanida ,  Mie Matsuo ,  Masahiro Sekiguchi ,  Chiaki Takubo

IPC分类号： H01L23/48 ,  H01L21/768

CPC分类号： H01L21/76898 ,  H01L23/481 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05548 ,  H01L2224/05573 ,  H01L2224/0558 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/05681 ,  H01L2224/05684 ,  H01L2224/05686 ,  H01L2224/13 ,  H01L2924/00014 ,  H01L2924/01074 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/01014 ,  H01L2924/01029

摘要： In one aspect of the present invention, a semiconductor device, may include a semiconductor substrate having a first surface and a second surface opposite to the first surface; a through hole in the semiconductor substrate, including an expansion portion which is provided in a vicinity of the first surface so that an opening area of the first opening is greater than an opening area of a lowermost portion of the expansion portion; a first insulating layer on the first surface of the semiconductor substrate; a first wiring layer on the first insulating layer to close the opening of the first insulating layer; a second insulating layer provided on the expansion portion of the through hole; and a second wiring layer on the second insulating layer to extend from inside of the through hole to the second surface of the semiconductor substrate.

摘要翻译： 在本发明的一个方面中，半导体器件可以包括具有第一表面和与第一表面相对的第二表面的半导体衬底; 半导体衬底中的通孔，包括设置在第一表面附近的膨胀部分，使得第一开口的开口面积大于膨胀部分的最下部分的开口面积; 在所述半导体衬底的第一表面上的第一绝缘层; 第一绝缘层上的第一布线层，用于封闭第一绝缘层的开口; 设置在通孔的膨胀部分上的第二绝缘层; 以及在所述第二绝缘层上的从所述通孔的内部延伸到所述半导体衬底的所述第二表面的第二布线层。

公开(公告)号：US06717251B2

公开(公告)日：2004-04-06

申请号：US09961332

申请日：2001-09-25

申请人： Mie Matsuo ,  Nobuo Hayasaka ,  Tsunetoshi Arikado ,  Hidemi Ishiuchi ,  Koji Sakui ,  Chiaki Takubo

发明人： Mie Matsuo ,  Nobuo Hayasaka ,  Tsunetoshi Arikado ,  Hidemi Ishiuchi ,  Koji Sakui ,  Chiaki Takubo

IPC分类号： H01L2302

CPC分类号： H01L25/0657 ,  H01L25/0652 ,  H01L25/16 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2225/06513 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/06596 ,  H01L2924/00014 ,  H01L2924/1627 ,  H01L2224/0401

摘要： Provided is a stacked type semiconductor device formed of a plurality of semiconductor integrated circuit devices stacked, each having a specification and including a semiconductor integrated circuit chip, wherein at least three of the semiconductor integrated circuit devices are stacked in the order of a value of the specification.

摘要翻译： 本发明提供一种层叠型半导体器件，其由堆叠的多个半导体集成电路器件形成，每个半导体集成电路器件具有规格并且包括半导体集成电路芯片，其中至少三个半导体集成电路器件按照 规范。

公开(公告)号：US07438481B2

公开(公告)日：2008-10-21

申请号：US11200045

申请日：2005-08-10

申请人： Hideo Numata ,  Chiaki Takubo ,  Hideto Furuyama ,  Hiroshi Hamasaki

发明人： Hideo Numata ,  Chiaki Takubo ,  Hideto Furuyama ,  Hiroshi Hamasaki

IPC分类号： G02B6/30 ,  G02B6/36

CPC分类号： G02B6/3644 ,  G02B6/3652 ,  G02B6/4201 ,  G02B6/4253 ,  G02B6/4255 ,  G02B6/428 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/1305 ,  H01L2924/15311 ,  H05K1/0274 ,  H01L2924/00 ,  H01L2224/0401

摘要： An optical semiconductor module comprises a guide which has a positioning portion for an optical transmission line, an optical semiconductor mounting surface from which one end face of the optical transmission line disposed in the positioning portion is exposed, and a wiring layer formed on the optical semiconductor mounting surface. An optical semiconductor element is mounted on the optical semiconductor mounting surface of the guide, with a light-emitting surface or a light-receiving surface thereof facing the one end face of the optical transmission line, and is electrically connected to the wiring layer.

摘要翻译： 光学半导体模块包括具有用于光传输线路的定位部分的引导件，设置在定位部分中的光传输线的一个端面从该半导体安装表面露出的光学半导体安装表面和形成在光学半导体上的布线层 安装面。 将光学半导体元件安装在引导件的光学半导体安装面上，其发光面或受光面朝向光传输线的一个端面，并与导线层电连接。

公开(公告)号：US07364369B2

公开(公告)日：2008-04-29

申请号：US11711862

申请日：2007-02-28

申请人： Wataru Sakurai ,  Kazuhito Saito ,  Hideo Numata ,  Chiaki Takubo ,  Hideto Furuyama ,  Hiroshi Hamasaki

发明人： Wataru Sakurai ,  Kazuhito Saito ,  Hideo Numata ,  Chiaki Takubo ,  Hideto Furuyama ,  Hiroshi Hamasaki

IPC分类号： G02B6/36

CPC分类号： G02B6/43 ,  G02B6/4202 ,  H01L2924/0002 ,  H01L2924/00

摘要： When a resin 59 to form a molded body 20 is poured and a lead frame 30 is attached to a front end face 21 of the molded body 20 by insert molding, protective leads 32 provided on both outsides of a lead pattern 31 of the lead frame 30 moderate the flow of the resin 59 and the force acting on the lead pattern 31 is decreased, so that misregistration of the lead pattern 31 can be prevented. Accordingly, the inserted and molded lead frame 30 can be wired on the front end face 21 of the molded body 20 for easily accomplishing three-dimensional electric wiring.

摘要翻译： 当浇铸形成模制体20的树脂59并且通过嵌件模制将引线框架30附接到模制体20的前端面21时，设置在引线框架的引线图案31的外侧的保护引线32 30使树脂59的流动缓和，并且作用在引线图案31上的力减小，从而可以防止引线图案31的不对准。 因此，插入成型的引线框架30可以布线在成型体20的前端面21上，以便于实现三维电线。