公开(公告)号：US07281667B2

公开(公告)日：2007-10-16

申请号：US10907761

申请日：2005-04-14

申请人： Mukta G. Farooq ,  Benjamin V. Fasano ,  Jason L. Frankel ,  Harvey C. Hamel ,  Suresh D Kadakia ,  David C. Long ,  Frank L. Pompeo ,  Sudipta K. Ray

发明人： Mukta G. Farooq ,  Benjamin V. Fasano ,  Jason L. Frankel ,  Harvey C. Hamel ,  Suresh D Kadakia ,  David C. Long ,  Frank L. Pompeo ,  Sudipta K. Ray

IPC分类号： G06K19/06

CPC分类号： G06K19/07381 ,  H01L23/04 ,  H01L23/055 ,  H01L23/10 ,  H01L23/576 ,  H01L25/0655 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15192 ,  H01L2924/3011 ,  H05K1/0275 ,  H05K1/0306 ,  H05K1/144 ,  H05K2201/09263 ,  H05K2201/10151

摘要： A tamper resistant, integrated circuit (IC) module includes a ceramic-based chip carrier, one or more integrated circuit chips attached to the chip carrier, and a cap structure attached to the chip carrier, covering the one or more integrated circuit chips. A conductive grid structure is formed in the chip carrier and cap structure, the conductive structure having a plurality of meandering lines disposed in an x-direction, a y-direction, and a z-direction. The conductive grid structure is configured so as to detect an attempt to penetrate the IC module.

摘要翻译： 防干扰集成电路（IC）模块包括陶瓷芯片载体，附接到芯片载体的一个或多个集成电路芯片，以及附接到芯片载体的覆盖一个或多个集成电路芯片的盖结构。 在芯片载体和盖结构中形成导电栅格结构，该导电结构具有沿x方向，y方向和z方向设置的多条曲折线。 导电栅格结构被配置为检测穿透IC模块的尝试。

公开(公告)号：US07472836B2

公开(公告)日：2009-01-06

申请号：US11768312

申请日：2007-06-26

申请人： Mukta G. Farooq ,  Benjamin V. Fasano ,  Jason L. Frankel ,  Harvey C. Hamel ,  Suresh D. Kadakia ,  David C. Long ,  Frank L. Pompeo ,  Sudipta K. Ray

发明人： Mukta G. Farooq ,  Benjamin V. Fasano ,  Jason L. Frankel ,  Harvey C. Hamel ,  Suresh D. Kadakia ,  David C. Long ,  Frank L. Pompeo ,  Sudipta K. Ray

IPC分类号： G06K19/05

CPC分类号： G06K19/07381 ,  H01L23/04 ,  H01L23/055 ,  H01L23/10 ,  H01L23/576 ,  H01L25/0655 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15192 ,  H01L2924/3011 ,  H05K1/0275 ,  H05K1/0306 ,  H05K1/144 ,  H05K2201/09263 ,  H05K2201/10151

摘要： A tamper resistant, integrated circuit (IC) module includes a ceramic-based chip carrier, one or more integrated circuit chips attached to the chip carrier, and a cap structure attached to the chip carrier, covering the one or more integrated circuit chips. A conductive grid structure is formed in the chip carrier and cap structure, the conductive structure having a plurality of meandering lines disposed in an x-direction, a y-direction, and a z-direction. The conductive grid structure is configured so as to detect an attempt to penetrate the IC module.

摘要翻译： 防干扰集成电路（IC）模块包括陶瓷芯片载体，附接到芯片载体的一个或多个集成电路芯片，以及附接到芯片载体的覆盖一个或多个集成电路芯片的盖结构。 在芯片载体和盖结构中形成导电栅格结构，该导电结构具有沿x方向，y方向和z方向设置的多条曲折线。 导电栅格结构被配置为检测穿透IC模块的尝试。

公开(公告)号：US07806341B2

公开(公告)日：2010-10-05

申请号：US12348364

申请日：2009-01-05

申请人： Mukta G. Farooq ,  Benjamin V. Fasano ,  Jason L. Frankel ,  Harvey C. Hamel ,  Suresh D. Kadakia ,  David C. Long ,  Frank L. Pompeo ,  Sudipta K. Ray

发明人： Mukta G. Farooq ,  Benjamin V. Fasano ,  Jason L. Frankel ,  Harvey C. Hamel ,  Suresh D. Kadakia ,  David C. Long ,  Frank L. Pompeo ,  Sudipta K. Ray

IPC分类号： G06K19/05

CPC分类号： G06K19/07381 ,  H01L23/04 ,  H01L23/055 ,  H01L23/10 ,  H01L23/576 ,  H01L25/0655 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15192 ,  H01L2924/3011 ,  H05K1/0275 ,  H05K1/0306 ,  H05K1/144 ,  H05K2201/09263 ,  H05K2201/10151

摘要： A tamper resistant, integrated circuit (IC) module includes a ceramic-based chip carrier; one or more integrated circuit chips attached to a top surface of the chip carrier; a ceramic-based cap structure attached to the top surface of the chip carrier, and covering the one or more integrated circuit chips; and a conductive grid structure embedded within the chip carrier and the cap structure, the conductive grid structure having a plurality of meandering lines disposed in an x-direction, a y-direction, and a z-direction; wherein the conductive grid structure is configured so as to detect an attempt to penetrate the IC module.

摘要翻译： 防篡改集成电路（IC）模块包括陶瓷芯片载体; 一个或多个集成电路芯片，附接到芯片载体的顶表面; 一个陶瓷基帽结构，附着在芯片载体的顶表面上，并覆盖一个或多个集成电路芯片; 以及嵌入在所述芯片载体和所述盖结构内的导电栅格结构，所述导电栅格结构具有设置在x方向，y方向和z方向上的多个曲折线; 其中所述导电栅格结构被配置为检测穿透所述IC模块的尝试。

公开(公告)号：US20090145973A1

公开(公告)日：2009-06-11

申请号：US12348364

申请日：2009-01-05

申请人： Mukta G. Farooq ,  Benjamin V. Fasano ,  Jason L. Frankel ,  Harvey C. Hamel ,  Suresh D. Kadakia ,  David C. Long ,  Frank L. Pompeo ,  Sudipta K. Ray

发明人： Mukta G. Farooq ,  Benjamin V. Fasano ,  Jason L. Frankel ,  Harvey C. Hamel ,  Suresh D. Kadakia ,  David C. Long ,  Frank L. Pompeo ,  Sudipta K. Ray

IPC分类号： G06K19/06

CPC分类号： G06K19/07381 ,  H01L23/04 ,  H01L23/055 ,  H01L23/10 ,  H01L23/576 ,  H01L25/0655 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15192 ,  H01L2924/3011 ,  H05K1/0275 ,  H05K1/0306 ,  H05K1/144 ,  H05K2201/09263 ,  H05K2201/10151

摘要： A tamper resistant, integrated circuit (IC) module includes a ceramic-based chip carrier; one or more integrated circuit chips attached to a top surface of the chip carrier; a ceramic-based cap structure attached to the top surface of the chip carrier, and covering the one or more integrated circuit chips; and a conductive grid structure embedded within the chip carrier and the cap structure, the conductive grid structure having a plurality of meandering lines disposed in an x-direction, a y-direction, and a z-direction; wherein the conductive grid structure is configured so as to detect an attempt to penetrate the IC module.

摘要翻译： 防篡改集成电路（IC）模块包括陶瓷芯片载体; 一个或多个集成电路芯片，附接到芯片载体的顶表面; 一个陶瓷基帽结构，附着在芯片载体的顶表面上，并覆盖一个或多个集成电路芯片; 以及嵌入在所述芯片载体和所述盖结构内的导电栅格结构，所述导电栅格结构具有设置在x方向，y方向和z方向上的多个曲折线; 其中所述导电栅格结构被配置为检测穿透所述IC模块的尝试。

公开(公告)号：US5243140A

公开(公告)日：1993-09-07

申请号：US771707

申请日：1991-10-04

申请人： Harsaran S. Bhatia ,  Mario J. Interrante ,  Suresh D. Kadakia ,  Shashi D. Malaviya ,  Mark H. McLeod ,  Sudipta K. Ray ,  Herbert I. Stoller

发明人： Harsaran S. Bhatia ,  Mario J. Interrante ,  Suresh D. Kadakia ,  Shashi D. Malaviya ,  Mark H. McLeod ,  Sudipta K. Ray ,  Herbert I. Stoller

IPC分类号： H01L23/12 ,  H01L21/48 ,  H01L23/538

CPC分类号： H01L23/5382 ,  H01L21/485 ,  H01L2224/16225 ,  H01L2924/19107

摘要： A direct distribution wiring system is provided which facilitates the effecting of repair or engineering change in a Multi-chip module (MCM) while eliminating the need for redistribution and/or buried connections between IC attachment pads and engineering change pads, thus eliminating the need for patterned conductor layers corresponding to such functions. The operation of the MCM is improved by the wiring system allowing the reduction of lumped capacitances by disconnection of defective conductors, accomplished by providing severable connectors in a direct distribution structure, as well as the elimination of redistribution wiring layers and increased IC density on the MCM. Full potential fault coverage as well as full discretion in reversible engineering changes is provided by forming all elements of the wiring system on the surface of the device.

公开(公告)号：US06548909B2

公开(公告)日：2003-04-15

申请号：US09825512

申请日：2001-04-03

申请人： Peter J. Brofman ,  Sudipta K. Ray ,  Kathleen A. Stalter

发明人： Peter J. Brofman ,  Sudipta K. Ray ,  Kathleen A. Stalter

IPC分类号： H01L2144

CPC分类号： H01L24/81 ,  H01L23/49827 ,  H01L2224/13147 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/3511 ,  H05K3/325 ,  H05K2201/0367 ,  H05K2201/09481 ,  H05K2201/10378 ,  H01L2924/00

摘要： A method of interconnecting electronic components by using a plurality of conductive studs on a surface of a first electronic component and a plurality of corresponding conductive vias on the surface of a second electronic component. Camber on the surface of electronic components may be overcome by coating the surface with a dielectric, planarizing the dielectric, and forming conductive vias corresponding to the contact pads thereon. The conductive studs are substantially lead-free and preferably comprise of copper.

摘要翻译： 一种通过使用第一电子部件的表面上的多个导电柱和在第二电子部件的表面上的多个对应的导电通孔来互连电子部件的方法。 可以通过用电介质涂覆表面来平衡电介质，并形成对应于其上的接触焊盘的导电通孔来克服电子部件表面上的弯曲。 导电柱基本上是无铅的，优选地包括铜。

公开(公告)号：US06360938B1

公开(公告)日：2002-03-26

申请号：US09794597

申请日：2001-02-27

申请人： Stephen A. DeLaurentis ,  Mario J. Interrante ,  Raymond A. Jackson ,  John U. Knickerbocker ,  Sudipta K. Ray ,  Kathleen A. Stalter

发明人： Stephen A. DeLaurentis ,  Mario J. Interrante ,  Raymond A. Jackson ,  John U. Knickerbocker ,  Sudipta K. Ray ,  Kathleen A. Stalter

IPC分类号： B23K1018

摘要： A process and apparatus for removing flip chips with C4 joints mounted on a multi-chip module by applying a tensile force to one or more removal member bonded to the back of one or more flip chips during heating of the module to a temperature sufficient to cause the C4 joints to become molten. The tensile force can either be a compressed spring, or a bi-metallic member which is flat at room temperature and becomes curved when heated to such temperature, or a memory alloy whose original shape is curved and which is bent flat at room temperature but returns to its original curved shape when heated to such temperature. An adhesive is used to bond the removal member to the chip to be removed and is a low temperature, fast curing adhesive with high temperature tolerance after curing.

公开(公告)号：US06350625B1

公开(公告)日：2002-02-26

申请号：US09753272

申请日：2000-12-28

申请人： Mitchell S. Cohen ,  William K. Hogan ,  Sudipta K. Ray ,  James L. Speidell ,  S. Jay Chey ,  Steven A. Cordes

发明人： Mitchell S. Cohen ,  William K. Hogan ,  Sudipta K. Ray ,  James L. Speidell ,  S. Jay Chey ,  Steven A. Cordes

IPC分类号： H01L2144

CPC分类号： H01L24/11 ,  H01L33/486 ,  H01L33/62 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/30107 ,  H01S5/02268 ,  H01S5/02272 ,  H01S5/02284 ,  H01S5/183

摘要： A novel optoelectronic packaging submount arrangement which incorporates a 90° C. electrical conductor turn, and more specifically methods of producing optoelectronic packaging submount arrangement incorporating 90° C. electrical conductor turns.

摘要翻译： 一种新颖的光电封装基座装置，其结合了90 C.电导体转弯，更具体地说，制造了包含90 C.电导线的光电封装基座装置的方法

公开(公告)号：US06283359B1

公开(公告)日：2001-09-04

申请号：US09644486

申请日：2000-08-23

申请人： Peter J. Brofman ,  Mark G. Courtney ,  Shaji Farooq ,  Mario J. Interrante ,  Raymond A. Jackson ,  Gregory B. Martin ,  Sudipta K. Ray ,  William E. Sablinski ,  Kathleen A. Stalter

发明人： Peter J. Brofman ,  Mark G. Courtney ,  Shaji Farooq ,  Mario J. Interrante ,  Raymond A. Jackson ,  Gregory B. Martin ,  Sudipta K. Ray ,  William E. Sablinski ,  Kathleen A. Stalter

IPC分类号： B23K3102

CPC分类号： H01L24/12 ,  B23K35/0222 ,  B23K35/0244 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/16 ,  H01L2224/1184 ,  H01L2224/13099 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15787 ,  H05K3/3436 ,  H05K2201/10992 ,  H05K2203/041 ,  H05K2203/0415 ,  H05K2203/0435 ,  Y02P70/613 ,  Y10T428/12687 ,  Y10T428/2991 ,  H01L2224/29099 ,  H01L2924/00

摘要： This invention relates to a solder structure which provides enhanced fatigue life properties when used to bond substrates particularly at the second level such as BGA and CGA interconnections. The solder structure is preferably a sphere or column and has a metal layer wettable by solder and the structure is used to make solder connections in electronic components such as joining an electronic module such as a chip connected to a MLC which module is connected to a circuit board. The solder structure preferably has an overcoat of solder on the metal layer to provide a passivation coating to the metal layer to keep it clean from oxidation and corrosion and also provide a wettable surface for attachment of the solder structure to solder on the pads of the substrate being bonded.

摘要翻译： 本发明涉及一种焊料结构，当用于特别是在第二层（例如BGA和CGA互连）的基材上时，其提供增强的疲劳寿命特性。 焊料结构优选是球形或柱状，并且具有可被焊料润湿的金属层，并且该结构用于在电子部件中形成焊接连接​​，例如连接诸如连接到MLC的芯片的电子模块，该模块连接到电路 板。 焊料结构优选地在金属层上具有焊料的外涂层，以向金属层提供钝化涂层以保持其免于氧化和腐蚀，并且还提供用于将焊料结构附着到衬底的焊盘上的焊料的可润湿表面 被绑定。

公开(公告)号：US06220499B1

公开(公告)日：2001-04-24

申请号：US09163150

申请日：1998-09-29

申请人： Peter J. Brofman ,  Shaji Faroog ,  John U. Knickerbocker ,  Scott I. Langenthal ,  Sudipta K. Ray ,  Kathleen A. Stalter

发明人： Peter J. Brofman ,  Shaji Faroog ,  John U. Knickerbocker ,  Scott I. Langenthal ,  Sudipta K. Ray ,  Kathleen A. Stalter

IPC分类号： B23K3100

CPC分类号： H01L21/67144 ,  H01L21/4853 ,  H01L24/81 ,  H01L2224/10135 ,  H01L2224/10165 ,  H01L2224/13144 ,  H01L2224/81136 ,  H01L2224/81138 ,  H01L2224/81801 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01076 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15787 ,  H05K3/3436 ,  H05K2201/0379 ,  H05K2203/0278 ,  Y02P70/613 ,  H01L2924/00

摘要： A semiconductor device having C-4 solder connections is joined to a chip carrier having pads suitable for receiving the C-4 solder connections. Sacrificial solder is formed on the chip carrier pads and then planarized to result in a good, planar surface profile for joining to the semiconductor device.

摘要翻译： 具有C-4焊接连接的半导体器件被连接到具有适于接收C-4焊料连接的焊盘的芯片载体。 牺牲焊料形成在芯片载体焊盘上，然后被平坦化以产生用于接合到半导体器件的良好的平坦表面轮廓。