公开(公告)号：US20120286433A1

公开(公告)日：2012-11-15

申请号：US13478076

申请日：2012-05-22

Applicant: Minhua Lu ,  Eric D. Pefecto ,  David L. Questad ,  Sudipta K. Ray

Inventor： Minhua Lu ,  Eric D. Pefecto ,  David L. Questad ,  Sudipta K. Ray

IPC: H01L23/488 ,  H01L21/60

CPC classification number: H01L24/05 ,  H01L24/13 ,  H01L2224/0231 ,  H01L2224/0233 ,  H01L2224/0401 ,  H01L2224/05082 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/13022 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01076 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/1461 ,  Y10T29/49117 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00

Abstract: An electrical conductor is connected to a first microcircuit element having a first connector site axis and a second microcircuit having a second connector site axis. The first microcircuit and the second microcircuit are separated by and operatively associated with a first electrical insulator layer. The conductor and the first microcircuit element are separated by and operatively associated with a second electrical insulator layer. At least one of the first electrical insulator layer and the second electrical insulator layer comprise a polymeric material. The microcircuit includes a UBM and solder connection to a FBEOL via opening. Sufficiently separating the first connector site axis and the second connector site axis so they are not concentric, decouples the UBM and solder connection to the FBEOL via opening. This eliminates or minimizes electromigration and the white bump problems. A process comprises manufacturing the microcircuit.

Abstract translation: 电导体连接到具有第一连接器位置轴的第一微电路元件和具有第二连接器位置轴的第二微电路。 第一微电路和第二微电路由第一电绝缘体层分离并且与第一电绝缘体层可操作地相关联。 导体和第一微电路元件由第二电绝缘体层分离并且可操作地与第二电绝缘体层相连。 第一电绝缘体层和第二电绝缘体层中的至少一个包含聚合材料。 微电路包括UBM和通过开口焊接到FBEOL的焊接。 将第一连接器位置轴和第二连接器位置轴线充分分离，使其不同心，通过打开将UBM和焊接连接断开到FBEOL。 这消除或最小化电迁移和白色凸起问题。 一种方法包括制造微电路。

公开(公告)号：US08227918B2

公开(公告)日：2012-07-24

申请号：US12560769

申请日：2009-09-16

Applicant: Minhua Lu ,  Eric D. Pefecto ,  David L. Questad ,  Sudipta K. Ray

Inventor： Minhua Lu ,  Eric D. Pefecto ,  David L. Questad ,  Sudipta K. Ray

IPC: H01L23/48

CPC classification number: H01L24/05 ,  H01L24/13 ,  H01L2224/0231 ,  H01L2224/0233 ,  H01L2224/0401 ,  H01L2224/05082 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/13022 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01076 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/1461 ,  Y10T29/49117 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00

Abstract: A microcircuit article of manufacture comprises an electrical conductor electrically connected to both a first microcircuit element at a site comprising a first connector site having a first connector site axis and a second microcircuit element at a site comprising a second connector site having a second connector site axis. The first microcircuit element and the second microcircuit element are separated by and operatively associated with a layer comprising a first electrical insulator, whereas the conductor and the first microcircuit element are separated by and operatively associated with a layer comprising a second electrical insulator. At least one of the first electrical insulator layer and the second electrical insulator layer comprise a polymeric electrical insulator. In another embodiment, both electrical insulator layers comprise polymeric insulator layers. The microcircuit includes a UBM and solder connection to a FBEOL via opening. Sufficiently separating the first connector site axis and the second connector site axis so they are not concentric decouples the UBM and solder connection to the FBEOL via opening to substantially eliminate or minimize inter alia, electromigration and the white bump problem typical of lead free solders employed in C4 systems. A process comprises manufacturing this type of microcircuit article.

Abstract translation: 微电路制品包括电连接到第一微电路元件的电导体，该第一微电路元件包括具有第一连接器位置轴线的第一连接器位置和位于包括具有第二连接器位置轴线的第二连接器位置的第二微电路元件 。 第一微电路元件和第二微电路元件由包括第一电绝缘体的层分离并且可操作地相关联，而导体和第一微电路元件由包括第二电绝缘体的层分开并且可操作地与包含第二电绝缘体的层相连。 第一电绝缘体层和第二电绝缘体层中的至少一个包括聚合物电绝缘体。 在另一个实施例中，两个电绝缘体层包括聚合物绝缘体层。 微电路包括UBM和通过开口焊接到FBEOL的焊接。 足够地分离第一连接器位置轴和第二连接器位置轴线，使得它们不使UBM和FBEOL通过开口的焊接连接同步解耦，以基本上消除或最小化电迁移和典型的无铅焊料的白色凸起问题 C4系统。 一种方法包括制造这种类型的微电路制品。

公开(公告)号：US20110063815A1

公开(公告)日：2011-03-17

申请号：US12560769

申请日：2009-09-16

Applicant: Minhua Lu ,  Eric D. Perfecto ,  David L. Questad ,  Sudipta K. Ray

Inventor： Minhua Lu ,  Eric D. Perfecto ,  David L. Questad ,  Sudipta K. Ray

IPC: H05K1/14 ,  H01R43/00

CPC classification number: H01L24/05 ,  H01L24/13 ,  H01L2224/0231 ,  H01L2224/0233 ,  H01L2224/0401 ,  H01L2224/05082 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/13022 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01076 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/1461 ,  Y10T29/49117 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00

Abstract: A microcircuit article of manufacture comprises an electrical conductor electrically connected to both a first microcircuit element at a site comprising a first connector site having a first connector site axis and a second microcircuit element at a site comprising a second connector site having a second connector site axis. The first microcircuit element and the second microcircuit element are separated by and operatively associated with a layer comprising a first electrical insulator, whereas the conductor and the first microcircuit element are separated by and operatively associated with a layer comprising a second electrical insulator. At least one of the first electrical insulator layer and the second electrical insulator layer comprise a polymeric electrical insulator. In another embodiment, both electrical insulator layers comprise polymeric insulator layers. The microcircuit includes a UBM and solder connection to a FBEOL via opening. Sufficiently separating the first connector site axis and the second connector site axis so they are not concentric decouples the UBM and solder connection to the FBEOL via opening to substantially eliminate or minimize inter alia, electromigration and the white bump problem typical of lead free solders employed in C4 systems. A process comprises manufacturing this type of microcircuit article.

Abstract translation: 微电路制品包括电连接到第一微电路元件的电导体，该第一微电路元件包括具有第一连接器位置轴线的第一连接器位置和位于包括具有第二连接器位置轴线的第二连接器位置的第二微电路元件 。 第一微电路元件和第二微电路元件由包括第一电绝缘体的层分离并且可操作地相关联，而导体和第一微电路元件由包括第二电绝缘体的层分开并且可操作地与包含第二电绝缘体的层相连。 第一电绝缘体层和第二电绝缘体层中的至少一个包括聚合物电绝缘体。 在另一个实施例中，两个电绝缘体层包括聚合物绝缘体层。 微电路包括UBM和通过开口焊接到FBEOL的焊接。 足够地分离第一连接器位置轴和第二连接器位置轴线，使得它们不使UBM和FBEOL通过开口的焊接连接同步解耦，以基本上消除或最小化电迁移和典型的无铅焊料的白色凸起问题 C4系统。 一种方法包括制造这种类型的微电路制品。

公开(公告)号：US07472836B2

公开(公告)日：2009-01-06

申请号：US11768312

申请日：2007-06-26

Applicant: Mukta G. Farooq ,  Benjamin V. Fasano ,  Jason L. Frankel ,  Harvey C. Hamel ,  Suresh D. Kadakia ,  David C. Long ,  Frank L. Pompeo ,  Sudipta K. Ray

Inventor： Mukta G. Farooq ,  Benjamin V. Fasano ,  Jason L. Frankel ,  Harvey C. Hamel ,  Suresh D. Kadakia ,  David C. Long ,  Frank L. Pompeo ,  Sudipta K. Ray

IPC: G06K19/05

CPC classification number: G06K19/07381 ,  H01L23/04 ,  H01L23/055 ,  H01L23/10 ,  H01L23/576 ,  H01L25/0655 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15192 ,  H01L2924/3011 ,  H05K1/0275 ,  H05K1/0306 ,  H05K1/144 ,  H05K2201/09263 ,  H05K2201/10151

Abstract: A tamper resistant, integrated circuit (IC) module includes a ceramic-based chip carrier, one or more integrated circuit chips attached to the chip carrier, and a cap structure attached to the chip carrier, covering the one or more integrated circuit chips. A conductive grid structure is formed in the chip carrier and cap structure, the conductive structure having a plurality of meandering lines disposed in an x-direction, a y-direction, and a z-direction. The conductive grid structure is configured so as to detect an attempt to penetrate the IC module.

Abstract translation: 防干扰集成电路（IC）模块包括陶瓷芯片载体，附接到芯片载体的一个或多个集成电路芯片，以及附接到芯片载体的覆盖一个或多个集成电路芯片的盖结构。 在芯片载体和盖结构中形成导电栅格结构，该导电结构具有沿x方向，y方向和z方向设置的多条曲折线。 导电栅格结构被配置为检测穿透IC模块的尝试。

公开(公告)号：US06878608B2

公开(公告)日：2005-04-12

申请号：US09870531

申请日：2001-05-31

Applicant: Peter J. Brofman ,  Glenn G. Daves ,  Sudipta K. Ray ,  Herbert I. Stoller

Inventor： Peter J. Brofman ,  Glenn G. Daves ,  Sudipta K. Ray ,  Herbert I. Stoller

IPC: H01L21/48 ,  H01L21/68 ,  H01L21/46 ,  H01L21/30 ,  H01L21/302 ,  H01L21/44 ,  H01L21/4763

CPC classification number: H01L21/6835 ,  H01L21/486 ,  H01L24/16 ,  H01L2221/6834 ,  H01L2221/68345 ,  H01L2221/68354 ,  H01L2221/68363 ,  H01L2224/16237 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/00

Abstract: A silicon based package (SBP) is formed starting with a thick wafer, which serves as the base for the SBP, composed of silicon which has a first surface and a reverse surface which are planar. Then form an interconnection structure including multilayer conductor patterns over the first surface. Form a temporary bond between the SBP and a wafer holder, with the wafer holder being a rigid structure. Thin the wafer to a desired thickness to form an Ultra Thin Silicon Wafer (UTSW) for the SBP. Forming via holes which extend through the UTSW, forming metallization in the via holes which extends through the UTSW, making electrical contact to the interconnection structure on the first surface. Then bond the metallization in the via holes to pads of a carrier.

Abstract translation: 基于硅的封装（SBP）从用作SBP的基底的厚晶片开始形成，所述基板由具有平坦的第一表面和反面的硅组成。 然后在第一表面上形成包括多层导体图案的互连结构。 在SBP和晶片保持器之间形成临时结合，晶片保持器是刚性结构。 将晶片细化至所需厚度，以形成SBP的超薄硅片（UTSW）。 形成穿过UTSW的孔，在穿过UTSW的通孔中形成金属化，与第一表面上的互连结构电接触。 然后将通孔中的金属化物接合到载体的焊盘。

公开(公告)号：US06827505B2

公开(公告)日：2004-12-07

申请号：US10320844

申请日：2002-12-16

Applicant: Subhash L. Shinde ,  L. Wynn Herron ,  Mario J. Interrante ,  How T. Lin ,  Steven P. Ostrander ,  Sudipta K. Ray ,  William E. Sablinski ,  Hilton Toy

Inventor： Subhash L. Shinde ,  L. Wynn Herron ,  Mario J. Interrante ,  How T. Lin ,  Steven P. Ostrander ,  Sudipta K. Ray ,  William E. Sablinski ,  Hilton Toy

IPC: G02B636

CPC classification number: G02B6/4201 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/00014

Abstract: An optical-electronic package for an electronic device provides electrical connections to the electronic device and optical fiber connections to the electronic device. The package includes a high thermal conductivity base which has a pedestal to support and provide heat transfer connection to the electronic device. A seal band is formed on the base and a casing is bonded to the seal band. The casing has side feedthroughs for the electrical connections from the electronic device, and the casing has top feedthroughs or grooves for the optical fiber connections from the electronic device. A lid is hermetically sealed to the top of the casing. The lid has retractable means for forming a bend in the optical fibers to provide strain relief when the lid is placed on the casing. The retractable means for forming a bend in the optical fibers is retractable once the lid is sealed on the casing.

公开(公告)号：US06657313B1

公开(公告)日：2003-12-02

申请号：US09233385

申请日：1999-01-19

Applicant: Peter J. Brofman ,  Shaji Faroon ,  John U. Knickerbocker ,  Scott I. Langenthal ,  Sudipta K. Ray ,  Kathleen A. Stalter

Inventor： Peter J. Brofman ,  Shaji Faroon ,  John U. Knickerbocker ,  Scott I. Langenthal ,  Sudipta K. Ray ,  Kathleen A. Stalter

IPC: H01L2348

CPC classification number: H05K3/3436 ,  H01L23/49827 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/09701 ,  H05K2201/10378 ,  H05K2201/10424 ,  H05K2201/10674 ,  H05K2203/0415 ,  Y02P70/613 ,  Y10T29/49144 ,  Y10T29/49149 ,  H01L2224/05599

Abstract: A device for preventing short circuits between solder joints in flip chip packaging. The dielectric interposer has a plurality of apertures or vias which correspond to the I/O pads on a chip and substrate. Preferably, the interposer comprises a polyester film, glass, alumina, polyimide, a heat curable polymer or an inorganic powder filler in an organic material. More preferably, the interposer contains an adhesive or has adhesive layers disposed on the linear surfaces of the interposer. Cone shaped solder elements are formed within the apertures of the interposer. The dielectric interposer is positioned between a chip and substrate in an electronic module and thermally reflowed to create an electrical and mechanical interconnection. The interposer prohibits contact between the solder joints by isolating each of the joints and corresponding bonding pads. The interposer also prevents over compression of the solder joints by acting as a stand off.

Abstract translation: 一种用于防止倒装芯片封装中焊点之间短路的装置。 电介质插入件具有与芯片和基板上的I / O焊盘对应的多个孔或通孔。 优选地，中间层包括有机材料中的聚酯膜，玻璃，氧化铝，聚酰亚胺，可热固化聚合物或无机粉末填料。 更优选地，插入件包含粘合剂或者具有设置在插入件的线性表面上的粘合剂层。 锥形焊料元件形成在插入件的孔内。 电介质插入件位于电子模块中的芯片和衬底之间并被热回流以产生电气和机械互连。 插入器通过隔离每个接头和相应的接合焊盘来禁止焊点之间的接触。 插入器还通过作为支架来防止焊点的过度压缩。

公开(公告)号：US06216937B1

公开(公告)日：2001-04-17

申请号：US09470455

申请日：1999-12-22

Applicant: Stephen A. DeLaurentis ,  Mario J. Interrante ,  Raymond A. Jackson ,  John U. Knickerbocker ,  Sudipta K. Ray ,  Kathleen A. Stalter

Inventor： Stephen A. DeLaurentis ,  Mario J. Interrante ,  Raymond A. Jackson ,  John U. Knickerbocker ,  Sudipta K. Ray ,  Kathleen A. Stalter

IPC: B23K100

CPC classification number: H01L21/687 ,  B23K1/018 ,  H01L24/98

Abstract: A process and apparatus for removing flip chips with C4 joints mounted on a multi-chip module by applying a tensile force to one or more removal member bonded to the back of one or more flip chips during heating of the module to a temperature sufficient to cause the C4 joints to become molten. The tensile force can either be a compressed spring, or a bimetallic member which is flat at room temperature and becomes curved when heated to such temperature, or a memory alloy whose original shape is curved and which is bent flat at room temperature but returns to its original curved shape when heated to such temperature. An adhesive is used to bond the removal member to the chip to be removed and is a low temperature, fast curing adhesive with high temperature tolerance after curing.

Abstract translation: 一种用于通过在将模块加热到足以导致的温度的温度下向一个或多个倒装芯片的背面施加张力而将一个或多个去除构件施加拉力而移除通过安装在多芯片模块上的C4接头的倒装芯片的方法和装置 C4接头变得熔化。 张力可以是压缩弹簧，也可以是在室温下平坦并在加热到这样的温度时变得弯曲的双金属构件，或者原始形状是弯曲的并且在室温下弯曲平坦但回到其中的记忆合金 原来弯曲的形状加热到这样的温度。 使用粘合剂将去除构件粘合到要去除的芯片上，并且是固化后具有耐高温性的低温快速固化粘合剂。

公开(公告)号：US5243140A

公开(公告)日：1993-09-07

申请号：US771707

申请日：1991-10-04

Applicant: Harsaran S. Bhatia ,  Mario J. Interrante ,  Suresh D. Kadakia ,  Shashi D. Malaviya ,  Mark H. McLeod ,  Sudipta K. Ray ,  Herbert I. Stoller

Inventor： Harsaran S. Bhatia ,  Mario J. Interrante ,  Suresh D. Kadakia ,  Shashi D. Malaviya ,  Mark H. McLeod ,  Sudipta K. Ray ,  Herbert I. Stoller

IPC: H01L23/12 ,  H01L21/48 ,  H01L23/538

CPC classification number: H01L23/5382 ,  H01L21/485 ,  H01L2224/16225 ,  H01L2924/19107

Abstract: A direct distribution wiring system is provided which facilitates the effecting of repair or engineering change in a Multi-chip module (MCM) while eliminating the need for redistribution and/or buried connections between IC attachment pads and engineering change pads, thus eliminating the need for patterned conductor layers corresponding to such functions. The operation of the MCM is improved by the wiring system allowing the reduction of lumped capacitances by disconnection of defective conductors, accomplished by providing severable connectors in a direct distribution structure, as well as the elimination of redistribution wiring layers and increased IC density on the MCM. Full potential fault coverage as well as full discretion in reversible engineering changes is provided by forming all elements of the wiring system on the surface of the device.

公开(公告)号：US4489364A

公开(公告)日：1984-12-18

申请号：US337057

申请日：1981-12-31

Applicant: Dudley A. Chance ,  Alan Platt ,  Chung W. Ho ,  Sudipta K. Ray

Inventor： Dudley A. Chance ,  Alan Platt ,  Chung W. Ho ,  Sudipta K. Ray

IPC: H01L23/52 ,  H01L23/538 ,  H05K1/00 ,  H05K3/22 ,  H05K1/18

CPC classification number: H01L23/5383 ,  H01L23/5382 ,  H05K1/0292 ,  H01L2924/0002 ,  H01L2924/01014 ,  H01L2924/01039 ,  H01L2924/01067 ,  H01L2924/01079 ,  H01L2924/15192 ,  H01L2924/19041 ,  H01L2924/3011 ,  H05K1/0298 ,  H05K2203/175

Abstract: A chip carrying module includes a number of engineering change lines buried below the surface of the module. The engineering change lines are interrupted periodically to provide a set of vias extending up to the upper surface of the module between each set of chips where the vias are connected by dumbbell-shaped pads including a narrow link which permits laser deletion or the like. In addition, the dumbbell-shaped pads are located adjacent to the fan-out pads for the chips. Thus, the fan-out pads can be connected to the dumbbell-shaped pads by means of fly-wires. In addition, individual engineering change lines can be connected together to reach every region of the module by connecting a fly-wire from one dumbbell-shaped pad to another. In addition, by deleting the links at such dumbbell-shaped pads, the engineering change connections are limited to the particular path required.

Abstract translation: 芯片承载模块包括埋在模块表面下方的多个工程变换线。 工程变更线周期性地中断，以提​​供在每组芯片之间延伸到模块上表面的一组通孔，其中通孔由包括允许激光删除等的窄链接的哑铃形焊盘连接。 此外，哑铃形垫位于与芯片的扇出焊盘相邻的位置。 因此，扇出垫可以通过飞线连接到哑铃形垫。 此外，通过将来自一个哑铃形垫的飞线连接到另一个，可以将各个工程变换线连接在一起以到达模块的每个区域。 另外，通过删除这种哑铃形焊盘处的链接，工程变更连接被限制到所需的特定路径。