公开(公告)号：US20050151061A1

公开(公告)日：2005-07-14

申请号：US10889125

申请日：2004-07-13

Applicant: Mutsuo Ogura ,  Yasushi Nagamune ,  Takeyoshi Sugaya

Inventor： Mutsuo Ogura ,  Yasushi Nagamune ,  Takeyoshi Sugaya

IPC: H01L31/10 ,  H01L31/00

CPC classification number: B82Y10/00 ,  B82Y20/00 ,  H01L31/035236

Abstract: Quantum wire is formed on the bottom of a V-shaped groove in a V-grooved substrate as a channel between source and drain electrodes or as at least part of the channel. A photocarrier accumulation region is provided within the quantum wire or at a position connected to or adjacent to the quantum wire for accumulating charges generated when light shines onto a photosensitive region that comprises at least a clad layer that covers the quantum wire. A recess is provided in the upper clad layer to localize the photocarrier accumulation region. As a result, it is possible to provide a photodetector that exhibits high sensitivity, high speed and low power consumption in an expanded wavelength region. It is also possible to provide a photodetector capable of constructing core portions thereof by one-time selective growth.

Abstract translation: 量子线形成在V沟槽衬底中的V形槽的底部上，作为源电极和漏电极之间的沟道或者作为沟道的至少一部分。 在量子线内或位于与量子线连接或相邻的位置处设置光载流子积聚区域，用于当光照射到至少包括覆盖量子线的覆层的光敏区域时产生的电荷。 在上包层中设置凹部以使光载流子积聚区域定位。 结果，可以提供在扩展波长区域中显示出高灵敏度，高速度和低功耗的光电检测器。 还可以提供能够通过一次选择性生长来构造其核心部分的光电检测器。

公开(公告)号：US07015453B2

公开(公告)日：2006-03-21

申请号：US10889125

申请日：2004-07-13

Applicant: Mutsuo Ogura ,  Yasushi Nagamune ,  Takeyoshi Sugaya

Inventor： Mutsuo Ogura ,  Yasushi Nagamune ,  Takeyoshi Sugaya

IPC: H01L29/06

CPC classification number: B82Y10/00 ,  B82Y20/00 ,  H01L31/035236

Abstract: Quantum wire is formed on the bottom of a V-shaped groove in a V-grooved substrate as a channel between source and drain electrodes or as at least part of the channel. A photocarrier accumulation region is provided within the quantum wire or at a position connected to or adjacent to the quantum wire for accumulating charges generated when light shines onto a photosensitive region that comprises at least a clad layer that covers the quantum wire. A recess is provided in the upper clad layer to localize the photocarrier accumulation region. As a result, it is possible to provide a photodetector that exhibits high sensitivity, high speed and low power consumption in an expanded wavelength region. It is also possible to provide a photodetector capable of constructing core portions thereof by one-time selective growth.

Abstract translation: 量子线形成在V沟槽衬底中的V形槽的底部上，作为源电极和漏电极之间的沟道或者作为沟道的至少一部分。 在量子线内或位于与量子线连接或相邻的位置处设置光载流子积聚区域，用于当光照射到至少包括覆盖量子线的覆层的光敏区域时产生的电荷。 在上包层中设置凹部以使光载流子积聚区域定位。 结果，可以提供在扩展波长区域中显示出高灵敏度，高速度和低功耗的光电检测器。 还可以提供能够通过一次选择性生长来构造其核心部分的光电检测器。

公开(公告)号：US07221005B2

公开(公告)日：2007-05-22

申请号：US10561530

申请日：2001-09-28

Applicant: Mutsuo Ogura ,  Takeyoshi Sugaya ,  Kee-Youn Jang ,  Yoshinobu Sugiyama

Inventor： Mutsuo Ogura ,  Takeyoshi Sugaya ,  Kee-Youn Jang ,  Yoshinobu Sugiyama

IPC: H01L31/00

CPC classification number: B82Y10/00 ,  H01L29/045 ,  H01L29/125 ,  H01L29/775

Abstract: A negative resistance field-effect element that is a negative differential resistance field-effect element capable of achieving negative resistance at a low power supply voltage (low drain voltage) and also enabling securement of a high PVCR is formed on its InP substrate 11 having an asymmetrical V-groove whose surface on one side is a (100) plane and surface on the other side is a (011) plane with an InAlAs barrier layer (12) that has a trench (TR) one of whose opposed lateral faces is a (111) A plane and the other of which is a (331) B plane. An InGaAs quantum wire (13) that has a relatively narrow energy band gap is formed at the trench bottom surface as a high-mobility channel. An InAlAs modulation-doped layer (20) having a relatively wide energy band gap is formed on the quantum wire as a low-mobility channel. A source electrode (42) and a drain electrode (43) each in electrical continuity with the quantum wire (13) constituting the high-mobility channel through a contact layer (30) and extending in the longitudinal direction of the quantum wire (13) as spaced from each other, and a gate electrode (41) provided between the source electrode (42) and the drain electrode (43) to face the low-mobility channel (20) through an insulating layer or a Schottky junction, are provided. Owing to the foregoing configuration, a very narrow-width quantum wire whose lateral confinement size can, without restriction by the lithographic technology limit, be made 100 nm or less is usable as a high-mobility channel, whereby there can be obtained a negative resistance field-effect element that develops a negative characteristic at a low power supply voltage and enables securement of a high PVCR.

Abstract translation: 作为能够在低电源电压（低漏极电压）下实现负电阻并且还能够确保高PVCR的负的差分电阻场效应元件的负电阻场效应元件形成在其具有 非对称V槽，其一侧的表面为（100）面，另一侧的表面为具有InAlAs阻挡层（12）的（011）平面，所述InAlAs势垒层具有沟槽（TR），所述沟槽（TR）的相对侧面之一为 （111）一个平面，另一个是（331）B平面。 在沟槽底面形成具有较窄能带隙的InGaAs量子线（13）作为高迁移率通道。 在量子线上形成具有相对宽的能带隙的InAlAs调制掺杂层（20）作为低迁移率信道。 每个与构成高迁移率通道的量子线（13）导电连接的源电极（42）和漏电极（43）通过接触层（30）沿量子线（13）的纵向方向延伸， 并且设置在源电极（42）和漏电极（43）之间通过绝缘层或肖特基结面对低迁移率通道（20）的栅电极（41）。 由于上述结构，可以使绝缘尺寸大小不受光刻技术限制的极窄宽度量子线作为100nm以下，作为高​​迁移率通道，由此可以获得负电阻 场效应元件在低电源电压下产生负特性并且能够确保高PVCR。

公开(公告)号：US20060267045A1

公开(公告)日：2006-11-30

申请号：US10561530

申请日：2003-09-28

Applicant: Mutsuo Ogura ,  Takeyoshi Sugaya ,  Kee-Youn Jang ,  Yoshinobu Sugiyama

Inventor： Mutsuo Ogura ,  Takeyoshi Sugaya ,  Kee-Youn Jang ,  Yoshinobu Sugiyama

IPC: H01L31/00

CPC classification number: B82Y10/00 ,  H01L29/045 ,  H01L29/125 ,  H01L29/775

Abstract: A negative resistance field-effect element that is a negative differential resistance field-effect element capable of achieving negative resistance at a low power supply voltage (low drain voltage) and also enabling securement of a high PVCR is formed on its InP substrate 11 having an asymmetrical V-groove whose surface on one side is a (100) plane and surface on the other side is a (011) plane with an InAlAs barrier layer (12) that has a trench (TR) one of whose opposed lateral faces is a (111) A plane and the other of which is a (331) B plane. An InGaAs quantum wire (13) that has a relatively narrow energy band gap is formed at the trench bottom surface as a high-mobility channel. An InAlAs modulation-doped layer (20) having a relatively wide energy band gap is formed on the quantum wire as a low-mobility channel. A source electrode (42) and a drain electrode (43) each in electrical continuity with the quantum wire (13) constituting the high-mobility channel through a contact layer (30) and extending in the longitudinal direction of the quantum wire (13) as spaced from each other, and a gate electrode (41) provided between the source electrode (42) and the drain electrode (43) to face the low-mobility channel (20) through an insulating layer or a Schottky junction, are provided. Owing to the foregoing configuration, a very narrow-width quantum wire whose lateral confinement size can, without restriction by the lithographic technology limit, be made 100 nm or less is usable as a high-mobility channel, whereby there can be obtained a negative resistance field-effect element that develops a negative characteristic at a low power supply voltage and enables securement of a high PVCR.

Abstract translation: 作为能够在低电源电压（低漏极电压）下实现负电阻并且还能够确保高PVCR的负的差分电阻场效应元件的负电阻场效应元件形成在其具有 非对称V槽，其一侧的表面为（100）面，另一侧的表面为具有InAlAs阻挡层（12）的（011）平面，所述InAlAs势垒层具有沟槽（TR），所述沟槽（TR）的相对侧面之一为 （111）一个平面，另一个是（331）B平面。 在沟槽底面形成具有较窄能带隙的InGaAs量子线（13）作为高迁移率通道。 在量子线上形成具有相对宽的能带隙的InAlAs调制掺杂层（20）作为低迁移率信道。 每个与构成高迁移率通道的量子线（13）导电连接的源电极（42）和漏电极（43）通过接触层（30）沿量子线（13）的纵向方向延伸， 并且设置在源电极（42）和漏电极（43）之间通过绝缘层或肖特基结面对低迁移率通道（20）的栅电极（41）。 由于上述结构，可以使绝缘尺寸大小不受光刻技术限制的极窄宽度量子线作为100nm以下，作为高​​迁移率通道，由此可以获得负电阻 场效应元件在低电源电压下产生负特性并且能够确保高PVCR。

公开(公告)号：US20110291158A1

公开(公告)日：2011-12-01

申请号：US13138410

申请日：2010-02-12

Applicant: Mutsuo Ogura ,  SungWoo Choi ,  Nobuyuki Hayama ,  Katsuhiko Nishida

Inventor： Mutsuo Ogura ,  SungWoo Choi ,  Nobuyuki Hayama ,  Katsuhiko Nishida

IPC: H01L31/0352

CPC classification number: H01L31/03046 ,  H01L31/1105 ,  Y02E10/544

Abstract: The present invention provides a HPT having high sensitivity and extensive wavelength band characteristics. The collector and barrier layer (5) is formed on the photo-absorption layer (6), wherein the energy level in the conduction band is higher than that of the photo-absorption layer (6), the energy level in the valence band is almost equal to or higher than that of the photo-absorption layer (6) and is a relatively wider gap semiconductor than the photo-absorption layer. The base layer (4) formed on the collector and barrier layer (5), is a relatively narrow gap as compared with the collector and barrier layer (5), wherein the energy level in the conduction band is equal to or higher than that of the collector and barrier layer (5) in the boundary of the collector and barrier layer (5). The emitter layer (3) formed on a base layer (4) is a relatively wide gap as compared with the base layer (4), and the energy level in the valence band is the first conductivity type semiconductor layer lower than that of the base layer (4).

Abstract translation: 本发明提供具有高灵敏度和广泛波长带特性的HPT。 在光吸收层（6）上形成集电极和阻挡层（5），其中导带中的能级高于光吸收层（6）的能级，价带中的能级为 几乎等于或高于光吸收层（6），并且是比光吸收层更宽的间隙半导体。 形成在集电极和阻挡层（5）上的基底层（4）与集电极和阻挡层（5）相比是相对窄的间隙，其中导带中的能级等于或高于 在集电体和阻挡层（5）的边界中的集电极和阻挡层（5）。 形成在基底层（4）上的发射极层（3）与基底层（4）相比是相对较宽的间隙，并且价带中的能级是第一导电类型半导体层低于基底层 层（4）。

公开(公告)号：US6036773A

公开(公告)日：2000-03-14

申请号：US826422

申请日：1997-03-27

Applicant: Xue-Lun Wang ,  Mutsuo Ogura

Inventor： Xue-Lun Wang ,  Mutsuo Ogura

IPC: B82B3/00 ,  C30B25/02 ,  C30B25/18 ,  H01L21/20 ,  H01L21/205 ,  C30B23/04

CPC classification number: C30B25/02 ,  B82Y10/00 ,  C30B25/18 ,  C30B29/40 ,  H01L21/02395 ,  H01L21/0243 ,  H01L21/02433 ,  H01L21/02546 ,  H01L21/0262 ,  H01L21/02639 ,  Y10S117/913 ,  Y10S977/773 ,  Y10S977/813

Abstract: A Group III atomic layer required for fabrication of a semiconductor quantum nanostructure is grown to be properly restricted to a monolayer.A substrate is configured to have a fast-growth surface portion where growth of a Ga atomic layer proceeds at a relatively high rate and a slow-growth surface portion where the growth of the Ga atomic layer proceeds at a relatively low rate. Ga atoms are supplied to the fast-growth surface portion in an amount not less than that which grows one layer of the Group III atoms. Excess Ga atoms on the fast-growth surface portion are allowed to migrate to the slow-growth surface portion by surface migration, thereby growing only one layer of the Ga atoms on the fast-growth surface portion.

Abstract translation: 生长半导体量子纳米结构所需的III族原子层被适当地限制为单层。 衬底被配置为具有以较高速率进行Ga原子层的生长的快速生长表面部分和Ga原子层的生长以较低速率进行的缓慢生长表面部分。 将Ga原子以不小于生长一层III族原子的量供给到快速生长表面部分。 允许快速生长表面部分上的过量Ga原子通过表面迁移迁移到慢生长表面部分，从而在快速生长表面部分上仅生长一层Ga原子。

公开(公告)号：US08659039B2

公开(公告)日：2014-02-25

申请号：US13146179

申请日：2010-02-08

Applicant: Xuelun Wang ,  Mutsuo Ogura

Inventor： Xuelun Wang ,  Mutsuo Ogura

IPC: H01L33/02

CPC classification number: H01L33/24

Abstract: A highly-efficient semiconductor light emitting diode with improved light extraction efficiency comprising at least a substrate having a plurality of crystal planes, a first conductivity-type barrier layer, an active layer serving as a light emitting layer and a second conductivity-type barrier layer stacked on the substrate. The semiconductor light emitting diode comprises a ridge structure configured from one flat surface and at least two inclining surfaces in the in-plane direction. The width (W) of the flat surface of the ridge structure is 2λ (λ: light emission wavelength) or less. The active layer is positioned in the laminating direction so that the shortest length (L) between two points is λ (light emission wavelength) or less, wherewith the first point is the shortest point where the light emitted from the center (C) of the active layer begins total internal reflection at the interface between the inclining surfaces of the ridge structure and air, and the second point is a point where the flat surface begins.

Abstract translation: 一种具有提高的光提取效率的高效半导体发光二极管，其至少包括具有多个晶面的基板，第一导电型阻挡层，用作发光层的有源层和第二导电型阻挡层 堆叠在基板上。 半导体发光二极管包括由一个平坦表面和面内方向上的至少两个倾斜表面构成的脊状结构。 脊结构的平坦表面的宽度（W）为2λ（λ：发光波长）或更小。 活性层位于层叠方向上，使得两点之间的最短长度（L）为λ（发光波长）或更小，其中第一点是从中心（C）发射的光的最短点 活性层在脊状结构的倾斜表面和空气之间的界面处开始全内反射，第二点是平坦表面开始的点。

公开(公告)号：US20110193133A1

公开(公告)日：2011-08-11

申请号：US12998343

申请日：2009-10-06

Applicant: Mutsuo Ogura

Inventor： Mutsuo Ogura

IPC: H01L31/109

CPC classification number: H01L31/109 ,  H01L27/1446 ,  H01L31/035281 ,  H01L31/1105 ,  Y02E10/50

Abstract: A highly sensitive and wide spectra-range mesa type photodetector having the impurity diffusion along the mesa-sidewall is provided with.A mesa-type hetero-bipolar phototransistor or photodiode having a photo-absorption layer 10 (41) formed by a first semiconductor layer of a first conductivity type, an anode layer 40 (or base layer 4) formed by a second semiconductor layer of a second conductivity type which has an opposite polarity with the first conductivity type, a wide band gap emitter 3 or window layer 42 formed by the third semiconductor layer on the anode layer, and the wide band gap buffer layer 11 of the first conductivity type which has a relatively wide band gap semiconductor as compared with the second semiconductor layer on the substrate 12, which also serves as the cathode layer. And the first semiconductor layer 10, the second semiconductor layer 4 and the wide band gap emitter 3 or window layer 42 is selectively etched to form the mesa structure 7. The diffusion region 6 shaped like a ring in plan view is also provided from the exposed sidewall of this mesa structure toward the center of the device by a predetermined horizontal width, converted into the second conductivity type, which is the same conductivity type as the second semiconductor layer. Further, the diffused region 33 is formed also in a flat surface of the second semiconductor layer 4 parallel to a substrate principal surface toward center of the device from a sidewall with a predetermined width in the horizontal direction, and also the diffused region 32 of the second conductive type is formed in the buffer layer 11 located under the photo-absorption layer 41 by the Zn diffusion in the surface part parallel to the substrate principal surface.

Abstract translation: 提供了具有沿着台面侧壁的杂质扩散的高灵敏度和宽的光谱范围台面型光电检测器。 具有由第一导电类型的第一半导体层形成的光吸收层10（41）的台面型异质双极光电晶体管或光电二极管，由第二半导体层形成的阳极层40（或基底层4） 具有与第一导电类型相反的极性的第二导电类型，由阳极层上的第三半导体层形成的宽带隙发射极3或窗口层42以及具有第一导电类型的宽带隙缓冲层11 与衬底12上的也用作阴极层的第二半导体层相比较宽的带隙半导体。 并且选择性地蚀刻第一半导体层10，第二半导体层4和宽带隙发射体3或窗口层42以形成台面结构7.在平面图中形成为环形的扩散区6也从暴露的 该台面结构的侧壁朝向设备的中心预定的水平宽度，转换成与第二半导体层相同的导电类型的第二导电类型。 此外，扩散区域33也形成在第二半导体层4的与基板主面平行的平面上，该基板主面朝向装置的中心，从侧壁以水平方向预定的宽度，并且还扩散区域32 第二导电类型通过在与基板主表面平行的表面部分中的Zn扩散而形成在位于光吸收层41下方的缓冲层11中。

公开(公告)号：US20060050753A1

公开(公告)日：2006-03-09

申请号：US11088900

申请日：2005-03-25

Applicant: Mutsuo Ogura

Inventor： Mutsuo Ogura

IPC: H01S5/00

CPC classification number: B82Y20/00 ,  B82Y10/00 ,  H01S5/02284 ,  H01S5/0265 ,  H01S5/12 ,  H01S5/1231 ,  H01S5/22 ,  H01S5/2201 ,  H01S5/2213 ,  H01S5/341 ,  H01S5/34313 ,  H01S5/4031 ,  H01S5/4087

Abstract: A quantum nanostructure semiconductor laser is provided that does not use a buried structure defined by etching and regrowth processes in the prior arts, and can be manufactured using a procedure that is simple and has good reproducibility. This helps to reduce the threshold current and provides good lasing wavelength stability. The laser has a stripe-shaped ridge with a plurality of V-grooves formed on a compound semiconductor substrate in the direction of laser beam emisson, with the V-grooves being arrayed in parallel, with each V-groove extending orthogonally to the direction of laser beam emission. On the ridge, an optical waveguide is provided that comprises a lower cladding layer, a plurality of quantum wires and an upper cladding layer formed in order by a crystal growth process. The quantum wires are formed to a finite length corresponding to the stripe width of the laser beam, and are each located at a position corresponding to a V-groove, thereby constituting the laser active region. The optical waveguide is trapezoidal in shape, and has a peripheral sidewall that is at least as high as a height at which the quantum wires are located, and is exposed or covered only by an insulation layer.

Abstract translation: 提供了一种量子纳米结构半导体激光器，其不使用现有技术中通过蚀刻和再生长工艺限定的掩埋结构，并且可以使用简单且具有良好重现性的工艺来制造。 这有助于降低阈值电流并提供良好的激光波长稳定性。 该激光器具有带状多个V形槽，多个V形槽形成在化合物半导体衬底上沿激光束排出方向，V形槽平行排列，每个V形槽垂直于 激光束发射。 在脊上，提供了一种光波导，其包括下包层，多个量子线和通过晶体生长过程依次形成的上包层。 量子线形成为对应于激光束的条宽度的有限长度，并且各自位于对应于V形槽的位置，由此构成激光有源区。 光波导形状为梯形，并且具有至少与量子线定位的高度一样高的外围侧壁，并且仅被绝缘层曝光或覆盖。

公开(公告)号：US08415713B2

公开(公告)日：2013-04-09

申请号：US12735795

申请日：2009-02-17

Applicant: Mutsuo Ogura

Inventor： Mutsuo Ogura

IPC: H01L31/101

CPC classification number: H01L31/1123 ,  H01L31/035281 ,  Y02E10/50

Abstract: This invention provides a photo-FET, in which a FET part and photodiode part are stacked, and the FET part and photodiode part are optimized independently in design and operational bias conditions. The semiconductor layer serving as a photo-absorption layer (41) is formed on the cathode semiconductor layer (10) of a photodiode part (50). An electron barrier layer (40) with a wider bandgap semiconductor than a photo-absorption layer (41), which also serves as an anode layer of a photodiode part (50), is formed on a photo-absorption layer (41). The channel layer (15) which constitutes the channel regions of the FET part is formed with a narrower bandgap semiconductor than an electron barrier layer (40) on an electron barrier layer (40). The hole barrier layer (16) with a bandgap wider than the semiconductor which constitutes a channel layer (15) is formed on a channel layer (15). The source electrode (30) and drain electrode (32) which are separated each others, are formed on a hole barrier layer (16). The holes injected into the channel layer (15) by light illumination through the electron barrier layer (40) from the photo-absorption layer (41) are confined with the hole barrier layer (16). And the electrons in a channel layer (15) are confined with the electron barrier layer (40) into the channel layer (15), respectively.

Abstract translation: 本发明提供了一种光电FET，其中堆叠FET部分和光电二极管部分，并且FET部分和光电二极管部分在设计和操作偏置条件下独立优化。 在光电二极管部分（50）的阴极半导体层（10）上形成用作光吸收层（41）的半导体层。 在光吸收层（41）上形成具有比光吸收层（41）更宽的带隙半导体的电子势垒层（40），其也用作光电二极管部分（50）的阳极层。 构成FET部分的沟道区的沟道层（15）形成有比电子势垒层（40）上的电子势垒层（40）窄的带隙半导体。 在沟道层（15）上形成具有宽于构成沟道层（15）的半导体的带隙的空穴阻挡层（16）。 彼此分离的源电极（30）和漏电极（32）形成在空穴阻挡层（16）上。 通过从光吸收层（41）通过电子阻挡层（40）的光照射注入到沟道层（15）中的空穴被限制在空穴阻挡层（16）中。 并且沟道层（15）中的电子分别与电子势垒层（40）一起被限制到沟道层（15）中。