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公开(公告)号：US20130163206A1
公开(公告)日：2013-06-27
申请号：US13676569
申请日：2012-11-14
IPC分类号： H05K7/20
CPC分类号： H01L23/3677 , H01L23/49816 , H01L23/49827 , H01L24/48 , H01L24/73 , H01L2223/6677 , H01L2224/32225 , H01L2224/48227 , H01L2224/73265 , H01L2224/83385 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/10253 , H01L2924/12041 , H01L2924/14 , H01L2924/15153 , H01L2924/15311 , H01L2924/30107 , H01L2924/3011 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor device includes a structure in which a semiconductor element (chip) is mounted in a cavity formed in a wiring board with an adhesive interposed between the chip and a bottom surface of the cavity, and electrode terminals of the chip are connected via wires to wiring portions formed on the board around the cavity. The chip is mounted in close contact with a side wall of the cavity, the side wall being near a region where a wiring for higher frequency compared with other wirings within the wiring portion is formed. A recessed portion is provided in a region of the bottom surface of the cavity, and a thermal via extending from the bottom surface of the recessed to the outside of the board is provided, the region being near a portion where the chip is in close contact.
摘要翻译： 半导体器件包括其中半导体元件（芯片）安装在形成在布线板中的空腔中的结构，其中插入在芯片和腔的底表面之间的粘合剂，并且芯片的电极端子经由导线连接到 形成在板周围的配线部分。 芯片安装成与空腔的侧壁紧密接触，侧壁靠近一个区域，与布线部分内的其它配线相比，更高频率的布线形成。 凹部设置在空腔的底面的区域中，并且设置从凹部的底面延伸到外部的热通孔，该区域靠近芯片紧密接触的部分 。
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公开(公告)号：US08373997B2
公开(公告)日：2013-02-12
申请号：US12972894
申请日：2010-12-20
IPC分类号： H05K7/00
CPC分类号： H01L23/3677 , H01L23/49816 , H01L23/49827 , H01L24/48 , H01L24/73 , H01L2223/6677 , H01L2224/32225 , H01L2224/48227 , H01L2224/73265 , H01L2224/83385 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/10253 , H01L2924/12041 , H01L2924/14 , H01L2924/15153 , H01L2924/15311 , H01L2924/30107 , H01L2924/3011 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor device includes a structure in which a semiconductor element (chip) is mounted in a cavity formed in a wiring board with an adhesive interposed between the chip and a bottom surface of the cavity, and electrode terminals of the chip are connected via wires to wiring portions formed on the board around the cavity. The chip is mounted in close contact with a side wall of the cavity, the side wall being near a region where a wiring for higher frequency compared with other wirings within the wiring portion is formed. A recessed portion is provided in a region of the bottom surface of the cavity, and a thermal via extending from the bottom surface of the recessed to the outside of the board is provided, the region being near a portion where the chip is in close contact.
摘要翻译： 半导体器件包括其中半导体元件（芯片）安装在形成在布线板中的空腔中的结构，其中插入在芯片和腔的底表面之间的粘合剂，并且芯片的电极端子经由导线连接到 形成在板周围的配线部分。 芯片安装成与空腔的侧壁紧密接触，侧壁靠近一个区域，与布线部分内的其它配线相比，更高频率的布线形成。 凹部设置在空腔的底面的区域中，并且设置从凹部的底面延伸到外部的热通孔，该区域靠近芯片紧密接触的部分 。
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公开(公告)号：US20110156228A1
公开(公告)日：2011-06-30
申请号：US12972894
申请日：2010-12-20
IPC分类号： H01L23/495
CPC分类号： H01L23/3677 , H01L23/49816 , H01L23/49827 , H01L24/48 , H01L24/73 , H01L2223/6677 , H01L2224/32225 , H01L2224/48227 , H01L2224/73265 , H01L2224/83385 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/10253 , H01L2924/12041 , H01L2924/14 , H01L2924/15153 , H01L2924/15311 , H01L2924/30107 , H01L2924/3011 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor device includes a structure in which a semiconductor element (chip) is mounted in a cavity formed in a wiring board with an adhesive interposed between the chip and a bottom surface of the cavity, and electrode terminals of the chip are connected via wires to wiring portions formed on the board around the cavity. The chip is mounted in close contact with a side wall of the cavity, the side wall being near a region where a wiring for higher frequency compared with other wirings within the wiring portion is formed. A recessed portion is provided in a region of the bottom surface of the cavity, and a thermal via extending from the bottom surface of the recessed to the outside of the board is provided, the region being near a portion where the chip is in close contact.
摘要翻译： 半导体器件包括其中半导体元件（芯片）安装在形成在布线板中的空腔中的结构，其中插入在芯片和腔的底表面之间的粘合剂，并且芯片的电极端子经由导线连接到 形成在板周围的配线部分。 芯片安装成与空腔的侧壁紧密接触，侧壁靠近一个区域，与布线部分内的其它配线相比，更高频率的布线形成。 凹部设置在空腔的底面的区域中，并且设置从凹部的底面延伸到外部的热通孔，该区域靠近芯片紧密接触的部分 。
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4.发明授权公开(公告)号：US08053677B2
公开(公告)日：2011-11-08
申请号：US12342823
申请日：2008-12-23
申请人： Tomoharu Fujii , Yukiharu Takeuchi
发明人： Tomoharu Fujii , Yukiharu Takeuchi
IPC分类号： H05K1/16
CPC分类号： H05K1/0206 , H01L2223/6677 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/15192 , H01L2924/15321 , H01Q1/02 , H01Q9/16 , H05K1/056 , H05K1/16 , H05K3/06 , H05K3/4644 , H05K2201/096 , H05K2201/10098 , H05K2201/10674 , H05K2203/0323 , Y10T29/4913 , H01L2924/00012
摘要： An electronic apparatus includes a multilayer wiring structure having insulating layers and wiring layers which are stacked and having a surface on which an electronic component is mounted, a dipole antenna formed on a surface 13A of the multilayer wiring structure, a radiating plate disposed on the surface together with the dipole antenna, and a radiating path formed in the multilayer wiring structure and serving to transfer a heat generated in the electronic component to the radiating plate.
摘要翻译： 一种电子设备，包括具有绝缘层和布线层的多层布线结构，层叠并具有安装有电子部件的表面，形成在多层布线结构的表面13A上的偶极天线，设置在该表面上的散热板 以及形成在多层布线结构中的用于将电子部件中产生的热量传递到散热板的辐射路径。
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公开(公告)号：US07788061B2
公开(公告)日：2010-08-31
申请号：US12178767
申请日：2008-07-24
IPC分类号： G01C17/00
CPC分类号： B23K3/0623 , H01L2224/1132 , H01L2224/742
摘要： A substrate and mask aligning apparatus includes a controlling portion 70 for calculating moving data that are applied to eliminate a difference between a present superposed state of the through holes 52 of the mask 50, which comes into contact with the substrate 20 that is loaded on the stage 30, on the pads 22 of the substrate 20 and a scheduled superposed state on the basis of image data from the shooting section 40, 42 and then executing repeatedly an operation to move the stage 30 on the basis of the calculated moving data of the stage.
摘要翻译： 基板和掩模对准装置包括控制部分70，用于计算移动数据，该移动数据被应用以消除掩模50的通孔52的当前重叠状态之间的差异。 基于来自拍摄部40,42的图像数据，在基板20的焊盘22上设置阶段30，并且基于计划的重叠状态，然后基于计算出的移动数据重复执行使台30移动的操作 阶段。
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公开(公告)号：US20050218502A1
公开(公告)日：2005-10-06
申请号：US11090029
申请日：2005-03-28
IPC分类号： H05K3/46 , H01L21/4763 , H01L23/12 , H01L23/498 , H01L23/50 , H01L25/00 , H05K1/02 , H05K1/11 , H05K1/18
CPC分类号： H01L23/49822 , H01L23/50 , H01L2224/16 , H01L2224/16235 , H01L2224/73204 , H01L2924/01004 , H01L2924/01078 , H01L2924/01079 , H01L2924/15192 , H01L2924/15311 , H01L2924/19105 , H01L2924/19106 , H05K1/0231 , H05K1/113 , H05K1/185 , H05K3/4602 , H05K2201/0792 , H05K2201/09772 , H05K2201/10636 , Y02P70/611
摘要： In a capacitor-mounted wiring board, a plurality of wiring layers each patterned in a required shape are stacked with insulating layers interposed therebetween and are connected to each other via conductors formed to pierce the insulating layers in the direction of thickness. A decoupling capacitor is electrically connected to a wiring layer used as a power supply line or a ground line in the vicinity of the wiring layer, and mounted such that, when a current is passed through the capacitor, the direction of the current is reversed to that of the current flowing through the relevant wiring layer.
摘要翻译： 在电容器安装的布线板中，以所需形状图案化的多个布线层被叠置在其间插入绝缘层，并且通过形成为在厚度方向上刺穿绝缘层的导体彼此连接。 去耦电容器电连接到用作布线层附近的电源线或接地线的布线层，并且安装成使得当电流通过电容器时，电流的方向被反转到 流过相关布线层的电流。
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公开(公告)号：US20050184377A1
公开(公告)日：2005-08-25
申请号：US11051566
申请日：2005-01-27
IPC分类号： H01L23/12 , H01L21/68 , H01L23/367 , H01L23/495 , H01L23/498 , H01L23/538 , H01L25/10 , H01L25/11 , H01L25/18
CPC分类号： H01L21/6835 , H01L23/3677 , H01L23/49805 , H01L23/5389 , H01L24/73 , H01L24/91 , H01L25/105 , H01L2221/68345 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2224/81005 , H01L2225/1035 , H01L2225/1058 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/10253 , H01L2924/12042 , H01L2924/15192 , H01L2924/15311 , H01L2924/15331 , H01L2924/30105 , H01L2924/30107 , H01L2924/00
摘要： In a semiconductor device, via holes are formed around a chip buried in a package, and conductor layers are respectively formed to be connected to one end and another end of the conductor filled in the individual via hole. Portions (pad portions) of the conductor layers which correspond to the conductors are exposed from protective films, or external connection terminals are bonded to the pad portions. The chip is mounted with flip-chip technology so that at least some of electrode terminals thereof are electrically connected to the conductor layers.
摘要翻译： 在半导体装置中，在埋入封装体内的芯片周围形成通孔，导体层分别形成为连接在填充在各个通孔中的导体的一端和另一端。 对应于导体的导体层的部分（焊盘部分）从保护膜露出，或外部连接端子接合到焊盘部分。 该芯片采用倒装芯片技术安装，使得其至少一些电极端子电连接到导体层。
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公开(公告)号：US5744224A
公开(公告)日：1998-04-28
申请号：US550995
申请日：1995-10-31
IPC分类号： H01L23/12 , H01L21/52 , H01L23/498 , B32B15/04
CPC分类号： H01L23/49838 , H01L2224/83385 , Y10S428/901 , Y10T428/24917 , Y10T428/31504 , Y10T428/31678
摘要： A semiconductor chip mounting board includes a base material made of resin; a metallized pattern formed on a surface of the base material which defines a die-pad area on which a semiconductor chip is to be mounted; and the metallized pattern comprising a plurality of zigzag shaped pattern lines along imaginary straight line segments radially, outwardly extending from a central position of the die-pad area. The metallized pattern may be a plurality of zigzag shaped pattern portions along imaginary concentric circles having a center at a central position of the die-pad area. Otherwise, the metallized pattern may be a plurality of closed loop shaped frames which are overlapped on each other in a zigzag manner.
摘要翻译： 半导体芯片安装板包括由树脂制成的基材; 形成在所述基材的表面上的金属化图案，所述表面限定将要安装半导体芯片的芯片焊盘区域; 并且所述金属化图案包括沿着沿着所述芯片区域的中心位置向外延伸的沿着假想直线段的多个锯齿形图案线。 金属化图案可以是沿着具有在芯片区域的中心位置处的中心的沿着虚拟同心圆的多个锯齿形图案部分。 否则，金属化图案可以是以Z字形方式彼此重叠的多个闭环形框架。
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公开(公告)号：US07843059B2
公开(公告)日：2010-11-30
申请号：US11486051
申请日：2006-07-14
IPC分类号： H01L23/34
CPC分类号： H01L21/6835 , H01L21/563 , H01L21/568 , H01L23/3128 , H01L25/105 , H01L2224/16238 , H01L2224/32225 , H01L2224/73204 , H01L2225/1023 , H01L2225/1058 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/10253 , H01L2924/15331 , H01L2924/30105 , H01L2924/3511 , Y10T29/49117 , Y10T29/49124 , Y10T29/49126 , Y10T29/49155 , H01L2224/16225 , H01L2924/00012 , H01L2924/00
摘要： In an electronic parts packaging structure of the present invention constructed by stacking a plurality of sheet-like units in a thickness direction, each of the units includes a first insulating layer, wirings formed on one surface of the first insulating layer, a semiconductor chip (electronic parts) connected to the wirings, a second insulating layer formed on an one surface side of the first insulating layer to cover the semiconductor chip, and connecting portions (terminals and contact vias) for connecting electrically the wirings and wirings of other unit, wherein arrangement of the first insulating layer, the semiconductor chip, the wirings, and the second insulating layer is symmetrical between units adjacent in a thickness direction.
摘要翻译： 在通过在厚度方向堆叠多个片状单元构成的本发明的电子部件封装结构中，每个单元包括第一绝缘层，形成在第一绝缘层的一个表面上的布线，半导体芯片（ 电子部件），形成在第一绝缘层的一个表面侧以覆盖半导体芯片的第二绝缘层和用于将电气连接到另一个单元的布线和布线的连接部分（端子和接触通孔），其中 第一绝缘层，半导体芯片，布线和第二绝缘层的布置在厚度方向相邻的单元之间是对称的。
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公开(公告)号：US20090030640A1
公开(公告)日：2009-01-29
申请号：US12178767
申请日：2008-07-24
IPC分类号： G01P21/00
CPC分类号： B23K3/0623 , H01L2224/1132 , H01L2224/742
摘要： A substrate and mask aligning apparatus includes a controlling portion 70 for calculating moving data that are applied to eliminate a difference between a present superposed state of the through holes 52 of the mask 50, which comes into contact with the substrate 20 that is loaded on the stage 30, on the pads 22 of the substrate 20 and a scheduled superposed state on the basis of image data from the shooting section 40, 42 and then executing repeatedly an operation to move the stage 30 on the basis of the calculated moving data of the stage.
摘要翻译： 基板和掩模对准装置包括控制部分70，用于计算移动数据，该移动数据被应用以消除掩模50的通孔52的当前重叠状态之间的差异。 基于来自拍摄部40,42的图像数据，在基板20的焊盘22上设置阶段30，并且基于计划的重叠状态，然后基于计算出的移动数据重复执行使台30移动的操作 阶段。
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