公开(公告)号：US08975728B2

公开(公告)日：2015-03-10

申请号：US13612562

申请日：2012-09-12

申请人： Nobuyuki Ikarashi ,  Masayasu Tanaka

发明人： Nobuyuki Ikarashi ,  Masayasu Tanaka

IPC分类号： H01L29/20 ,  H01L21/02 ,  H01L33/00 ,  H01L33/32

CPC分类号： H01L29/32 ,  H01L21/0237 ,  H01L21/02378 ,  H01L21/02447 ,  H01L21/02458 ,  H01L21/02505 ,  H01L21/02529 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02656 ,  H01L29/2003 ,  H01L33/007 ,  H01L33/325

摘要： A second epitaxial layer is grown epitaxially over a first epitaxial layer. The first epitaxial layer includes an epitaxially grown layer and a defect layer. The defect layer is disposed over the epitaxially grown layer and serves as a surface layer of the first epitaxial layer. The defect density of the defect layer is 5×1017 cm−2 or more. Defects penetrating through the defect layer form loops in the second epitaxial layer.

摘要翻译： 在第一外延层上外延生长第二外延层。 第一外延层包括外延生长层和缺陷层。 缺陷层设置在外延生长层上并用作第一外延层的表面层。 缺陷层的缺陷密度为5×1017cm-2以上。 贯穿缺陷层的缺陷在第二外延层中形成环。

公开(公告)号：US20130092949A1

公开(公告)日：2013-04-18

申请号：US13612562

申请日：2012-09-12

申请人： Nobuyuki Ikarashi ,  Masayasu Tanaka

发明人： Nobuyuki Ikarashi ,  Masayasu Tanaka

IPC分类号： H01L23/00 ,  H01L21/322 ,  H01L29/20

CPC分类号： H01L29/32 ,  H01L21/0237 ,  H01L21/02378 ,  H01L21/02447 ,  H01L21/02458 ,  H01L21/02505 ,  H01L21/02529 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02656 ,  H01L29/2003 ,  H01L33/007 ,  H01L33/325

摘要： A second epitaxial layer is grown epitaxially over a first epitaxial layer. The first epitaxial layer includes an epitaxially grown layer and a defect layer. The defect layer is disposed over the epitaxially grown layer and serves as a surface layer of the first epitaxial layer. The defect density of the defect layer is 5×1017 cm−2 or more. Defects penetrating through the defect layer form loops in the second epitaxial layer.

摘要翻译： 在第一外延层上外延生长第二外延层。 第一外延层包括外延生长层和缺陷层。 缺陷层设置在外延生长层上并用作第一外延层的表面层。 缺陷层的缺陷密度为5×1017cm-2以上。 贯穿缺陷层的缺陷在第二外延层中形成环。

公开(公告)号：US20100219478A1

公开(公告)日：2010-09-02

申请号：US12159295

申请日：2006-12-25

申请人： Kenzo Manabe ,  Nobuyuki Ikarashi

发明人： Kenzo Manabe ,  Nobuyuki Ikarashi

IPC分类号： H01L29/78 ,  H01L21/336 ,  H01L21/8238

CPC分类号： H01L21/823835 ,  H01L21/28097 ,  H01L21/823842 ,  H01L21/823871 ,  H01L29/4975 ,  H01L29/518 ,  H01L29/7843

摘要： The present invention provides an NMOSFET including a semiconductor substrate, a gate insulating film formed on the semiconductor substrate, and a first gate electrode formed on the gate insulating film. The first gate electrode is composed of silicide of a metal M, and at least one element selected as an impurity from a group consisting of sulfur (S), fluorine (F) and chlorine (Cl). The impurity exists as an impurity layer at a surface of the first gate electrode at which the first gate electrode makes contact with the gate insulating film.

摘要翻译： 本发明提供一种NMOSFET，其包括半导体衬底，形成在半导体衬底上的栅极绝缘膜和形成在栅极绝缘膜上的第一栅电极。 第一栅电极由金属M的硅化物和由硫（S），氟（F）和氯（Cl）组成的组中选择为至少一种元素的至少一种元素组成。 杂质存在于第一栅电极与栅极绝缘膜接触的第一栅电极的表面处的杂质层。

公开(公告)号：US20090267163A1

公开(公告)日：2009-10-29

申请号：US12083057

申请日：2006-09-21

申请人： Kouji Watanabe ,  Nobuyuki Ikarashi ,  Kouji Masuzaki

发明人： Kouji Watanabe ,  Nobuyuki Ikarashi ,  Kouji Masuzaki

IPC分类号： H01L29/78

CPC分类号： H01L29/517 ,  H01L21/28035 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/823857 ,  H01L29/513 ,  H01L29/518

摘要： According to the present invention, a semiconductor device having a field effect transistor is provided. The field effect transistor comprises a gate insulating film 2 formed on a semiconductor layer 1 and a gate electrode 5 formed on the gate insulating film 2. The gate insulating film 2 has a silicon oxide film including a metal element 4 and nitrogen 3, and characteristics of the silicon oxide film are modified by adding the metal element 4 and nitrogen 3. Respective concentration distributions of the metal element 4 and nitrogen 3 in the gate insulating film 2 have maximum values on an interface side between the gate insulating film 2 and the gate electrode 5, and gradually decrease toward the semiconductor layer 1.

摘要翻译： 根据本发明，提供了具有场效应晶体管的半导体器件。 场效应晶体管包括形成在半导体层1上的栅极绝缘膜2和形成在栅极绝缘膜2上的栅极电极5.栅极绝缘膜2具有包括金属元素4和氮3的氧化硅膜，并且特性 通过添加金属元素4和氮3来改性氧化硅膜。栅极绝缘膜2中的金属元素4和氮3的各自的浓度分布在栅极绝缘膜2和栅极之间的界面侧具有最大值 电极5，朝向半导体层1逐渐减小。

公开(公告)号：US20080203500A1

公开(公告)日：2008-08-28

申请号：US12071126

申请日：2008-02-15

申请人： Takashi Ogura ,  Nobuyuki Ikarashi ,  Toshiyuki Iwamoto ,  Hirohito Watanabe

发明人： Takashi Ogura ,  Nobuyuki Ikarashi ,  Toshiyuki Iwamoto ,  Hirohito Watanabe

IPC分类号： H01L29/78

CPC分类号： H01L21/28185 ,  H01L21/28194 ,  H01L21/28211 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/6656 ,  H01L29/78

摘要： A semiconductor device provided with a MIS type field effect transistor comprising a silicon substrate, a gate insulating film having a high-dielectric-constant metal oxide film which is formed on the silicon substrate via a silicon containing insulating film, a silicon-containing gate electrode formed on the gate insulating film, and a sidewall including, as a constituting material, silicon oxide on a lateral face side of the gate electrode, wherein a silicon nitride film is interposed between the sidewall and at least the lateral face of the gate electrode. This semiconductor device, although having a fine structure with a small gate length, is capable of low power consumption and fast operation.

摘要翻译： 一种设置有MIS型场效应晶体管的半导体器件，包括硅衬底，具有通过含硅绝缘膜形成在硅衬底上的高介电常数金属氧化物膜的栅极绝缘膜，含硅栅电极 形成在所述栅极绝缘膜上的侧壁，以及在所述栅电极的侧面上包含氧化硅作为构成材料的侧壁，其中，所述侧壁与所述栅电极的至少所述侧面之间插入有氮化硅膜。 该半导体器件尽管具有栅极长度小的精细结构，但能够实现低功耗和快速操作。

公开(公告)号：US20070090450A1

公开(公告)日：2007-04-26

申请号：US11608078

申请日：2006-12-07

申请人： Heiji Watanabe ,  Haruhiko Ono ,  Nobuyuki Ikarashi

发明人： Heiji Watanabe ,  Haruhiko Ono ,  Nobuyuki Ikarashi

IPC分类号： H01L29/792 ,  H01L31/00 ,  H01L35/26

CPC分类号： H01L21/02142 ,  H01L21/02271 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/31604 ,  H01L21/31612 ,  H01L21/31637 ,  H01L21/31641 ,  H01L21/31645 ,  H01L29/517

摘要： A semiconductor device has a substrate and a dielectric film formed directly or indirectly on the substrate. The dielectric film contains a metal silicate film, and a silicon concentration in the metal silicate film is lower in a center portion in the film thickness direction than in an upper portion and in a lower portion.

摘要翻译： 半导体器件具有直接或间接地形成在衬底上的衬底和电介质膜。 电介质膜含有金属硅酸盐膜，并且在膜厚度方向上的中心部分，金属硅酸盐膜中的硅浓度比上部和下部低。

公开(公告)号：US20060113685A1

公开(公告)日：2006-06-01

申请号：US10538306

申请日：2003-09-22

申请人： Makoto Ueki ,  Masayuki Hiroi ,  Nobuyuki Ikarashi ,  Yoshihiro Hayashi

发明人： Makoto Ueki ,  Masayuki Hiroi ,  Nobuyuki Ikarashi ,  Yoshihiro Hayashi

IPC分类号： H01L23/48

CPC分类号： H01L23/53233 ,  H01L21/76883 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： A wiring metal contains a polycrystal of copper (Cu) as a primary element and an additional element other than Cu, and concentration of the additional element is, at crystal grain boundaries composing the Cu polycrystal and in vicinities of the crystal grain boundaries, higher than that of the inside of the crystal grains. The additional element is preferably at least one element selected from a group consisting of Ti, Zr, Hf, Cr, Co, Al, Sn, Ni, Mg, and Ag. This Cu wiring is formed by forming a Cu polycrystalline film, forming an additional element layer on this Cu film, and diffusing this additional element from the additional element layer into the Cu film. This copper alloy for wiring is preferred as metal wiring formed for a semiconductor device.

公开(公告)号：US08203176B2

公开(公告)日：2012-06-19

申请号：US12526238

申请日：2008-02-04

申请人： Takashi Nakagawa ,  Toru Tatsumi ,  Nobuyuki Ikarashi ,  Makiko Oshida

发明人： Takashi Nakagawa ,  Toru Tatsumi ,  Nobuyuki Ikarashi ,  Makiko Oshida

IPC分类号： H01L21/00

CPC分类号： H01L21/02178 ,  C01G25/00 ,  C01P2002/72 ,  C01P2006/40 ,  C04B35/4885 ,  C04B35/6325 ,  C04B2235/44 ,  C23C16/40 ,  H01B3/10 ,  H01L21/02189 ,  H01L21/02194 ,  H01L21/022 ,  H01L21/02271 ,  H01L21/0228 ,  H01L21/28194 ,  H01L21/3142 ,  H01L21/31604 ,  H01L21/31616 ,  H01L21/31641 ,  H01L27/1085 ,  H01L28/40 ,  H01L29/517 ,  H01L29/7833

摘要： To make it possible to significantly suppress the leakage current in a semiconductor device having a capacitor structure using a dielectric film. There is provided a composite oxide dielectric which is mainly composed of Zr, Al and O, and which has a composition ratio of Zr and Al in a range of (1−x):x where 0.01≦x≦0.15, and has a crystal structure. When the dielectric is set to have the Al composition in the above described range and is crystallized, the relative dielectric constant of the dielectric can be significantly increased. When the dielectric is used as a dielectric film of a capacitor of a semiconductor device, the leakage current of the capacitor can be significantly reduced.

摘要翻译： 为了能够显着地抑制具有使用电介质膜的电容器结构的半导体器件中的漏电流。 提供了主要由Zr，Al和O组成的复合氧化物电介质，其组成比为（1-x）：x，其中0.01和nlE; x＆ 晶体结构。 当电介质被设定为具有上述范围内的Al组成并且被结晶时，电介质的相对介电常数可以显着提高。 当电介质用作半导体器件的电容器的电介质膜时，电容器的漏电流可以显着降低。

公开(公告)号：US20110018100A1

公开(公告)日：2011-01-27

申请号：US12933946

申请日：2009-03-27

申请人： Takashi Nakagawa ,  Kaoru Mori ,  Nobuyuki Ikarashi ,  Makiko Oshida

发明人： Takashi Nakagawa ,  Kaoru Mori ,  Nobuyuki Ikarashi ,  Makiko Oshida

IPC分类号： H01L27/08 ,  H01L21/02

CPC分类号： H01L21/3142 ,  H01L21/02178 ,  H01L21/02189 ,  H01L21/02194 ,  H01L21/022 ,  H01L21/02271 ,  H01L21/0228 ,  H01L21/316 ,  H01L27/10811 ,  H01L27/10852 ,  H01L28/40

摘要： Provided is a capacitor that realizes a capacitance insulation film having a large relative permittivity and has sufficient capacitance even if an occupied space is small with a reduced amount of leakage current. A capacitor includes: a capacitance insulation film; and an upper electrode and lower electrode each formed on both sides of the capacitance insulation film. The capacitance insulation film is a complex oxide whose main ingredients are Zr, Al and O with the composition ratio of Zr to Al being set at (1−x): x (0.01≦x≦0.15) and is composed of a dielectric substance having a crystal structure. The lower electrode is composed of a conductor whose surface contiguous to at least the dielectric film has an amorphous structure.

摘要翻译： 提供一种电容器，其实现具有大的相对介电常数的电容绝缘膜，并且即使占用空间小，漏电流减少，也具有足够的电容。 电容器包括：电容绝缘膜; 以及各自形成在电容绝缘膜的两侧的上电极和下电极。 电容绝缘膜是主要成分为Zr，Al和O的复合氧化物，Zr与Al的组成比设定为（1-x）：x（0.01＆nlE; x＆nlE; 0.15），由介电材料 具有晶体结构。 下电极由与至少电介质膜相邻的表面具有非晶结构的导体构成。

公开(公告)号：US20070138580A1

公开(公告)日：2007-06-21

申请号：US10575785

申请日：2005-06-21

申请人： Kensuke Takahashi ,  Kenzo Manabe ,  Nobuyuki Ikarashi ,  Toru Tatsumi

发明人： Kensuke Takahashi ,  Kenzo Manabe ,  Nobuyuki Ikarashi ,  Toru Tatsumi

IPC分类号： H01L29/94 ,  H01L29/76

CPC分类号： H01L29/4975 ,  H01L21/823835 ,  H01L21/823842 ,  H01L29/66545

摘要： There is provided a semiconductor device which is capable of solving a problem of threshold control in CMOS transistor, accompanied with combination of a gate insulating film having a high dielectric constant and a metal gate electrode, and significantly enhancing performances without deterioration in reliability of a device. The semiconductor device includes a gate insulating film composed of a material having a high dielectric constant, and a gate electrode. A portion of the gate electrode making contact with the gate insulating film has a composition including silicide of metal M expressed with MxSi1-X (0 0.5) in a p-type MOSFET, and is equal to or smaller than 0.5 (X≦0.5) in a n-type MOSFET.

摘要翻译： 提供一种半导体器件，其能够解决CMOS晶体管中的阈值控制的问题，伴随着具有高介电常数的栅极绝缘膜和金属栅极电极的组合，并且显着提高性能而不劣化器件的可靠性 。 半导体器件包括由具有高介电常数的材料构成的栅极绝缘膜和栅电极。 与栅极绝缘膜接触的栅电极的一部分具有以MxSi 1-X（0 0.5），并且在n型MOSFET中等于或小于0.5（X <= 0.5）。